New DC/DC Converter With Low Output Voltage And Fast Transient Response. A. Barrado, R. Vázquez, A. Lázaro, J. Pleite, J. Vázquez, E. Olías. Power Electronics System Group (GSEP) Departamento de Tecnología Electrónica Universidad Carlos III de Madrid Avda. de la Universidad 30, 28911, Leganés, Madrid, SPAIN Tel.: 34-91-6249188 FAX: 34-91-6249430 E-mail:
[email protected] www.uc3m.es/gsep depends on the topology and the control of the converter, and hence, from the LC filter, regulator, etc.
Abstract— A new alternative to get fast transient response DC/DC switching converters is presented in order to feed devices such as microprocessors and DSPs. The topology of the switching power supply is composed of two buck converters connected in parallel, each one of them with different aims, controlled by means of the Linear-Non-Linear control.
Io Vo
In this paper, the LnL control is reviewed and applied to the proposed power supply (fast response double buck, FRDB). Also, experimental results are obtained to show the main features of the proposed converter and to compare them with the features of some other solution. Keywords: DC-DC converter, fast transient response, low output voltage, high current slew rate, Linear-Non-Linear control.
I.
Recovery Time
INTRODUCTION
Figure 1. Influence on voltage drop.
Microprocessors and DSPs have experimented a very important development in recent years. As a consequence, nowadays these devices need power supplies with strict voltage and current requirements. One of the main challenges, for designer, is to get a higher current slew rate.
Different techniques have been used in order to improve the transient response: some of them improve the control block like hysteresis control or V2 control [5-7]; other modify the topology like the Voltage Regulator Module with Interleaving Techniques [8-9]; and other solutions, like the Hybrid Sources [10-11], have made modifications on both, the control and the topology.
In general, the main requirements to feed last generation microprocessors and DSPs are the following [1-4]: •
Low output voltage: 1 to 3.3 V.
•
Output voltage tolerance: ± 2% .
•
High load current: 1 to 60 A.
•
High current slew rate: up to 5 A/ns.
•
Reduced converter size & improved converter efficiency.
This paper presents a new DC/DC switching power supply, the Fast Response Double Buck Converter (FRDB converter), composed of two buck converters connected in parallel. Each one of these converters present different features and aims, and they are controlled by means of the Linear-Non-Linear control [11-12]. The goal is to reduce the recovery time (tR) of the output voltage when a load current step is produced, limiting, at the same time, the variation of the output voltage (∆Vomax), without penalizing the efficiency and guaranteeing the stability. The topology, the control, the operation principle and the experimental results will be presented.
Since microprocessors and DSPs current consumption presents a big number of high load current steps with high slew rate, the output voltage surpasses easily the maximum output voltage tolerance allowed. Fig. 1 shows a typical output voltage drop produced by a load current step. First spike depends basically on the parasitics like ESR, ESL, LAYOUT, etc. Therefore, the better components and manufacturing technology the smaller spike. However, the second area
0-7803-7768-0/03/$17.00 (C) 2003 IEEE
Converter dominant: Filter (L, C) and control
Parasitic dominant: ESR, ESL, L and R LAYOUT parasitic
II.
PROPOSED TOPOLOGY
Fig. 2 shows the block diagram of the FRDB power supply. The topology of this converter is composed of two switching
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buck converters (Fig.3) connected in parallel. Both converters have to be designed with different purposes.
III.
To regulate the FRDB converter is used the combined Linear-Non-Linear control (LnL control) presented in [5].
IA
Fast Response Transient Operation
The LnL control is based on the utilization of a Threshold Band (2∆Vo), Fig. 3. This band presents two limits, a higher threshold (HT, Vo+∆Vo) and a lower threshold (LT, Vo-∆Vo). If the output voltage is within the threshold band only the main switching converter operates, in this case like a typical buck converter with linear control. If output voltage goes out the threshold band, the auxiliary switching converter and the NonLinear control are connected (E/D and L/NL inputs are set to 1, Fig. 2).
t
Auxiliary Switching Converter
Main Source
LOAD Main Switching Converter Slow Response Steady-State Operation
IM
Io
t
t
Vo
iO
t
Figure 2.
Basic structure and operation of the FRDB power supply.
a)
vO
The main switching converter must be designed to work in steady-state operation, and therefore with a good stability and a low output voltage ripple, but as consequence with slow response. On the contrary, the auxiliary switching converter must be designed to work in transient operation. The main aim of this converter is to provide the required high current slew rate. Thereby, the main inductor (LM) must to present a bigger inductance than the auxiliary inductor (LA).
Auxiliary Converter
Driver 0 E/ D
Duty Cycle Saturation & Reset Logic
Threshold Logic
e)
Output C
Non Linear Control
Control
RL
1
1
duty cycle D L / NL & E/D
iA
Vo
Z2 Z1
MUX
L / NL
1
Vref
0
Driver
Linear Control
iM
Figure 4. FRDB converter waveforms, a) Load current steps, b) Output voltage, c) Duty cycle, d) L/NL and E/D selection inputs, and e) Injected current by the auxiliary converter.
LM
MMd VIN
c)
iA iOut
HT
LT
d)
MAf
(Nominal value)
b)
LA
MAd
CONTROL STRATEGY
MMf Main Converter
The Threshold Logic and the Duty Cycle Saturation & Reset Logic in Non-Linear control, Fig. 2, are used to detect if the output voltage is within the threshold band, as well as if the output voltage is above the higher threshold or below the lower threshold.
Figure 3. Simplified diagram of a FRDB power supply.
The Linear-Non-Linear selection input (L/NL) of the multiplexer (MUX) selects either the output of the linear control (L/NL with low level) when output voltage is within the threshold band, or the output of the Non linear control (L/NL with high level) when output voltage is out the threshold band.
So, topologically, the idea is to keep the main switching converter operating all the time, connecting the auxiliary switching converter only at the edges of the load current steps to complement the main converter performance in order to fulfill the requirements.
The input E/D of the driver in auxiliary converter is used to enable (E/D set to 1) or to disable (E/D set to 0) the driver.
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The operation principle is shown in Fig. 3. In steady-state operation, the output voltage is within the threshold band, gray area in Fig. 3.b; the main buck converter works with linear control and almost constant duty cycle, Fig. 3.c; the L/NL input is at low level to select the linear control, Fig. 3.d; and the auxiliary converter does not inject any current, Fig. 3.e, since E/D input is set to 0 as well as the L/NL input.
has been used to make the switching block of the four prototypes. In this way, the differences that could appear between the studied systems during their assemblies have been minimized. A. Main System Waveform. Fig. 5 shows the transient response of a typical buck converter with linear control and Fig. 6, the FRDB converter.
When a load current step occurs, if output voltage exceeds the limits, the inputs L/NL and E/D are set to 1 and the buck converters, main and auxiliary, start to work with non-linear control, Fig. 3.d. The Duty Cycle Saturation & Reset Logic block forces to 1 the duty cycle if lower threshold is surpassed by output voltage, or it set the duty cycle to 0 if output voltage is above the higher threshold, Fig. 3.c. At the same time, the auxiliary converter injects current to the output if output voltage is below the lower threshold or it takes the current out from the output if output voltage is above the higher threshold, Fig. 3.e. Therefore, the auxiliary converter forces the output voltage to be within the thresholds, Fig. 3.b.
It can be noticed how both, the time in which the output voltage is kept out the threshold band (tR, recovery time) and the output voltage variation (∆Vomax) are drastically reduced in the FRDB converter. This is due to the extra current delivered by the auxiliary converter to the output and the used LnL control. Therefore, the transient response obtained in the new supply is much faster.
tR
It is important to emphasize that the non-linear control and the linear control are independent. So, instabilities are not produced when output voltage returns into the threshold band and the linear control has to regulate the converter again. This is the main idea of the LnL control, to choose the output signal of two independent controls, so instabilities are avoided, and on the contrary a better stability of the whole system is obtained. IV.
∆Vo IO IM IA
EXPERIMENTAL RESULTS
In order to check the features of the FRDB, four prototypes have been designed and built according to the specifications show in table 1: •
A conventional Buck Converter with linear control: BL.
•
A Buck converter with Linear-Non-Linear control: BLnL.
•
Two Buck converters connected in parallel, in which the auxiliary converter is connected when the output voltage goes out the threshold band but, unlike the FRDB, the switches are driver by means of a linear control: BBL, and,
•
Figure 5. BL: Typical Buck converter with linear control, under a 16A load current step. Ch1: ∆Vo, output voltage ripple (100 mV/div, AC coupling). Ch2: Io, load current (20 A/div). Ch3: IM, Output Current of the Main Buck Converter (20 A/div). Ch4: IA, Output Current of the Auxiliary Buck Converter (20 A/div). Time base 200 µs/div.
∆Vo
Two Buck converters connected in parallel with LinearNon-Linear Control: FRDB.
TABLE I.
IO
: THE MAIN DESIGN PARAMETERS OF THE PROTOTYPES.
SWITCHING FREQUENCY MAIN INDUCTANCE (LM) AUXILIARY INDUCTANCE (LA)
250 kHz 7 µH 0.63 µH
OUTPUT CAPACITOR (C)
10000 µF 5V 1.5 V 16A
INPUT VOLTAGE OUTPUT VOLTAGE MAXIMUM LOAD CURRENT STEP
IM IA
Figure 6. FRDB converter under a 16A load current step. Ch1: ∆Vo, output voltage ripple (100 mV/div, AC coupling). Ch2: Io, load current (20 A/div). Ch3: IM, Output Current of the Main Buck Converter (20 A/div). Ch4: IA, Output Current of the Auxiliary Buck Converter (20 A/div). Time base 200 µs/div.
The four power supplies have been tested and compared under the same conditions, and the same main buck converter
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current of the main Buck converter (IM), and the output current of the auxiliary Buck converter (IA).
∆Vo
Figures 9 through 11 show the response of the converters under a 16A positive load current step and, figures 12 to 14 the response under a 16A negative load current step.
IO
By means of these figures four parameters can be compared: the recovery time in the ∆Vo waveform, the saturation (set to 0 or to 1) of the signal control in the VGS waveform, the current slew rate of the main converter in the IM waveform, and the current provides by the auxiliary converter in the IA waveform.
IM IA
tR ≈ 147µs
Figure 7. BLnL: Buck converter with LnL control under a 16A load current step. Ch1: ∆Vo, output voltage ripple (100 mV/div, AC coupling). Ch2: Io, load current (20 A/div). Ch3: IM, Output Current of the Main Buck Converter (20 A/div). Ch4: IA, Output Current of the Auxiliary Buck Converter (20 A/div). Time base 200 µs/div.
± 30 mV
∆Vo VGS
IM
∆Vo
IA
IO Figure 9. BL: ouput voltage recovery time under a 16A positive load current step. Ch1: ∆Vo, output voltage ripple (100 mV/div, AC coupling). Ch2: VGS, MOSFET MMd (20 V/div). Ch3: IM, Output Current of the Main Buck Converter (20 A/div). Ch4: IA, Output Current of the Auxiliary Buck Converter (20 A/div). Time base 50 µs/div.
IM IA
tR ≈ 4µs
Figure 8. BBL: two Buck conerters with linear control under a 16A load current step. Ch1: ∆Vo, output voltage ripple (100 mV/div, AC coupling). Ch2: Io, load current (20 A/div). Ch3: IM, Output Current of the Main Buck Converter (20 A/div). Ch4: IA, Output Current of the Auxiliary Buck Converter (20 A/div). Time base 200 µs/div.
± 30 mV
∆Vo VGS
Figures 5 to 8 show the influence of the Linear-Non-Linear control in comparison with the Linear control. It can be seen in Fig. 5 and Fig. 7, that the current slew rate of the main converter (IM) is higher using LnL control than using linear control. Also, by means of Fig. 6 and Fig. 8, it is possible to see that the current provided by auxiliary converter (IA) as well as its operation time are drastically reduced using LnL control.
IM IA
Figure 10. BBL: ouput voltage recovery time under a 16A positive load current step. Ch1: ∆Vo, output voltage ripple (100 mV/div, AC coupling). Ch2: VGS, MOSFET MMd (20 V/div). Ch3: IM, Output Current of the Main Buck Converter (20 A/div). Ch4: IA, Output Current of the Auxiliary Buck Converter (20 A/div). Time base 50 µs/div.
B. Output Voltage Recovery Time and Current Slew Rate Comparison. Figures 9 to 14 show, in detail, the transient response of the built converters. In these figures, four waveform can be seen, the output voltage ripple (∆Vo), the gate-source voltage applied to the forward switch, MMd, in main converter (VGS), the output
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tR ≈ 4µs
tR ≈ 15µs ± 30 mV
± 30 mV
∆Vo
VGS
VGS
IM
IM
IA
IA
Figure 13. BBL: ouput voltage recovery time under a 16A negative load current step. Ch1: ∆Vo, output voltage ripple (100 mV/div, AC coupling). Ch2: VGS, MOSFET MMd (20 V/div). Ch3: IM, Output Current of the Main Buck Converter (20 A/div). Ch4: IA, Output Current of the Auxiliary Buck Converter (20 A/div). Time base 50 µs/div.
Figure 11. FRDB: ouput voltage recovery time under a 16A positive load current step. Ch1: ∆Vo, output voltage ripple (100 mV/div, AC coupling). Ch2: VGS, MOSFET MMd (20 V/div). Ch3: IM, Output Current of the Main Buck Converter (20 A/div). Ch4: IA, Output Current of the Auxiliary Buck Converter (20 A/div). Time base 50 µs/div.
tR ≈ 15µs
It can to be noticed, that the recovery time is drastically reduced using two buck converters connected in parallel, as it is proposed. This time is reduced form 147 µs to 4 µs. Furthermore, fig. 11 shows how the LnL control saturates the duty cycle to 1, when the output voltage go below the lower threshold, and the saturation is maintained until the output voltage go back the threshold band. This saturation allows getting the highest current slew rate that the main converter can present. Finally, comparing the fig. 10 and 11, an important reduction of the current and the energy provided by the auxiliary converter is got, by applying the LnL control. tR ≈ 175µs
± 30 mV
∆Vo
± 30 mV
∆Vo VGS IM IA
∆Vo
Figure 14. FRDB: ouput voltage recovery time under a 16A negative load current step. Ch1: ∆Vo, output voltage ripple (100 mV/div, AC coupling). Ch2: VGS, MOSFET MMd (20 V/div). Ch3: IM, Output Current of the Main Buck Converter (20 A/div). Ch4: IA, Output Current of the Auxiliary Buck Converter (20 A/div). Time base 50 µs/div.
VGS IM
Figures 12 to 14 show similar conclusions to the previous ones. But in this case, as a difference, the LnL control saturates the signal control VGS to 0, when the output voltage goes above the higher threshold. Also, the reduction obtained in the recovery time has been drastic, from 175 µs to 15 µs.
IA
It is important taking into account, that the FRDB, thanks to the LnL control, keeps a fast response independently the amplitude of the load current step, whenever the output voltage goes out the threshold band, unlike the buck converter with linear control in which its response is very dependently the load current step and the regulator gain.
Figure 12. BL: ouput voltage recovery time under a 16A negative load current step. Ch1: ∆Vo, output voltage ripple (100 mV/div, AC coupling). Ch2: VGS, MOSFET MMd (20 V/div). Ch3: IM, Output Current of the Main Buck Converter (20 A/div). Ch4: IA, Output Current of the Auxiliary Buck Converter (20 A/div). Time base 50 µs/div.
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C. Efficiency. Finally, the efficiency of the prototypes as a function of the frequency of the applied load current steps is shown in Fig. 15.
ACKNOWLEDGMENT This work has been supported by the Ministry of Science and Technology (Spain) by means of the research project ALDIRA (Code of PN: DPI2001-0748).
In this figure is more important the relative efficiencies relation than the absolute values. This is due to the fact that, the used measurement equipment has limited its bandwidth to 50 kHz, therefore for higher frequencies the error in the measurement is also higher.
REFERENCES [1]
Xunwei Zhou, Pit-Leong Wong, Peng Xu, Fred C. Lee and Alex Q. Huang, “Investigatión of candidate VRM topologies for future microprocessor”, IEEE Trans. on Power Electronics. Vol 15, No 6, pp1172 – 1182, 2000. [2] Jia Wei, Peng Xu, Ho-Pu Wu, Fred C. Lee, Kaiwei Yao, Mao Ye, “Comparison of Three Topology Candidates for 12V VRM”, APEC’01, pp. 245-251, 2001. [3] R. Vázquez, A. Barrado, E. Olías, A. Lázaro, “Theoretical Study and Implementation of A High Dynamic Performance, High Efficiency and Low Voltage Hybrid Power Supply”, PESC’01, pp. 1517-1522, 2001. [4] Franki N.K. Poon, Chi K. Tse and Joe C. P. Liu, “Very Fast Transient Voltage Regulators Based on Load Correction”, PESC’99, pp. 66-71, 1999. [5] D.Briggs, R.Martinez, R.Miftakhutdinov and D.Skelton,” A fast efficient synchronous-buck controller for microprocessor power supplies”. HFPC'98. Pp. 182-189. 1998 [6] R. Martinez, R. Miftakhutdinov, D. Skelton, “A synchronous buck Converter with Modified Hysteretic-Mode Control Inveriable from Output filter characteristics”. Proc. of High Frequency Power Conversion Conference. Pp. 146-154. 2000 [7] Rais Miftakhutdinov “An Analytical Comparison of Alternative Control Techinques for Powering Next-Generation Microprocessors” Unitrode Products from Texas Instruments,” Power Supply Desing Seminar”. 2001 [8] Xunwei Zhou, Pit-Leong Wong, Peng Xu, Fred C. Lee and Alex Q. Huang, “Investigatión of candidate VRM topologies for future microprocessor”, IEEE Trans. on Power Electronics. Vol 15, No 6, pp1172 – 1182, 2000. [9] Jia Wei, Peng Xu, Ho-Pu Wu, Fred C. Lee, Kaiwei Yao, Mao Ye, “Comparison of Three Topology Candidates for 12V VRM”, APEC’01, pp. 245-251, 2001. [10] R. Vázquez, A. Barrado, E. Olías, A. Lázaro, “Theoretical Study and Implementation of A High Dynamic Performance, High Efficiency and Low Voltage Hybrid Power Supply”, PESC’01, pp. 1517-1522, 2001. [11] A.Barrado, R. Vázquez, E. Olías, A. Lázaro, J. Pleite. “Fast Transient Response In Hybrid Sources with Combined Linear-Non-Linear Control”, pp. 1599-1604, PESC’02, 2002. [12] A. Barrado, R. Vázquez, A. Lázaro, J. Pleite, E. Olías. Fast Transient Response with Combined Linear-Non Linear Control applied to Buck Converters. 32th Power Electronics Specialists Conference, PESC ’02, pp.1587-1592, 2002.
In any cases, it can be seen that the buck converter with linear-non-linear control presents the best efficiency, even higher than buck converter with linear control. This is due, because the BLnL converter presents lower switching power loses when the duty cycle is saturated. On the contrary, the BBL converter has shown the worst efficiencies. BL
BLnL
BBL
FRDB
95.00
EFFICENCY(%)
90.00
85.00
80.00
75.00
70.00 10
100
500
1000
5000 10000 30000 50000
FREQUENCY(Hz) Figure 15. Efficiency of the prototypes as a function of the frequency of the applied load current steps.
However, with the utilization of the LnL control in the FRDB the differences among efficiencies respect to the typical buck converter solution have been meaningful reduced. Therefore, from this point of view, the converters with Linear-Non-Linear present a better efficiency than the same converters using linear control, besides improving its transient response. V.
CONCLUSIONS
The new FRDB converter is composed of two buck converters connected in parallel controlled by the new LnL control. This solution reduces significantly the recovery time (tR) and variation of the output voltage (∆Vomax) in comparison with a classical power supply when a load current step has been demanded. Furthermore, this new alternative allows reducing the operation switching frequency and as consequence the EMI and the switching losses. Other parameters such as the stability and the output voltage ripple are kept, but improving the transient response.
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