Novel Family of Modified qZS Buck-Boost Multilevel Inverters with Reduced Switch Count Oleksandr Husev1,4, Ryszard Strzelecki2, Frede Blaabjerg3,1, Vasiliy Chopyk5, Dmitri Vinnikov1 Tallinn University of Technology (Estonia)1, ITMO University, (Russia), Warsaw Electrotechnical Institute (Poland) and Gdynia Maritime University (Poland)2 Aalborg University (Denmark)3 Chernihiv National University of Technology (Ukraine)4 Institute of Electrodynamics of NASU (Ukraine)5
[email protected],
[email protected] The single-stage buck-boost multilevel inverter was proposed in [16] as a logical extension of the two-level inverter and the ZSI. The combination of any impedance source networks with multilevel or cascaded inverters gives single-stage energy conversion with the buck-boost capability. By the introduction of a high-frequency transformer and two additional capacitors, the Z-source Neutral-PointClamped (NPC) inverter with a single impedance-source network could be supplied from a single dc source [17]-[20]. Moreover, by a transformer with turns ratio different from 1:1, an input voltage gain higher than that with the traditional Z-source network could be achieved. Many works are devoted to the comprehensive study of the multilevel ZSIs [21]-[29]. Reference [30] contains a comprehensive study of the Trans-Z-source and Γ-source NPC inverters. The discontinuous input current during the boost conversion mode is a common drawback of the abovementioned solutions. It could have negative influence on the input voltage source, especially in the RESs.
Abstract— This paper describes a novel family of modified quasi-Z-source buck-boost multilevel inverters with reduced switch count. The inverters are derived by means of the modified inverter configuration with quasi-Z-source networks. The main benefits of the proposed solutions lie in the increased amount of levels with all possible sequences: reduced THD, reduced voltage stress on the transistors and size of the output filter. Also their modulation techniques are proposed and described. Simulation results have confirmed all theoretical predictions. The pros and cons are discussed in the conclusions.
I.
INTRODUCTION
Recent solutions based on the impedance networks are applied in various fields. Z-Source Inverters (ZSIs) and quasi-Z-Source Inverters (qZSIs) were proposed for low voltage energy sources grid integration in [1], [2]. ZSIs overcome some of the limitations of the conventional gridconnected inverters: they have a buck, a boost and also an inversion function, and thus do not suffer from ShootThrough (ST) states. ZSI and qZSI topologies utilize the cross-conduction states to boost the input dc-voltage by switching on both the top and bottom switches of at least one inverter branch. The main advantage of the qZSI which is shown in Fig. 1a compared to the ZSI is continuous input current from the input source, moreover it shares a common ground with a dc-source, which is suitable for Renewable Energy Systems (RESs) and other applications [3]-[11]. These inverters are capable of performing Maximum Power Point Tracking (MPPT) with no need for an extra dc-dc converter. At the same time, a novel trend in power electronics lies in the modular and multilevel converter applications. Multilevel converters have major advantages over the conventional and well-known two-level converters. These advantages consist in the improvements of the output power quality and a larger nominal power in the converter [12][15]. Today’s multilevel converters are a good solution for low power and low voltage applications as well. Reduced voltage stress allows using fast MOSFET semiconductors in industrially verified Si technologies. The disadvantages lie in the increased amount of semiconductors and drive circuits. 978-1-4799-6300-3/15/$31.00 ©2015 IEEE
C1 L1
L2
D1
T1
T3
T2
T4
C2
VIN
VAB
(a) =
= C1 L1
L2
D01
D1 T1 T5 D2
C2 VIN
T2 T6 VAB
0 D3
C3 L3
T3 T7
D02
L4 C4
D4 T4 T8
(b)
Fig. 1. Two-level (a) and three-level (b) NPC qZSIs.
98
capacitor C2. Branch B is in charge to ST generation. Branch A operates in the traditional VSI mode where ST states are forbidden.
Several papers cover comprehensive studies of ThreeLevel (3L) NPC qZSI [31]-[33]. The proposed solution combines the above-mentioned advantages along with continuous input current. Fig. 1b illustrates the 3L NPC qZSI. At the same time, the solutions discussed have hidden capabilities of the output quality improvement. This paper presents several novel solutions with increased inverter voltage levels derived by means of a non-standard inverter configuration. Also their modulation is explained and simulation results are provided. II.
TABLE I. SWITCHING STATES FOR SINGLE-PHASE SYMMETRICAL MQZSI N 1 2 3 4 5 6 7
NOVEL SINGLE-PHASE QZS-BASED TOPOLOGIES
L1
N 1 2 3 4 5 6 7
VAB T2
L3
D2
Branch A T1
Branch B T3 VAB T4
TABLE II. SWITCHING STATES FOR A SINGLE-PHASE ASYMMETRICAL MQZSI
T3
C2
L2
Also, the forbidden states are illustrated in Table II. It is evident that branch A works in the traditional VSI mode that applies a restriction on the switching states.
Branch A
VIN
C1 D1
Fig. 3. Single-phase asymmetrical MqZSI.
Branch B
T1
Voltage level VAB VC3+VC2 VC3 VC2/2 -VC2/2 - VC1 -( VC1+VC2) Forbidden state
T2
C1 L2
T4 1 1 1 1 0 0 x
C2
VIN
It is evident that due to the symmetric structure symmetric six levels of the inverter voltage can be derived. These levels are summarized in Table I. It should be noted that the traditional classification of the number of levels per branch is not useful since the inverter has a modified configuration.
D1
T3 0 0 1 1 1 1 x
qZS Network
A. General description
L1
T2 0 1 0 1 0 1 1
Table II shows all the possible levels of the inverter voltage. It has four levels instead of three in the traditional FB configuration. At the same time, the positive and the negative levels are different. The ST states are outlined in Table II.
The first proposed single-phase converter is a Modified qZSI (MqZSI) which is described in Fig. 2. It is based on the Full-Bridge (FB) inverter and two symmetric qZS networks. Branch A is connected in parallel with the capacitor C2, while branch B is connected to the positive terminal of the capacitor C1 and the negative terminal of the capacitor C3. Branch B is in response to the ST generation. Branch A operates in the traditional VSI mode where the ST state is forbidden.
qZS Network 1
T1 1 0 1 0 1 0 1
T4
T1 1 0 1 0 1 0 1
T2 0 1 0 1 0 1 1
T3 0 0 1 1 1 1 x
T4 1 1 1 1 0 0 x
Voltage level VAB VC2 0 VC2 0 - VC1 -( VC1+VC2) Forbidden state
L4
Fig. 4 illustrates the proposed modulation technique for both solutions described as well as the inverter voltage VAB. Reference signal Ref A is in response to branch A voltage generation. Modulation index MA can vary from 0 up to 1. Reference signal Ref B is in response to branch B voltage generation. Modulation index MB can vary from 0 up to 1-DS. Carrier signal Carrier1 is in response to switching generation. The simple example of T1 and T3 transistor switching is also illustrated in Fig. 4. ST generation is performed by means of two envelope lines 1-DS, DS-1 and signal Carrier1. Finally, Fig. 4 shows the inverter voltage VAB for both topologies. It can be seen that the inverter voltage has six levels in the first case and four levels in the second case. The low switching index was chosen in order to demonstrate the operation principle. In
C3 qZS Network 2 Fig. 2. Single-phase symmetric MqZSI.
Analysis of Table I reveals that there is no zero voltage level. The smallest inverter voltage level corresponds to the ST states. The overall amount of levels is six, which is larger than in the traditional FB solution. At the same time, ST immunity is lost in such topology since branch A works in the Voltage Source Inverter (VSI) mode. The second single-phase solution is illustrated in Fig. 3. It has a single qZS network and one FB in the non-standard configuration. Branch A is connected in parallel with the capacitor C2 while branch B is connected to the positive terminal of capacitor C1 and the negative terminal of the 99
conclusion, a symmetrical case has three levels while an asymmetrical has only one. Moreover, in the asymmetrical case the positive and the negative voltage waveform are formed by different set of levels. Ref B
Ref A 1-Ds
1⎛ ⎛ 2π ⋅ f 0 ⋅ i ⎞ ⎞ ⎜⎜ 1 − (1 − DS ) ⋅ sin⎜ ⎟ ⎟⎟ , 4⎝ N ⎝ ⎠⎠
(5)
t2 = i +
1⎛ ⎛ 2π ⋅ f 0 ⋅ i ⎞ ⎞ ⎜⎜ 1 + (1 − DS ) ⋅ sin⎜ ⎟ ⎟⎟ , 4⎝ N ⎝ ⎠⎠
(6)
t3 = i +
1⎛ ⎛ 2π ⋅ f 0 ⋅ i ⎞ ⎞ ⎜⎜ 1 + sin⎜ ⎟ ⎟⎟ , 4⎝ N ⎝ ⎠⎠
(7)
t4 = i +
1 1⎛ ⎛ 2π ⋅ f 0 ⋅ i ⎞ ⎞ + ⎜⎜ 1 − sin⎜ ⎟ ⎟⎟ , 2 4⎝ N ⎝ ⎠⎠
(8)
Carrier1 0 Ds-1 -1 T3
1 1⎛ ⎛ 2π ⋅ f0 ⋅ i ⎞ ⎞ + ⎜ 1 − (1 − DS ) ⋅ sin⎜ ⎟ ⎟⎟ , (9) 2 4 ⎜⎝ N ⎝ ⎠⎠ 3 1 ⎛ 2π ⋅ f 0 ⋅ i ⎞ t6 = i + + (1 − DS ) ⋅ sin⎜ (10) ⎟. 4 4 N ⎝ ⎠ t5 = i +
T1
symmetrical MqZSI
VAB 1
1-Ds Ref A Ref* A
Carrier1
0
VAB t2
t1
VABi
t4
t5
t6
i+1
asymmetrical qZS inverter
Fig. 4. Modulation technique for single-phase qZS-based asymmetrical and symmetrical inverters.
B. Analytical comparison of inverter voltage quality
t3
traditional 2L qZS inverter
i
VABi VC2
It is evident that due to the larger amount of voltage levels the quality of the output voltage will be better. Let’s compare the inverter voltage spectrum for a traditional qZS solution (Fig. 1a) and asymmetrical MqZS solution depicted in Fig. 3. Fig. 5 illustrates the inverter voltage VABi for only one switching period in both cases. Fig. 5a shows the positive inverter voltage generation while Fig. 5b shows the negative voltage generation. It can be seen that in the case of the asymmetrical qZS inverter, the shape of the positive and the negative inverter voltage is different. At the same time, reference voltages RefA(i), Ref*A(i), RefB(i) are assumed constant for each i time interval: ⎛ 2π ⋅ f 0 ⋅ i ⎞ Re fA(i ) = sin ⎜ (1) ⎟, N ⎝ ⎠
(a) 1
1-Ds
0
-1
Ref B
Carrier1
Ref* A Ref A Ds-1 i t1 t2 t3
t5
t4
t6
t7
i+1
-(VC1+VC2)
traditional 2L qZSI
VABi
⎛ 2π ⋅ f 0 ⋅ i ⎞ (2) Re f * A( i ) = sin ⎜ ⎟ ⋅ (1 − D S ) , N ⎝ ⎠ ⎛ 2π ⋅ f 0 ⋅ i ⎞ (3) Re fB ( i ) = − sin ⎜ ⎟ ⋅ (1 − D S ) . N ⎝ ⎠ where f0 is a fundamental frequency, N is the number of switching cycles in the fundamental period. As a result, the switching frequency can be expressed as: (4) f SW = N ⋅ f 0 , The inverter voltage VAB can be expressed as a function of each time switching interval i because the duration of the time intervals shown in Fig. 5 strictly depends on i. For instance, in the case of the positive inverter voltage generation:
-(VC1+VC2)
VC2
VABi
-VC1
-(VC1+VC2)
-1
VC1+VC2
-VC1
asymmetrical MqZSI
VC2
Ref B Ds-1
asymmetrical MqZSI
1
t1 = i +
(b) Fig. 5. Modulation technique for single-phase qZS-based asymmetrical and symmetrical inverters: positive inverter voltage generation (a) and negative inverter voltage generation (b).
Similar equations can be derived for the negative voltage generation from Fig. 5b. Each time interval corresponds to 100
some constant voltage that is defined by the voltage across the capacitors. It is well known that [2]: DS VC 1 = ⋅ VIN , (11) 1 − 2 DS
Fig. 6 shows the simulation results of the single-phase symmetrical MqZS. All the used parameters are in Table IV.
1 − DS ⋅ VIN . (12) 1 − 2 DS Finally, in order to estimate the inverter voltage harmonics, Fourier coefficients can be calculated: VC 2 =
ak = bk =
1
π 1
π
1 N ⋅ f0
N
⋅
∑∫ i =1 N
⋅
0
∑∫ i =1
1 N ⋅ f0
0
V ABi ( t ) cos (2π ⋅ f 0 ⋅ N ⋅ k ⋅ t ) ⋅ dt ,
(13)
V ABi ( t ) sin (2π ⋅ f 0 ⋅ N ⋅ k ⋅ t ) ⋅ dt ,
(14)
VOUT
200 V/div
VAB
where k=1, 2...∞ is the number of switching harmonics. Taking into account the equations presented above, the calculation of the Fourier coefficients (13), (14) is performed by means of Maple software. Table III shows the first 10 harmonics multiples of the fundamental harmonics of the VAB voltage for both cases.
1 2 3 4 5 6 7 8 9 10
Traditional qZSI (% of fundamental) 0 64 0 5 0 2 0 5 0 3
VIN 50 V/div 5 A/div IIN
Asymmetrical MqZSI (% of fundamental) 1 27 10 6 8 1 4 1 0 3
1.95
1.96
1.97
1.98
1.99
Fig. 6. Simulation results of the single-phase symmetrical MqZSI.
An output LC-filter (Lf, Cf) was used in order to derive a pure sinusoidal voltage. The input current has Continuous Current Mode (CCM) and high switching and low 100 Hz ripple duo to 50 Hz ac output. Fig. 7 shows the simulation results of the single-phase asymmetrical MqZSI. The RMS value of the output voltage VOUT is equal to 230 V. It can be seen that the inverter voltage VAB is identical to what is expected.
It should be noted that harmonic spectrum strictly depends on the ST duty cycle DS. Table III corresponds to DS=0.25 and the switching frequency 10 kHz. In the case of ST duty cycle reduction, the difference of the harmonic spectrum will be eliminated. It is evident that an asymmetrical structure has a better harmonic spectrum due to the larger amount of inverter voltage levels.
VOUT
200 V/div
VC2
C. Simulation results
PSim software has been used for time domain simulation. Table IV summarizes the simulation parameters used for all case studies.
-VC1
TABLE IV. SIMULATION PARAMETERS Parameter P VIN VOUT DS Switching frequency L1 (L2) C1, C2, (C3, C4) Lf Cf
-VC2/2
200 V/div
TABLE III. HARMONIC SPECTRUM OF TWO CONVERTERS: TRADITIONAL QZSI AND ASYMMETRICAL MQZSI k
VC2+VC3
-VC1,VC3
VAB -(VC1+VC2)
200 V/div
Value 1300 W 225 V dc 230 V ac 0.25 10 kHz 1 mH 1 mF 1 mH 10 µF
VIN 50 V/div 5 A/div IIN
1.95
1.96
1.97
1.98
1.99
Fig. 7. Simulation results of the single-phase asymmetrical MqZSI .
101
connected to the positive terminal of the capacitor C1 and the negative terminal of the capacitor C4. Branch B is carrying out ST generation. Branch A operates in the traditional VSI mode, where the ST states are forbidden. Fig. 10 shows the proposed modulation technique. Table V shows all the possible levels of the inverter voltage. It has nine levels instead of five in the traditional 3L (3 level per single branch) NPC configuration. At the same time, the positive and the negative levels are different. ST states are also illustrated in Table V.
It should be noted that the positive and the negative halfcycles of the sinusoidal voltage are created by different voltage levels, which is explained by means of an asymmetrical qZS network. The main difference lies in the asymmetrical voltage VAB. A high frequency ripple is smaller due to the double amount of the passive components. It should be noted, that some middle harmonics are present in the input current spectrum, which is also explained by means of an asymmetrical structure. All simulation results confirm theoretically expected results. Finally, Fast Fourier Transform (FFT) analysis was performed in order to estimate the inverter voltage spectrum (Fig. 8). It can be seen, that it correlates with the results obtained analytically. An absolute value of the harmonics differs by not more than 30 %. Also, it can be seen that no multiple harmonics are present in the spectrum of the traditional topology.
qZS Network 1 L1
VAB
L2
D2
C2
T2
0
THD: 83%
D3
C3
D4
250
D02
L3 150
C4
50 0
T3 T4
T6 VAB T7 T8
L4
qZS Network 2 0
20
40
60
80
Fig. 9. Single-phase NPC MqZSI.
100
Frequency (kHz)
TABLE V. SWITCHING STATES FOR A SINGLE-PHASE NPC MQZSI
(a) 350
VAB
N 1 2 3 4 5 6 7 8 9 10 11 12
THD: 71%
250 150 50 0 0
20
40
60
80
100
Frequency (kHz) (b)
Fig. 8. Harmonic spectrum of the traditional qZSI (a) (Fig. 6) and asymmetrical MqZSI (b) (Fig. 7).
T1 1 0 1 0 0 1 0 0 0 1 0 0
T2 1 1 1 0 1 1 0 1 0 1 1 0
T5 0 0 0 0 0 1 0 1 1 1 1 1
T6 0 0 1 0 1 1 1 1 1 1 1 1
Voltage level VAB VC2+VC3 +VC4 VC3 +VC4 VC2 VC4 0 - VC1 -VC3 -( VC1+VC2) -( VC1+VC2 +VC3) VC2 0 -VC3
Fig. 10 illustrates the proposed modulation technique for a single-phase NPC solution. Reference signal Ref A is in charge of branch A voltage generation. Modulation index MA can vary from 0 up to 1. Reference signal Ref B is in response to branch B voltage generation. Modulation index MB can vary from 0 up to 1DS. Carrier signals Carrier1 and Carrier2 are responsible for switching generation. A simple example of switching of T1, T2 and T5, T6 is illustrated in Fig. 10. Fig. 10 shows the inverter voltage VAB where the inverter voltage has only five levels. The reason is the selected modulation technique, where the reference signals are shifted by 1800. At the same time, intermediate levels will appear in the case of phase shifting, which differs by 1800. Another solution is to use Space Vector Modulation (SVM). It is more complex, but it will allow all available voltage levels to be involved.
It should be noted that the Total Harmonic Distortion (THD) of the inverter voltage was almost similar in the case of the traditional qZSI and the asymmetrical MqZSI (83 % and 81 % correspondingly), and significantly smaller in the symmetrical MqZSI (71 %) case. III.
Branch B Branch A T5 D T1 1
VIN 350
C1
D01
SINGLE-PHASE NEUTRAL-POINT-CLAMPED SOLUTIONS
This section presents a single-phase NPC MqZSI which is illustrated in Fig. 9. A. General description
The single-phase NPC MqZSI has two qZS networks and one single-phase NPC inverter. First branch A is connected in parallel with the capacitors C2 and C3 while branch B is 102
1
IV.
Ref A
Ref B
THREE-PHASE NEUTRAL-POINT-CLAMPED SOLUTIONS
1-Ds Carrier1
This section presents a three-phase NPC solution depicted in Fig. 12. It has two symmetrical qZS networks and three NPC branches connected to the split point between capacitors C2 and C3. Only branch C is in response to ST generation. Branches A and B operate in the traditional VSI mode where the ST states are forbidden. A. General description
0 Ds-1 Carrier2
-1 T5 T6
Each branch has three levels of the inverter voltage, but at the same time, the levels are different for the ST and the non-ST generation branches.
T1 T2
qZS Network 1 VAB
L1
C1
D01
Branch B Branch C T9 Branch A T1 T5 D1 D2
L2
VC2 -VC3
C2
-(VC1+VC2+VC3)
VIN
D3
0
T2 T6 T10 VA0
D4 T 3
Fig. 10. Modulation technique for a single-phase NPC MqZSI.
C3
B. Simulation results
L3
Fig. 11 shows the simulation results. The voltage VAB.is symmetrical and it corresponds to what is illustrated in Fig. 10.
D5 D6
D02 C4
L4
T7 T11
T4 T 8
VB0 VC0
T12
qZS Network 2 Fig. 12. Three-phase three-wire NPC MqZSI.
VOUT
The modulation technique used is shown in Fig. 13 and it corresponds to what is shown in Fig. 10. The only difference lies in the modulation indexes for the reference signals.
200 V/div
1
VC2+VC3+VC4 VAB
Ref B Ref C
Ref A 1-Ds Carrier1
VC2
0
-1
200 V/div
Ds-1 Carrier2
T9 T10
VIN
T1
50 V/div 5 A/div
T2
IIN
T5
1.95
1.96
1.97
1.98
1.99 T6
Fig. 11. Simulation results of the single-phase NPC MqZSI.
A comparison between the THD of the inverter voltage VAB and the topology in Fig. 1b reveals that the modified topology has 62% of THD versus 79% in the traditional solution.
Fig. 13. Modulation technique for a three-phase NPC MqZSI.
103
B. Simulation results
qZS Network 1
Fig. 14 shows the simulation results. It could be noted that the quality of the phase-to-neutral voltage VC is poorer compared to the voltages VA and VB. Phase-to-line inverter voltages VA0 and VC0 before the filter are shown separately. VC0 voltage corresponds to the ST generation branch and has higher peak voltage level (VC1+VC2). As a result, due to the less distorted voltages VA and VB in order to achieve equal output voltage quality, the output filter elements can be reduced in comparison to the voltage VC and traditional 3L NPC qZSI configuration. VA
VC
L1
C1
D01
Neutral Branch
L2
T13
D1 D2 D3
C2 VIN C3
D6 D7
D02 C4
VB
T14
T2 T6 T10 D4 D5 T 3 T 7 T 11
0
L3
T1 T5 T9
L4
VA0
T15
VB0 VC0 N
T4 T8 T12 D8
T16
qZS Network 2 Fig. 15. Three-phase four-wire NPC MqZSI.
Because of absence of ST generation in the active branches, the output voltage of all phases will have a better quality, which corresponds to the VSI mode.
200 V/div
VC2
V.
VA0
This paper describes several novel topologies of the multilevel buck-boost inverters with reduced switch count. All of them are derived by means of the modified inverter configuration. Several modulation techniques proposed allow provision of the sinusoidal output voltage, simulation results confirmed operation principles. The main benefits of the proposed solutions lie in the increased amount of levels with all possible sequences: reduced THD, reduced voltage stress on the transistors and size of the output filter. At the same time, the drawbacks are: increased conduction losses during the ST states generation, as well as lost cross conduction immunity of the inverter branches not involved in the ST states generation. Focus in future studies can be on the SVM control design and deep analytical estimation of the THD of the inverter voltage under different control strategies. Also, the guidelines for the passive elements’ design should be considered.
200 V/div
VC0
VC1+VC2
200 V/div
VIN 100 V/div 2.5 A/div IIN
1.96
1.97
1.98
1.99
CONCLUSIONS
ACKNOWLEDGEMENT This research work co-financed by Estonian Research Council grant PUT (PUT633), MOBILITAS Postdoctoral Research Grant (MJD391) and Estonian Ministry of Education and Research (project SF0140016s11). The authors are also grateful to Polish and Estonian Academies of Sciences for their support.
2
Fig. 14. Simulation diagrams of a three-phase NPC MqZSI.
Finally, Fig. 15 demonstrates a four-wire three-phase three-level NPC MqZSI. In such configuration, the fourth neutral branch is carrying out the ST state generation to balance the performance of an unbalanced load or non-active harmonics injection.
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