Paper Title (use style: paper title) - IJESC

ISSN XXXX XXXX © 2016 IJESC

Research Article

Volume 6 Issue No. 8

An Improved Method for Extracting Stray Inductance in IGBTS Dynamic Test Bench Samuel Bimenyimana 1 , Hongli Guan 2 , Qilong Wang3 Master’s student1, 2, 3 Hebei University of Technology, School of Electrical Engineering, China, Tianjin Abstract: Stray inductance of Press Pack IGBTs’ (PPIs) dynamic test bench has great influence on dynamic test results . Thus, the stray inductance needs to be measured and calculated accurately. Conventional method cannot extract stray inductance accurately due to existence of nonlinear resistance in current path. Hence, a new method is proposed in this paper to extract stray ind uctance based on turn-off transient waveform and a following turn-on transient waveform. In this method, it is assumed that capacitor voltage and load current are constant during turn-off transient and the follo wing turn-on transient, and then the stray inductance is extracted accurately by using gradients of both turn-off current and turn-on current at a given current value. This met hod eliminates the influence of nonlinear resistance in current path. To verify the proposed method , circuit simu lation is carried out by using Synopsys Saber; furthermore, a dynamic test bench is developed, stray inductance of the test bench is extracted under different voltage level. Simulat ion and measurement results prove the effectiveness of the new method. Keywords: Insulated gate bipolar transistors, electronic equip ment testing, inductance measurement . I.INTRODUCTION Press Pack IGBTs (PPIs) are increasingly used in the transmission and distribution field, due to advantageous features of a higher cycling and thermal capability and ideally suited for series connection[1]-[3]. To test new PPIs module and have a co mprehensive understanding of dynamic switching characteristics of PPIs under different working conditions are meaningful for application design; hence, a platform is needed to test dynamic characteristics of PPIs accurately [4]. Stray inductance of dynamic test bench is a key factor that affects dynamic characteristics of PPIs [5]-[6]. Thus, Dynamic parameters of Press Pack IGBT are tested with a special dynamic test bench, and usually the value of stray inductance of the test bench is given. For instance, datasheets of PPIs wh ich produced by Westcode Corporation indicate that dynamic parameters are ext racted under specified condition; the stray inductance of dynamic test bench is 200n H. Meanwhile, datasheets of StakPak IGBT of ABB Corporation also specify the stray inductance of dynamic test bench is 200nH. Parasitic inductance of test bench exist in power device modules, capacitor, cop per interconnects, and busbars, etc. Much research effort has been reported on methods of extracting stray inductances and these methods can be divided into two categories. One is to extract parasitic inductance of each component separately by using mathematical co mputation or simulat ion approaches, which based on three-dimensional (3-D) finite element analysis[7]-[9] or part ial element equivalent circuit (PEEC) method [10]-[13]. In addition, parasitic inductance of each part can be extracted by impedance analyzer [14]-[15], time domain reflecto metry [16] or by using an extra oscillating circuit [17]. However, methods mentioned above can extract parasitic inductance of each part accurately, but mutual inductance between each part is ignored. Hence, ext ractin g separately is inappropriate in identify total stray inductance of test bench.

International Journal of Engineering Science and Computing, August 2016

Another way to extract stray inductance of test bench is to use voltage overshoot and current gradient, and then the stray inductance is extracted as a whole. This kind of method is proposed in [6] [18], called conventional method in this paper, using formula Lσ = |Δu |/|di/dt| to calculate the whole stray inductance in test bench. In [18], du is the overvoltage of IGBT; d i/dt is the maximu m IGBT co llector current rate of change at turn-off. However, this method is not accurate in calculating stray inductance, because voltage drop on resistances and freewheeling diode in current path cannot be ignored; besides, the maximu m co llector-emitter voltage does not necessarily occurs at the same time when current gradient reaches its maximu m. Hence, voltage difference du and current gradient di/dt need to be modified. Diode has forward voltage drop, and its resistance is nonlinear. Considering the influence of nonlinear resistances in current path, limitation of conventional method in calcu lating stray inductance is analyzed in this paper. Then, authors in this paper propose a new method to calculate stay inductance, which eliminates impacts of nonlinear resistances in current path. Simu lation circuits with/without loop resistance are built; and stray inductance is extracted and compared by using conventional method and the new method. Moreover, a test bench is developed; stray inductance is extracted in different voltage level, and effectiveness of the new method is discussed in the end. II.EXTRACTIO N O F STRAY

INDUCTANCE

BASED

ON

EXPERIMENT

Fig. 1 shows the schematic circuit of dynamic test bench. Stray inductance is extracted by using voltage and current waveforms of turn-o ff and turn-on. DUT (Dev ice under Test) in Fig. 1 is Press Pack IGBT under test, Diode is freewheeling diode.

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Lload iload

iload -ic

ic Diode

udc

uge

DUT

Fig.1 Schematic of test circuit A.Model of simplified freewheeling diode Mostly, high voltage high power d iode is pin diode [19], which means intrinsic reg ion is sandwiched between a P -type and N-type region, as shown in Fig. 2(a). Equivalent circu it model of forward-b iased pin diode is shown as Fig. 2(b); and Fig. 2(c) is the simplified equivalent circuit model of forward-biased pin diode. The simplify process is analyzed as follows. I

Lload

r1

Rs Cj

rc

(b )

udc

Ubi

Ubi ld

rd

l1

r2

l2

ic

lg

lc

N

(a)

iload

id=iload-ic

Rj

Ubi P

and inductance of copper interconnects between bus bar and anode terminal of freewheeling diode. Ubi is forward threshold voltage of p in diode, rd is equivalent resistance of diode, Ld is parasitic inductance inside diode module; r2 and L2 are resistance and inductance of copper interconnects between cathode terminal of freewheeling diode and collector terminal of IGBT. Current ic is collector current of IGBT under test, Uce is co llector-emitter voltage of IGBT, Uge is gate driver output voltage. r3 and L3 are resistance and inductance of copper interconnects between emitter terminal of IGBT and bus bar. re and le are emitter resistance and emitter inductance. Effects of mutual inductance between the various parts are all considered in the inductance of each copper interconnects. Then, voltage drop of each component in equivalent circuit during switching performance is depicted in Fig. 4.

uce

rg uge

r3

le

re

l3

Fig. 3 Equi valent circuit of dynamic test bench

R

iload

(c)

id  r1

Fig. 2 Model simplification. (a) Structure of pin di ode. (b) Equi valent circuit of forward-biased pin diode. (c) Simplified equi valent circuit of forward-biased pi n di ode. As shown in Fig. 2(b), Ubi is forward threshold voltage of pin diode and is considered to be a constant. Rj is forward resistance of intrinsic region, Cj is sum of junction capacitance and diffusion capacitance of forward -biased pin diode; Rs is series of body resistance of P-type region and Ntype region, and other contact resistances included. Therefore, when p in d iode is zero b ias or its bias current is small, R≈Rj; when pin diode bias current is very large, R≈Rs . Equivalent frequency of transient turn-on/off current of high power press pack IGBT is calculated using the formula [20]

f  1/ πt

(1)

Where f is the equivalent frequency and t, is the transient rise/fall time. Then, equivalent resistance of Cj is

1

C j



t 2C j

( 2)

As the capacitance of Cj is several pF, rise/fall t ime of switching current ranging from several hundred nanoseconds to several microseconds; according to (1), the equivalent resistance of Cj is much greater than R. As a consequence, in the conditions of low frequency and large forward -b iased current, equivalent circuit of pin diode can be simplified as shown in Fig. 2(c). But, the resistance of pin d iode is not linear during switching process, which means resistance of freewheeling diode in IGBT dynamic testing is not linear. B.Circu it analysis of dynamic test bench Using the simplified model of p in diode, the equivalent circuit of dynamic test bench is depicted in Fig. 3. As shown in Fig. 3, Udc is the noload voltage of capacitor, rc is the parasitic resistance of capacitor, Lc is the parasitic inductance of capacitor and bus bar. Lload is the load inductance; r1 and L1 are the resistance


lc 

l1

dic dt

ld 

U bi

id  rd

did dt

id=iload-ic

did dt

id  r2

did dt

ic

lg

ic  rc

udc

l2 

u ce

rg ic  r3

ld 

dic uge dt

ic  re

le 

dic dt

Fig. 4 Voltage distri bution in dynamic test bench Now according Kirchhoff's law, the following equations are always true whether DUT is turning on or turning off

did  id  r1  r2  rd   U bi dt di =uce  ic  re  r3  rc   (le  l3  lc )  c dt

udc   ld  l1  l2  

ic  id  iload

(3)

(4)

Designating the stray inductance of dynamic test bench is

Ls  ld  l1  l2  le  l3  lc

(5)

Then, in the switching off transient of DUT,

udcf  ioff  r1  r2  rd   U bi

 ucef  icf  r1  r2  r3  rc  rd  re   Ls 

dicf dt

(6)

Meanwhile, in the switching on transient of DUT,

udcr  ion  r1  r2  rd   U bi

 ucer  icr  r1  r2  r3  rc  rd  re   Ls 

dicr dt

(7)

Specifically, u dcf is the no-load voltage of capacitor when collector current of DUT is icf, the collector-emitter voltage is u cef and the load current is ioff in the same time. u dcr is the noload voltage of capacitor when collector current of DUT is

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icr, u cer is the collector-emitter voltage and ion is the load current at the very same time. C.Stray inductance calculation based on conventional method Usually, resistance in the circu it of dynamic test bench, forward threshold voltage of freewheeling d iode and nonlinear resistance of freewheeling diode are not considered when calculat ing stray inductance by conventional method. Therefore, stray inductance can be calculated by using turn off waveforms

Ls =

ucef -udcf dicf / dt

(8)

Also, it can be calculated by using turn-on waveforms

Ls =

udcr -ucer dicr / dt

(9)

Through this method, one can calculate the stray inductance by measuring only capacitor voltage, collectoremitter voltage and gradient of collector current of DUT. However, limitation of this method is that impacts of nonlinear loop resistance is ignored, causing a certain degree of error as a result. D.Novel method to calculate stray inductance of dynamic test bench According to (4) and (5), when certain conditions are satisfied, stray inductance of dynamic test bench can be calculated accurately by eliminating the impacts of loop resistance. Switching transient waveforms of voltage and current of DUT are measured, as shown in Fig. 5. Specifically, δt is time interval between two samples on Oscilloscope, t means testing time. Meanwhile, t f is corresponding to the time when collector current of DUT is i0 in turn-off process; t r is corresponding to the time when collector current of DUT is also i0 in turn-on process. Firstly, load of dynamic test bench is a large-value inductor, that is, if the time of switching off is short enough, the load current iload can be considered to be a constant. But it should be noted that the minimal off-time cannot be too short to turn-off the DUT. Secondly, large capacitance value of capacitor allo ws the voltage drop very small during switching off transient and switching on transient; therefore, it can be assumed that no-load voltages of capacitor at both time t f and t r are equivalent. Last and most important, for a given freewheeling diode, whether the diode current is rising or falling, the equivalent circuit of diode is the same when current through the diode of the same magnitude and direction. That is to say, equivalent circuits of d iode at time t r and t f are the same. 800

uce Uce

Uce& uce/V, ic/Aic

di   di Ls （U cef  U cer）/  cr  cf  dt   dt

Turn on

Advantage of this new method is that errors caused by nonlinear loop resistance are eliminated. III.METHO D COMPARISON BAS ED O N SIMULATION In this part, conventional method and new method are compared in calculating stray inductance based on circuit simu lation. A.Stray inductance ext racting based on conventional method IGBT switching characteristic is analyzed by using Synopsys Saber, model of IGBT derived fro m 1700V/ 75A IGBT ch ip of A BB Corporation; model of freewheeling diode derived fro m 2500V/ 108A Fast-Diode chip of ABB Corporation. 1.Stray inductance extract ing with zero loop resistance Fig. 6 shows the simulation circu it without considering the loop resistance. Capacitor voltage is 1000 V, simulat ion step is 0.3 ns; meanwhile, the simu lation step is limited to a range of 0.2 ns to 0.5 ns if step changes. Load inductance value is 800 μH, gate resistance is 20 Ω. Resistances in commutation loop are set to zero except freewheeling diode and DUT. Stray inductance in commutation loop is given 300 nH. Based on the simu lation circuit in Fig. 6, stray inductance is ext racted by using the switching waveforms. Fig. 7 shows the waveforms of collector-emitter voltage u ce and collector current ic. Turn-off waveforms are shown in Fig. 7(a), when u ce is 1514 V, the current gradient is 1.71 kA/μs calculated by CosmosScope, a component of Synopsys Saber software. According to (8), the stray inductance is calculated to be 300.6 nH. Turn-on waveforms are shown in Fig. 7(b), when u ce is 219.32 V, current gradient is 1.002 kA/μs. Then according to (9), the stray inductance is calculated to be 299.2 nH. Simu lation results indicate that, if the loop resistance in current path is zero, stray inductance extracted by conventional method is closed to true value; re lative deviation of calculated result is about 0.36%.

Ls

Lload

uc

+ _

Diode IGBT

Rg ug

Fig.6 Simulati on circui t wi thout resistance

400

1500

i0

200

udata1 ce(t) ic(t) data2

X: 62.7149 Y: 1514.3 100

20 3000

30 3500

t/μs t /t

40 4000

X: 62.7149 Y: 62.757

uce /V

tr

tf

50 4500

ic /A

1000

0

(10)

ic ic

Turn off

600

means ioff = ion ; no-load voltage of capacitor and load current show no change from t r to t f, wh ich means u dcf = u dcr; then one can calculate the stray inductance by solving (6) and (7)

50

500

Fig.5 S witchi ng waveforms 0 62.6 62.6

Based on the analysis above, it can be summarized that, magnitude of load currents equal at time t r and t f, which


62.65 62.65

62.7 62.7

62.75 62.75

62.8 62.8

0 62.85 62.85

tt/μs /s

（a）

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0 71.7 71.7

71.75 71.75

71.8 71.8 t/μs t/s

0 71.9 71.9

71.85 71.85

（b） Fig.7 S witching waveforms. (a)turn-off (b)turn-on waveforms.

waveforms.

2.St ray inductance extracting with the loop resistance considered To verify the resistance has a non-negligib le impact on stray inductance extracting, a simu lation circu it with loop resistance is given in Fig. 8. Co mpared to Fig. 6, the only difference between these two circuits is the inductor in series with a resistor in Fig. 8, the resistance is 1Ω. Simu lation results are shown in Fig. 9. According to the turn-off waveforms in Fig. 9(a) and (8), the stray inductance is calculated to be 293.3n H; wh ile the calcu lated result is 324.6 n H if using turn-on waveform in Fig. 9(b) and (9). Hence, stray inductance extracted by conventional method shows obvious deviation with true stray inductance when resistance exists in commutation loop. When extracting stray inductance by using turn-off waveform data, the deviation is -2.7%, a negative value indicates the calculated value is less than true value; the deviation is 14.9% when turn -on waveform data is used to extract stray inductance, a positive value indicates the calculated value is larger than true value. Therefore, conventional method has limitation in ext racting stray inductance when current path exist resistance and diode. Ls Lload Rs

uc

+ _

100

1500


1000

X: 62.7227 Y: 1469.35

X: 62.7177 Y: 1437.13 X: 62.7177 Y: 59.8059

50

X: 62.7227 Y: 51.3427

ic /A

ic /A

uce /V

X: 71.858 Y: 700.179 50

500

500

0 0 62.7 62.705 62.7 62.705 62.71 62.71 62.715 62.715 62.72 62.72 62.725 62.725 62.73 62.73 62.735 62.735 62.74 62.74 tt/μs /s

(a) 1500

100

udata1 ce(t) idata2 c(t)

X: 71.843 Y: 59.7725

X: 71.833 Y: 51.4599

1000

50 X: 71.833 Y: 707.445

500

0 71.8 71.8

71.81 71.81

71.82 71.82

71.83 71.83

ic /A

100

X: 71.858 Y: 76.8282

1000

B.Stray inductance ext racting based on new method Simu lation circuit is the same as depicted in Fig. 8, software settings keep the same, turn off/on waveforms are also the same as shown in Fig. 10. When turn-off and turn-on current are both 56A, careful high magnification observation of these switching waveforms are shown in Fig. 10, which also shows the results processed by Synopsys Saber software. When turn-off current is 56 A, co llector-emitter voltage is 1451.4 V, current gradient is - 1.6907 kA/μs; meanwh ile, when turn-on current is 56 A, co llector-emitter voltage is 694.72 V, current gradient is 0.83933 kA/μs, then the stray inductance is calculated to be 299.1 n H according (10). The deviation between calculation result and true value is about 0.3%, which means the method proposed in this paper can accurately extract the stray inductance in the commutation loop.

uce /V


uce /V

1500

X: 71.843 Y: 685.726

71.84 71.84 tt/μs /s

71.85 71.85

71.86 71.86

0 71.87 71.87

(b) Fig.10 Calcul ation of stray inductance based on s witching waveform. (a)turn-off waveforms, (b)turn-on waveforms

Diode IGBT

Rg ug

C.Co mparison of calculat ion result based on different methods Changing the resistance in current path, stray inductance is calculated based on conventional method and new method proposed in this paper. Still, stray inductance in simu lation circuit is 300 nH, relat ive erro r between calculating results and true value shows in table .1. According to the simu lation results in table 1, deviat ion of calculation results and true value increases along with the increasing loop resistance. While using the method proposed in this paper, deviation almost has no relationship with loop resistance. Based on the novel method, a test bench is developed, and stray inductance of PPIs dynamic test bench is measured and calculated. TABLE I Relative error based on different methods

Fig.8 Simulati on circui t wi th resistance 100


X: 62.7227 Y: 1469.35

uce /V

1000 50

X: 62.7227 Y: 51.3427

ic /A

1500

500

0

62.65 62.65

62.7 62.7

0 62.8 62.8

62.75 62.75

tt/μs /s

（a） 100 1500

udata1 ce(t) idata2 c(t)

X: 71.848 Y: 64.0914

0.5

1.0

1.5

2.0

2.5

3.0

turn-on

0.4

2.2

turn-off

3.2

8.2

4.2 10. 2

4.5 13. 9

7.4 18. 8

8.8 22. 6

turn on/off

0.3 0

0.3 0

0.2 3

0.7 6

0.0 7

0.2

50

Conventio nal method (%)

X: 71.848 Y: 675.095

500

0 71.65 71.65

ic /A

uce /V

1000

71.7 71.7

71.75 71.75

t/μs t/s

71.8 71.8

71.85 71.85

0 71.9 71.9

（b） Fig.9 S witching waveforms. (a)turn-off (b)turn-on waveforms.

waveforms.


New method (%)

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n

IV.EXTRACTION O F STRAY INDUCTANCE O F PPIS DYNAMIC TEST BENCH

A.Dynamic test bench Schemat ic of test circuit is shown in Fig. 1, the test circuit is realized in a power stack, see Fig. 11. The press pack IGBT is T0600TB45A (4.5kV/ 600A) produced by Westcode Corporation, clamp ing force is 20kN and relat ive erro r is 3%. Experiments are carried out at room temperature, d ischarge capacitor is a metal film capacitor, and its capacitance is 6000μF. Using the diode in IGBT module as a freewheeling diode; the IGBT module is DIM 800NSM33-A000 produced by DYNEX. Testing Oscilloscope is Tektronix DPO4104B, voltage probe for gate voltage measurement is TPP0500, t ime delay is 5.2ns; high voltage differential probe for collector-emitter voltage measurement is THDP0100, time delay is 16.7ns, current sensor is Rogowski coil, time delay is 30.2ns. Turn on gate resistance is 8Ω, turn-off gate resistance is 11Ω, and gate voltage pulse interval is 30μs. Presses

Freewheeling diode

g (t )  a j t j

(14)

j 0

αi (i=1,2,3,4) , β and a j (j=1,2,…,n)are constants need to be fitted. Derivation of the function in (t) is the gradient of current. 2.Turn-on waveforms Previous studies have shown that the derivative/slope of the collector current ic during switching on can be approximated as [22]

Vge  Vth dic (t )  dt RgC1 / gm  Ls

(15)

In (8), Vge is gate voltage, Rg is gate resistance, Cgs is collector-source capacitor, g m is transconductance, Ls is the parasitic inductance in current path when switching on. Turn-on waveforms are shown in Fig. 12(b). Gate voltage waveform in the figure indicates that Vge is not constant when the collector current is rising. Hence, the rate of current change is a time vary ing function; and collector current is approximately linear but not strictly linear. In this paper, polynomial fitting method is used to fit switching on current curves, and then the derivatives of polynomial expressions are current gradients. C.Experiment results Using the dynamic test bench as shown in Fig. 11, waveforms are measured in t wo different voltage levels, since experiment in different voltage offers comparable results; and then the stray inductance is calculated individually.

Conductor connecting

DUT

Fig.11 Dynamic test bench for PPIs B.Calculation of current gradient Co mpared to simulat ion results, experimentally measured waveforms are not smooth, especially at a h igh sampling rate. Hence, a special method is needed to calculate the rate of current change. 1.Turn-off waveforms Turn-off waveforms are shown is Fig. 12(a), which indicates that turn-off current shows linearity only in a very short period of time. Turn-off current cannot be fitted by polynomial fitting method. Considering hole d iffusion current density during the constant voltage transient is given by [21]

J T'  t  

 

J T' 0

   1 exp 

J 0   J keff ' T





 

'  t  JT 0   J keff  τ eff 

(11)

 

where J T' 0 is the current immediately after the switching voltage is reached. Obviously, collector-emitter voltage of IGBT in Fig. 12(a) shows no constant, but overvoltage peaks. Hence, construct a time do main function of turn-off current,

in (t )  f (t )  g (t ) where

f (t ) 

1

2  a3 ( t 4 )

1.Testing voltage 500 V Gate voltage, co llector-emitter voltage and co llector current during switching off are shown in Fig. 12(a); switching on waveforms is shown in Fig. 12(b). By using curve fitting, when turn-off current of IGBT is 90.5 A, co llector current gradient is - 0.179 kA/μs, voltage of collector-emitter is 554.7V. Additionally, when IGBT turnon current is 90.5 A, collector current gradient is 0.531 kA/μs; voltage of collector-emitter is 394.5 V. According to conventional method, calculation result of stray inductance of dynamic test bench is 305.6 nH if using turn-off current waveform and (8); or the result is 198.7 nH if using turn-on current waveform and (9). Based on the method proposed in this paper, stray inductance is calculated to be 225.6 nH. 2.Testing voltage 808 V Experimental waveforms are shown in Fig. 13(b). Based on curve fitting, when turn-off current of IGBT is 105A, current gradient is - 0.1829 kA/μs; at the very same time, voltage of collector-emitter is 863 V. Addit ionally, when turn-on current of IGBT is 105A, current gradient is 0.6318 kA/μs; and the collector-emitter voltage is 679 V. According to conventional method, calculated result of stray inductance is 300.7 nH if using turn-off current waveform and (8); o r the result is 204.3 nH if using turn-on current waveform. Based on the method proposed in this paper, the calculated result is 225.8 n H.

(12) 

(13)


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For a given current i0 , discharge of capacitor is Q f after time t f in turn-off transient; discharge of capacitor is Qr before time t r in turn-on transient. Hence, voltage drop fro m time t f to t r is

150

400

100

200

50

0

U 

60

62

64

t/μs

66

(a)

1200 (uge(t)+15)*10 (uge+15)*10

uuce(t) ce(t)

ic(t) icc(t)

250 200

600

150

400

100

200

50

0 88

800 800 250

uceVce /V I/A & Ic

800

ic /A

uge /V,uce /V

1000

0

89

90

91

92

t/μs

93

94

600 600 200

2950 2950 3000

i i(t)*2 c(t) c

400

600

300

400

200

200

100

0

t/μs t /s

20.5 2.05

21 2.1 -5 x 10

（a） 1200

(v ge(t)+15)*20 (t)+15)*20 (u ge

1000

(t) vuce(t)

i i(t)*2 c(t)

ce

c

300

400

200

200

100 0

8

8.5

t/s t/μs

9

9.5

3000 3000 4000

200

Qf X: 6132 Y: 124.9

0

3050 3150 7000 3200 8000 3250 3050 310060003150 3200 3250 5000 3100 t//tt

3300 3300 9000

uce ic Vce Ic data1 data2 X: 4573 Y: 196.5

800

X: 6091 Y: 194.9

600

400 400

150 200 200

400

X: 4625 Y: 126.8

Qr

i0

200

X: 6132 Y:tr 124.9 4000 4500 4500

5000 4550 4550 6000 4600 46007000 t t//t

0

8000 4650 4650

9000 4700 4700

(a) turn -off

Load current is shown in Fig. 15, when testing voltage is 500V, percentage change of load current fro m t ime t f to t r is about 0.87%; when testing voltage is 808V, percentage change of load current fro m time t f to t r is about 0.81%. Therefore, change in load current is negligib le in stray inductance extraction.

ic /A

400

7.5

tf

500

600

-200 7

i0

(b) Fig. 14 Discharge of bus capacitor. waveforms. (b) turn-on waveforms

800

0

600 600 200

3000 4450 4450

-100 10 -6 x 10

（b） Fig.13 S witching waveforms of waveforms, (b)turn-on waveforms

250

PPIs.

V.DISCUSSION

Based on the above analysis, stray inductance of PPIs dynamic test bench is extracted from different experimental voltage level, results show a good consistency based on new method; the stray inductance of dynamic test bench discussed here in is about 225.8n H. When using the new method to calculate stray inductance of dynamic test bench, voltage difference and current gradient have to be calculated accurately; hence, voltage probe calibration and current probe calibration is very necessary before experiment. In addition, no-load voltage of bus capacitor at time t f is assumed equal to no-load voltage at t r in Fig. 5. This assumption is correct if differences of these two voltages are negligible, but actually, tail current may leads to a large discharge of capacitor. Fig. 14 shows the discharge of capacitor at turn-off transient and turn-on transient.


ic1 data1 data2 ic2

X: 91.46 Y: 196.5

200

(a)turn -off ic /A

20 2

400

X: 4625 Y: 126.8

100 00

0

19.5 1.95

off waveforms Switching uge /V,u ce /V

800 800 250 500

800

600

(a)

uVce ce /V I& /AIc

ce

ic /A

uge /V,uce /V

Switching on waveforms

vuce(t) (t)

X: 6091 Y: 194.9

400 400

150 200 200

1200

（(uge v (t)+15)*20 t)+15） *20 (

(17)

800

uce ic Vce Ic data1 data2 X: 4573 Y: 196.5

10000

（b） Fig.12 S witching waveforms of PPIs. (a) turn -off waveforms, (b) turn-on waveforms

1000

t

Based on experimental data, voltage drop can be calculated. When testing voltage is 500V, δU is about 0.026V; when testing voltage is 808V, δU is about 0.027V. Hence, voltage drop fro m t f to t r is negligible in ext racting stray inductance.

0

58

Qr  Qf 1 r   idt C C tf

ic /A

ic(t) ic(t)

ic /A

uge /V,uce /V

uce(t) uce(t)

ic /A

(uge(t)+15)*10 (uge+15)*10

600

X: 121.8 Y: 194.9

X: 92.1 Y: 126.3

150

X: 122.7 Y: 125.2

100 50 0

50

100

150

200

t/μs

Fig.15 Load current. VI.CO NCLUSIO N Based on circuit analysis of IGBT switching transient, this paper proposes to extract stray inductance by using both turn off transient waveform and the following turn-on transient waveform. Co mpared to the conventional method, this method is superior because mutual inductance of each part in test bench is included and the impact of nonlinear resistor in current path is excluded. The experimental results show that the stray inductance value extracted does not change along with test voltage level, cu rrent level and rate of current

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change. Thus, the proposed method is effect ive to extract stray inductance of IGBT dynamic test bench. VII. R EFERENCES [[1] Hassanpoor, A.; Hafner, J.; Jacobson, B., "Technical Assessment of Load Co mmutation Switch in Hybrid HVDC Breaker," IEEE Trans. Po wer Electron., vol. 30, no. 10, pp. 5393–5400, Jan. 2015. [[2] R. A lvarez, F. Filsecker, and S. Bernet, “Characterizat ion of a new 4.5 kV press pack SPT+ IGBT for med iu m voltage converters,” in Proc. IEEE ECCE, San Jose, CA, Sep. 2009, pp. 3954–3962. [[3] S. Eicher, M. Rah imo, E. Tsyplakov, D. Schneider, A. Kopta, U. Schlapbach, and E. Carro l, “4.5 kV press pack IGBT designed for ruggedness and reliability,” in Proc. IEEE IAS Annu. Meeting, 2004, pp. 1534– 1539. [[4] S. Munk-Nielsen. F. Blaab ierg, and J.K. Pedersen. “An advanced measurement system for verificat ion of models and datasheets,” in 1994 PELS Workshop on Computers in Power Electron., 1994, pp. 234-239. [5] R. Letor, “Static and dynamic behavior of paralleled IGBTs,” Conf. Record of the Industry Applicat. Soc. Annu. Meeting, Seattle, WA, Oct. 7-10, 1990, pp. 1604-1612. [6] Andreas Vo lke, M ichael Ho rnkamp, “Switching behavior in the application,” in IGBT Modules, 2nd ed. Munich: Infineon Technologies AG, 2012, pp. 306-308. [7] N. Chen. “Switching characteristics testing and modeling of mediu m and high voltage IGBT power module (in Chinese),” Ph. D. dissertation, Dept. Elect. Eng. Zhejiang Univ., Hangzhou, 2012. [8] C. Chen, X. Pei, Y. Chen, Y. Kang. “Investigation, Evaluation, and optimization of stray inductance in laminated busbar,” IEEE Trans. Power Electron., vol. 29, no. 7, pp. 3679–3693, July. 2014. [9] S. Li, L. M . To lbert, F. Wang, and F. Z. Peng, “Reduction of stray inductance in power electronic modules using basic switching cells,” in Proc. IEEE Energy Convers. Congr. Expo., 2010, pp. 2686– 2691. [10] K. Xing, F.-C. Lee, and D. Boro jevic, “Ext raction of parasitics within wire bond IGBT modules,” in Proc. IEEE Appl. Power Electron. Conf. Expo., Feb. 1998, pp. 497– 503.

[13] D. Cottet and A. Hamid i, “Nu merical co mparison of packaging technologies for power electronics modules,” in Proc. 36th IEEE Power Electron. Spec. Conf., Jun. 2005, pp. 2187-2193. [[14] L. Yang and W. G. H. Odendaal, “Measurement-based method to characterize parasitic parameters of the integrated power electronics modules,” IEEE Trans. Power Electron., vol. 22, no. 1, pp. 54– 62, Jan. 2007. [[15] S. Li, L. M. Tolbert, F. Wang, and F. Z. Peng, “P-cell and N-cell based IGBT module: Layout design, parasitic extraction, and experimental veri- fication,” in Proc. IEEE Appl. Power Electron. Conf., Mar. 2011, pp. 372- 378. [[16] H. Zhu, A. R. Hefner, Jr. and J. Lai. “Characterization of power electronics system interconnect parasitics using time domain reflecto metry.” IEEE Trans. Power Electron., vol. 14, no. 4, pp. 622–628, July. 1999. [[17] P. Ranstad, Hans-Peter Nee. “On dynamic effects influencing IGBT losses in soft-switching converters,” IEEE Trans. Power Electron., vol. 26, no. 1, pp. 260–271, Jan. 2011. [[18] Z. Lounis, I. Rasoanarivo, and B. Davat. “Min imization of Wiring Inductance in High Power IGBT Inverter,” in IEEE Trans. on Power Del., vol. 15, no. 2, pp.551-555, Apr. 2000. [[19] Josef Lutz, Heinrich Sch langenotto, Uwe Scheuermann, Rik De Doncker. “pin-Diodes,” in Semiconductor Power Devices: Physics, Characteristics, Reliability, 1st , ed., Berlin, Heidel: Springer – Verlag, 2011, pp. 159-160. [[20] John G. Webster, Halit Eren. “Electro magnetic Co mpatibility,” in Measurement, Instrumentation, and Sensors Handbook, 1st , ed., Boca Raton, FL: CRC Press LLC, 1999, pp. 2328-2330. [21] Allen R. Hefner, JR., and Dav id L. Blackburn. “A performance trade-off for the Insulated Gate Bipolar Transistor: buffer layer versus based lifet ime reduction,” in IEEE Trans. Po wer Electron., vol. pe-2, no. 3, pp. 194-207, Jul. 1987. [22] D. BORTIS, J. BIELA , AND J. W. KOLAR, “ACTIVE GATE CONTROL FOR CURRENT BA LANCING OF PARA LLEL-CONNECTED IGBT MODULES IN SOLIDSTATE M ODULATORS,” IEEE TRA NS. PLASMA SCI., VOL. 36, NO. 5, PP. 2632– 2637, OCT.2008

[11] D. Gerber, T. Gu illod, R. Leutwyler, and J. Biela. “Gate unit with improved short-circuit detection and turn-off capability fo r 4.5kV p ress -pack IGBTs operated at 4-kA pulse current,” IEEE Trans. Plasma Science, vol. 41, no. 10, pp. 1176–1184, Oct. 2013. [12] C. Martin, J. M . Gu ichon, J. L. Schanen, Robert-J. Pasterczyk, “Gate circuit layout optimization of power module regarding t ransient current imbalance,” IEEE Trans. Power Electron., vol. 21, no. 5, pp. 1176– 1184, Sept. 2006.


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