Parallel Converter Scheme for Large Power High Compensation Precision Shunt Active Power Filters Chao He, Student Member, IEEE, Chuan Xie, Student Member, IEEE, Hui Yan and Guozhu Chen, Member, IEEE College of Electrical Engineering, Zhejiang University, Hangzhou, Zhejiang, 310027, PR. China E-mail:
[email protected]
Hua Yang JUCHE (Zhejiang) Science-Technology Co., Ltd Changxing, Huzhou, Zhejiang, 313100, PR. China E-mail:
[email protected]
Abstract-Shunt Active Power Filter (APF) is a good solution to eliminate current-type harmonics generated by nonlinear load. Challenges exist in realization of large power and high compensation precision simultaneously due to the limited capacity of semiconductor devices, thermal management, high slew rate of compensation current, low switching frequency and phase lag of digital control loop etc. This paper introduces the issue of developing a practical 527 kVA APF prototype by using dual converters paralleling approach. The circulation current between the two converters was effective suppressed depending on the consistency of the main circuit and drive circuit. With a superior and reliable digital control method and an additional high-pass filter branch, large power and high compensation precision are both achieved. Full power prototype tests validate the feasibility and stability of the proposed scheme.
Based on the two points, multi-modular approach is supposed to be a decent scheme in large power APF application [4, 5]. However, the parallel converter will produce circular current due to the switch states and differences in main circuits [6-8]. Reference [4] measures compensating currents of every converter without additional control. Paper [5] proposed a complex structure but the control method and the topology pend further examination. Zero Sequence Circuiting Current (ZSCC) model in wind power converter is analyzed in [3] and [9], which is not exactly as same as model in APF. Based on the model, reference [3] adds a ZSCC control loop but the master and slave converters share the same PulseWidth Modulation (PWM) pulse. Technically, this method cannot eliminate ZSCC generated by main circuit differences and therefore the ZSCC control loop is no effect on the whole controller. A new topology is proposed in [8] and obtains good performance but additional hardware cost is required, which should be avoided in large power applications. In this paper, repetitive control for shunt APF based on multiple parallel converters is presented. With proposed scheme, high compensation precision and large power are realized. Experiment results based on a 527 kVA shunt APF with two parallel converters validate the feasibility and stability of the proposed scheme proposed by this paper in high power parallel converter application.
I.
INTRODUCTION
Power quality issues are drawing more and more attentions in recent years and people have put stricter standard on it. Harmonic currents in distribution systems, closely related to the increasing electricity demand in industry, commercial and residential fields [1]. Shunt Active Power Filter (APF), controlled as a current source, has been proved useful in eliminating current-type harmonics. And its capacity is growing for the development of semiconductor devices and the increasing demanding. Different from traditional inverters, while the output RootMean-Square (RMS) currents are same, higher current rate is demanded in APF because it compensates currents with higher frequency and distortion. That means the output filter should have smaller impedance so that higher current rate can be obtained with same grid voltage and definite DC bus voltage. What’s more, the output filter should be provided with excellent filtering performance at switching frequency. There are two serious problems in large power APFs. 1) The switching frequency of the power converter should be reduced, which would enlarge the time delay and induce inconvenience in switching current ripple elimination, and then the performance of APF would be deteriorated significantly [2, 3]. 2) Larger power rating converters result in higher hardware cost, thermal management and more serious EMI problems, which will reduce the reliability, stability and lifetime of the equipment.
978-1-4673-0158-9/12/$31.00 ©2012 IEEE
II.
MODEL AND ZSCC ANALYSIS
A. System Configuration The structure of proposed shunt APF with N modular converters is shown in Fig.1. Where ug is grid phase voltage, is is grid current, Lg is grid line inductor, iL is load current and Ll represents input inductor of the nonlinear load. The N modular converters are connected to the Point of Common Coupling (PCC) through the output filters. The design capacity of every modular is almost 263 kVA (263.27 kVA). Design parameters of the N modular converters and the relevant output filters are same with each other. That means the capacitance of DC side capacitors Cdci, inductance of filtering inductor Lip, resistance of damping resistor Ri and high-pass capacitors Ci (p = a, b, c and i = 1, 2 …N) are equal among the phases respectively. Since DC side is connected directly and stray inductance can be treated
431
Fig.1. Diagram of the proposed topology of shunt APF with multiple parallel converters sharing the same dc capacitors.
i1a +
iz1N
i1b i1c
Cdc1
iz12
Udc
d1ai1a
-
d1bi1b
d1ci1c
+
+
-d
1aUdc
d1cUdc
-
i2a +
i2b i2c
Cdc2 +
d2ai2a
-
d2bi2b
d2ci2c
-d
2aUdc
+
+
-d U 2b dc
-
ia ib ic
L1a L1b L1c
+
d1bUdc
-
average model. The DC bus voltage udc and the compensating current iip (p = a, b, c and i = 1, 2 …N) can be treated as constant in a switching period. Then the average model of the shunt APF is obtained as shown in Fig.2. Where ua, ub, and uc represent the phase voltage of power grid respectively, dip is the phase duty cycle. The dashed circles represent the circulation loops. The aim of the high-pass branch is providing a low resistance branch for the switching ripple and its resistance under system bandwidth is much larger than that of the grid
R1 C1
O
L2a L2b L2c
d2cUdc
R2 C2
O
N iNa +
iNb iNc
CdcN +
-
dNaiNa
dNbiNb
dNciNc
+
LNa LNb LNc
+
-d U -d U Na dc Nb dc dNcUdc
Fig.2. Average model of the shunt APF.
432
RN CN
O
Lg Lg Lg
ua ub uc
O
as zero in the research scope, the DC side voltage udc of every converter has no differences. To reduce the cost and increase the stability, which both are very important for practical applicability, the output filter is designed as single inductor type appending a first order high-pass filter to guarantee large power capacity and enough attenuation of switching ripple current. B. Average Model The semiconductor devices are treated as ideal switches. The ZSCC of the parallel converters are analyzed through the
leakage inductance, which is expressed as follows,
1 jsb Lg , (k 1, 2...N ). jsb Ck Rk
(1)
where ωsb is smaller than the bandwidth of the system and is much smaller than the switching frequency. Then the average model can be simplified by removing the high-pass branch, which is encircled by the dotted rectangular box shown in Fig.2. C. ZSCC Analysis The ZSCCs between the jth and the kth (j, k = 1, 2 …N) converters is defined as izjk. Then the total ZSCCs of the jth converter are defined as follows, N
izj
izjk =i ja +i jb i jc .
(2)
k 1, k j
According to Fig.3, the equation of the jth converter is delivered as follows,
d jaU dc U NO ua d jbU dc U NO ub d jcU dc U NO uc L ja 0 0
0 L jb 0
0 i ja ia d d 0 i jb Lg ib . dt dt ic L jc i jc
(3)
Then the ZSCCs of the jth converter can be got as,
izj
i jp
p a ,b , c
1
p a ,b , c
=
L jp p 1
p a ,b , c
L jp p
(d jpU dc U NO u p Lg
d ip ) dt
(4)
(d jpU dc U NO ).
converters once all the converters are switched on/off synchronously.. The master converter (unit 1), under closeloop controller, can be controlled with no ZSCC. The consistence between the slave converters (unit 2, 3…, N) results in the ZSCCs in the slave converters, which can be decreased by reducing the differences in the inductors under the proposed topology. III.
As shown in Fig.1, only the master converter’s compensating current is sampled and close-loop controlled, while the other N-1 converters operate in open-loop. As explained above, the system can operate properly as long as the master converter is controlled well. Fig.3 describes the control mechanisms of the system. Some PARK and CLARKE transformations and inverse transformations are omitted for simplicity. The harmonic execution unit extracts current harmonics in dq-axis and then the harmonic instructions are derived by divide them by N. The compensating current of the master converter is transformed into dq0-axis. The 0-axis is set as zero to control ZSCC. The controller consists of two basic control loops [1, 1113]. The DC voltage keeps steady by adding a DC voltage regulation loop to the current loop. The introduction of 0-axis can eliminate the ZSCC of the master converter. All slave converters share the same control signals with the master converter. By doing these, each of the converter compensates one Nth of the harmonics and the ZSCC and be suppressed by 0-axis control and the consistency of hardwires. In order to realize high compensation accuracy at different harmonic frequencies, repetitive control [14] is adopted to enlarge the bandwidth of the system. Fig.4 shows the phase characteristic before and after adding repetitive controller. Gc(z) is the close-loop transform function of current loop with PI controller. And Gc(z)S(z) zk is phase characteristic when the repetitive control is adopted. Where, S(z) is a corrector which dominates close-loop stability and steady-state error of the system and zk is a phase compensator. It can be seen that the repetitive control compensates the phase lag of the closeloop well and enlarge the bandwidth of the system.
where, p is the differential operator. As shown in Fig.1, all the converters share with the same PWM. Considering optical fiber has been widely used in large power converter control, it can be assumed that the control signals have no differences during transmission. Then (4) can be simplified as,
izj
p a ,b , c
i jp =
Ct . p a ,b , c L jp p
u drefc
abc
dqo ref
i0ref iq idref 1 N
t
(5)
where, Ct is a constant value. It can be seen that the differences between the output inductor’s inductance is the only factor which leads to inconsistency between different
CONTROL STRATEGY
Fig.3. Control mechanisms of the proposed shunt APF.
433
180
S(z)Gc(z)zk
90
Phase (deg)
0 -90 -180
Gc(z)
-270 -360 -450 0 10
10
1
2
10 Frequency (Hz)
10
3
10
4
Fig.5. Waveforms of IGBTs gate drive voltages of the two converters when the drives are different.
Fig.4. Phase plots of Gc(z) and S(z)Gc(z)zk.
IV.
EXPERIMENTAL RESULTS
Experiments are carried out on a shunt APF with two parallel converters, i.e. N=2 in Fig.1. Because there are only two converters, the ZSCCs of the master converter, introduced by main circuit differences, cannot be eliminated by controller theoretically. Then the 0-axis is omitted and the proposed scheme is tested through this method. Each of the converter’s capacity is 263 kVA. Every bridge of the converter is composed of three parallel IGBTs to withstand heavy current demand. And this also increases the consistency in statistics. The industrial nonlinear load in Fig.1 is a typical rectifier load with an adjustable resistor RL whose minimum resistance is 0.3 Ω. Part parameters of both two main circuits are shown in Table I. The output filters shows an imbalance of 2% through experiment testing. The differences can be figured out by (5), which infer 2% differences of ZSCCs may exist in the two converters. Fig.5 shows the IGBTs’ gate voltages of the two converters when it’s turned off. The two voltage signals are not coincident at falling edge and VGE2 has 300 ns time delay with respect to VGE1. That means Ct in (5) of master and slave converters are different. This leads to distinct consistent in compensating currents of the two converters which is shown in Fig.6. The differences are so serious that the system cannot operate normally. The differences can be reduced by regulating hardwires. Fig.7 shows the IGBT gate drive voltage after regulation,
Fig.7. Waveforms of IGBTs gate drive voltages of the two converters after regulation.
Table I PARAMETERS OF MAIN CIRCUIT Grid phase voltage ug (V) Grid frequency fg (Hz) Grid line inductance Lg (μH) Dc bus voltage (V) Switching frequency fs (kHz) Rectifier resistance RL (Ω) Compensating capability (kVA)
Fig.6. Waveform of output currents of 1) master and 2) slave converters (100A/div) with different Ct
220 50 30 700 5 0.3 527
which reveals little differences between two converters. And it is the same case for the other IGBTs. The following experiments are carried out under this condition. Fig.8 shows the waveforms load current (current of highpass capacitor is included), compensating current of both converters and the source current. Limited by the capacity of nonlinear load, each of the converters only compensates 200Arms harmonic currents. The THD of the load current is 434
Fig.10. Heat sink of IGBT modules temperature of three phases.
V. Fig.8. Waveform of 1) load current (2000A/div), 2) source current (2000A/div), 3) compensating current of master converter (500A/div) and 4) slave converter (500A/div).
CONCLUSION
Aiming to realize large power and high compensation precision for shunt APFs, both main circuit and control algorithm are studied in this paper. The converter parallel method is proposed. And the ZSCC is analyzed based on the average model, which shows the ZSCCs are relevant with the deviation of the inductance of the output inductor and the differences between switching processes of the semiconductor devices and the ZSCCs can be predicted by the analysis results. Full power experiments conducted on a shunt APF with two parallel converters demonstrate the ZSCC analysis. Feasibility and superiority of the proposed parallel scheme and control strategy in large power and high compensation precision APF application are also validated.
27.1%. The FFT analysis shows that THD of source current is reduced from 27.1% to 3.8% which declares the high compensating precision of the system with proposed scheme. To further verify the feasibility of the scheme under higher power occasions, reactive power experiments with full capacity, i.e. totally 800Arms reactive power current, are conducted. Fig.9 shows the experimental result. Each converter compensates 400Arms reactive power current. The current flows from one converter to another through the dc connecting cables is under 10Arms and this means the ZSCCs is smaller than 10Arms and take a small part (1.25%) of the ACKNOWLEDGMENT compensating current, which certifies the ZSCC analysis and The authors would like to thank the sponsorship of NSFC demonstrate the proposed scheme. National Science Foundation of China (#51177147) and Fig.10 is the heat sink temperature of IGBT modules of Zhejiang Key Science and Technology Innovation Group three phases with the air temperature is 18.5 degrees Program (#2010R50021). centigrade. The temperature rise is only 22 degrees centigrade, which demonstrates the practicability of the equipment. REFERENCES [1] [2] [3] [4]
[5] [6]
[7] Fig.9. Waveform of 1) compensating current of master converter (1000A/div), 2) slave converter (1000A/div), 3) their sum current (1000A/div) and 4) their difference current (200A/div).
435
Akagi, H., Active Harmonic Filters. Proceedings of the IEEE, 2005. 93(12): p. 2128-2141. Ledwich, G. and P. Doulai, Multiple converter performance and active filtering. Power Electronics, IEEE Transactions on, 1995. 10(3): p. 273279. Meng, L. and W. Yong, Research on the parallel technique for the direct-drive wind power converter, in Electrical Machines and Systems (ICEMS), 2011 International Conference on. 2011. p. 1-4. Wanjun, L., et al., Development of 100 kVA active filter with digital controlled multiple parallel power converters, in Power Electronics Specialists Conference, 2004. PESC 04. 2004 IEEE 35th Annual. 2004. p. 1121- 1126 Vol.2. Basu, M., S.P. Das and G.K. Dubey, Parallel converter scheme for high-power active power filters. Electric Power Applications, IEE Proceedings -, 2004. 151(4): p. 460- 466. Mazumder, S.K., A novel discrete control strategy for independent stabilization of parallel three-phase boost converters by combining space-vector modulation with variable-structure control. Power Electronics, IEEE Transactions on, 2003. 18(4): p. 1070- 1083. Chen, T.P., Circulating zero-sequence current control of parallel threephase inverters. Electric Power Applications, IEE Proceedings -, 2006. 153(2): p. 282- 288.
[8]
Asiminoaei, L., et al., Shunt Active-Power-Filter Topology Based on Parallel Interleaved Inverters. Industrial Electronics, IEEE Transactions on, 2008. 55(3): p. 1175-1189. [9] Li, R. and D. Xu, Parallel Operation of Full Power Converters in Permanent-Magnet Direct-Drive Wind Power Generation System. Industrial Electronics, IEEE Transactions on, 2011. PP(99): p. 1-1. [10] Ching-Tsai, P. and L. Yi-Hung, Modeling and Control of Circulating Currents for Parallel Three-Phase Boost Rectifiers With Different Load Sharing. Industrial Electronics, IEEE Transactions on, 2008. 55(7): p. 2776-2785. [11] Chuan, X., W. Zhiqiang and C. Guozhu. A simple method of realization of low power loss and high compensation-precision active power filter.
in Sustainable Power Generation and Supply, 2009. SUPERGEN '09. International Conference on. 2009. [12] Xie, C., et al. Study on large power shunt active power filters with high compensation precision. in IECON 2010 - 36th Annual Conference on IEEE Industrial Electronics Society. 2010. [13] Zhiqiang, W., et al. A waveform control technique for high power Shunt Active Power Filter based on repetitive control algorithm. in Applied Power Electronics Conference and Exposition (APEC), 2010 Twenty-Fifth Annual IEEE. 2010. [14] G. Escobar, P. R. Martinez, J. Leyva-Ramos, et al., "A Negative Feedback Repetitive Control Scheme for Harmonic Compensation, "Industrial Electronics, IEEE Transactions on, vol. 53, pp. 13831386,2006.
436
Powered by TCPDF (www.tcpdf.org)
