Palermo, Italy, 22-25 Nov 2015
4th International Conference on Renewable Energy Research and Applications
Parallel-Input Series-Output Interleaved Flyback based Solar PV Module Integrated Micro-Inverter
Nataraj Pragallapati, Student Member, IEEE, Tirthasarathi Lodh, Vivek Agarwal, Fellow, IEEE Indian Institute of Technology, Mumbai 400 076, Maharashtra, India
[email protected];
[email protected];
[email protected] -
ABSTRACT
-
This paper proposes a parallel input, series output
interleaved flyback principle based micro-inverter for solar PV module
integrated
converter
application.
In
the
proposed
topology, inputs of two flyback transformers are connected in parallel while the outputs are connected in series by using interleaving concept. This topology is helpful in achieving high output voltage (ac voltage) from low voltage input of PV module. The
salient
features
of
the
proposed
topology
include
(a)
individual transformers with lower turn's ratio leading to reduced leakage inductance; (b) reduced current stress on primary side switches and (c) lower peak inverse voltage across secondary side diodes. These features lead to higher efficiency. Operating modes, control scheme and simulation results of the proposed topology are included.
Theoretical
results
are
validated
by
are connected, the transformers can afford smaller turns ratio leading to reduced leakage inductance. Further, the peak inverse voltage requirement of the secondary side diodes is reduced. These features result in overall improved efficiency of the system. The rest of the paper is organised as follows: Section-II describes the proposed configuration and discusses its various operating modes. In Section-III, control scheme, switching pulse generation and Matlab-Simulink simulation results of proposed topology are presented. Preliminary hardware results are included in Section-IV and major conclusions of this work are summarized in Section-V. II. PROPOSED INTERLEAVED FLYBACK BASED MICRO-INVERTER AND MODES OF OPERATION
hardware
experiments and these results are also included.
Index terms - Interleaved Flyback Converter, SCR based Inverter,
A.
Solar PV, Discontinuous Conduction Mode, MPPT.
Proposed interleaved flyback based micro-inverter (IFMI) is shown in Fig. l. It consists of two flyback dc/dc converters, L-filter and an unfolding circuit (SCR based inverter). Trl and Tr2 are the two tlyback transformers whose primary sides are connected in parallel and secondary sides are connected in series for achieving low primary current and low voltage respectively. Primary side switches (S) and S2) are modulated sinusoidally with a reference waveform corresponding to the power grid. The switching frequency of the devices is 40kHz. Maximum Power Point Tracking (MPPT) of PV module IS implemented by controlling the modulation index.
I. INTRODUCTION Solar PV module integrated inverters (or micro-inverters) offer a viable solution to the problem of module mismatch and partial shading conditions. Micro-inverter has many advantages: Maximum Power Point Tracking (MPPT) efficiency is improved, lower maintenance, easy installation and high reliability. Usually, the micro-inverters are used with low voltage (25V-45V), high current PV modules. The low input voltages are converted to the desired ac voltage of 11OV1230Vrms. Many researchers have proposed micro inverters based on flyback principle [1-3]. These have a simple structure with less number of components and yield higher efficiency. A flyback micro-inverter with centre tapped secondary winding is presented in [3, 4]. This converter transfers power to the load through each secondary winding alternatively during half time period of the sinusoidal wave. An interleaved flyback converter followed by SCR based unfolding circuit is proposed in [5-7]. Paralleling the input side results in low current stress on the primary switching devices and SCR based unfolding circuit helps to reduce the conduction losses as compared to MOSFET based unfolding circuit [9], thus improving the efficiency. SCR based circuit is also more robust and reliable. This paper proposes a novel micro-inverter configuration that uses two flyback converters as shown in Fig. 1. The primaries of the two flyback transformers are connected in parallel while the secondaries are connected in series by using interleaving concept. The MPPT performance of the PV module is improved. The proposed circuit experiences reduced current stress on the primary side switches. Due the way they
Proposed Configuration
If,
Fig. 1 proposed parallel-input series-output interleaved flyback based micro inverter.
The circuit operates in Discontinuous Conduction Mode (DCM) to reduce the control complexity. Thus, the output of flyback dc to dc converter is a rectified sinusoidal voltage (summation of Vel and Ve2), which consists of switching frequency harmonics. These components are filtered out by the L-filter connected in series with the secondary of the converter. For obtaining the ac voltage waveform from the filtered rectified voltage (Vr) an 'unfolding' circuit is used, which
ICRERA 2015 978-1-4799-9982-8115/$3 l.00 ©20 15 IEEE 716
Palermo, Italy, 22-25 Nov 2015
4th International Conference on Renewable Energy Research and Applications consists of four SCR's (TJ, T2, T3 and T4). One pair of SCR's (Tl , T4) or (T2, T3) is triggered to conduct depending on the polarity of the grid voltage (Vg). Grid voltage vector phase displacement and frequency information are obtained by using Phase Locked Loop (PLL). Typical current waveforms and switching pulses of the proposed topology are shown in Fig. 2 .
other part supply the grid current through filter inductor Lrand SCR's (Tl and T4) causing discharge ofCl. The equation for i,l is the same as mode-I, i.e. (1).
ipl(t)
=
Vpv Lm1
•
(t - tl); ipz(t)
=
iSlet)
=
(2)
0
• I Imll
Fig. 4 Mode-ll of the operation of the proposed IFMI I I I I
S/ ...
---
dr,
�--I
� �----�---;�====�==�----� t�
t;) 1'1
t.� 14
t.�
Mode-III {f?-fJ}: This mode appears for both d < 0.5 as well as d> 0.5 (only DCM). During this mode, SI is ON and S2 is OFF, as shown in Fig. 5. The primary current, ipl in TrI increases linearly and is as follows (2). Both diodes DI and D2 are reverse biased. Capacitors, Cl and C2 discharges to supply the grid current through filter inductor Lf and SCR's (Tl and T4).
ipz(t)
=
isz(t)
=
iSlet)
=
0;
icz(t)
=
iC1(t)
=
-if(t)
(3)
t�
Fig. 2. Typical magnetic current wave forms and switching pulses of proposed topology. B.
Modes of Operation
Operation of the proposed IFMI can be divided into six modes during either positive or negative cycle of the grid voltage. These modes are explained during positive cycle as below: Mode-I {to-tIl: This mode is active when the duty cycle, dis less than 0.5 (only DCM). During this mode, both Sl and S2 are OFF, as shown in Fig. 3. Diode, Dl is reverse biased and D2 is forward biased. Current through the diode, D2 (id2) decrease linearly. One part of id2 chargesC2 and other part supply the grid current through filter inductor Ljand SCRs (Tl and T4) causing discharge ofCI. The equation of is2 as follows:
isz(t)
=
icz(t)
+
if(t); iC1(t)
=
-if(t)
(1)
Fig. 5 Mode-III of the operation of the proposed IFMI
Mode-IV ft3-f4}: This mode is active for and d < 0.5 (only DCM). During this mode, both SI and S2 are OFF, as shown in Fig. 6. Diodes, Dl is forward biased and D2 is reverse biased. Current through the diode, Dl (i,ll) decrease linearly. One part of idl chargesCl and other part supply the grid current through filter inductor Lf and SCR's (Tl and T4) causing discharge of C2• The equation of isl is shown below:
iSlet)
=
iC1(t) + if(t); icz(t)
=
-if(t)
(4)
Tr,
Fig. 3 Mode-l of the operation of the proposed IFMI
Mode-II {t1-t2l: This mode appears for all values of duty ratio (CCM and DCM both). During this mode, Sl is ON and S2 is OFF, as shown in Fig. 4. The primary current, ipl in Trl increases linearly and follows (2). Diodes, DI is reverse biased and D2 is forward biased. One part of the id2 charges C2 and
Fig. 6 Mode-IV of the operation of the proposed IFMI
Mode-V {frf5l: This mode is active for both conditions, i.e. d > 0.5 and d < 0.5. During this mode, Sl is OFF and S2 is ON, as shown in Fig. 7. The primary current, ip2 in Tr2 increases linearly
ICRERA 2015
717
4th International Conference on Renewable Energy Research and Applications and is follows as (S). Diodes, D/ is forward biased and D2 is reverse biased. Current through the diode DI (i,1I) decrease linearly. One part of id] charges C] and other part supply the grid current through filter inductor Ljand SCR's (T] and T�) causing discharge of C2• The equation of is] is same as mode-IV, i.e. (4).
ipz(t)
=
VPV Lml
.
(t - t4); ipl(t)
=
isz(t)
=
Palermo, Italy, 22-2S Nov 201S
generate low frequency (i.e. grid frequency) pulses to the SCR pair, (h T�) or (h T3). IsinSI
(S)
0
Fig. 9 Control block diagram and switching pulse generation. Fig. 7 Mode-V of the operation of the proposed IFMI
Mode-VI {t5-t6}: This mode is active for both conditions, i.e. d > O.S and d < O.S (DCM). During this mode, S/ is OFF and S2 is ON, as shown in Fig. 8. The primary current, ip2 in Tr2 increases linearly and follows (S). Both diodes, D/ and D2 are reverse biased. Capacitors, C/ and C2 discharges to supply the grid current through filter inductor Ljand SCR's (T/ and T�).
iplCt)
=
iszCt)
=
iSlet)
=
0;
iczCt)
=
iC1Ct)
=
-ifCt)
(6)
B.
Simulation Results
The proposed IFMI and peak currents of the tlyback inverter are controlled sinusoidally through S/ and S2. Reference duty cycle is obtained using P&O MPPT algorithm and then tracked using the duty ratio control of switch, Sl and S2. Using PLL, the pair of SCR's (h T�) and (h T3) are synchronized with the grid voltage (Vg) . PV module has a rating of PMPp=200W, VMPp=34.6SV, Isc=S.7SA and Voc=40.1SV at an irradiation level of lkW/mz and temperature of 2S0C.
2
Fig. 8 Mode-VI of the operation of the proposed IFMI
III. CONTROL BLOCK DIAGRAM AND SIMULATION RESULTS A.
2
Control block diagram of the proposed topology
Switching pulse generation and control block diagram of the proposed IFMI is shown in Fig. 9. PV module voltage ( vpv) and current (ipv) are sensed for MPPT control to generate the reference duty cycle (d). This duty cycle reference value is changed according to the Perturb & Observe MPPT algorithm [9]. Generated duty cycle reference is multiplied with the sine component and the modulus of the waveform is compared with a high frequency carrier waveform (40kHz) to generate the high frequency pulses (for the primary switch, S/) of widths varying in a sinusoid manner and 180° out of phase with the set of switching pulses applied to primary switch, S2. Sine component (unit vector derived from grid voltage vector) is generated from Synchronous Reference Frame (SRF) based PLL [10] as shown in Fig. 9. The output of the PLL is compared with zero to
0. 1 5 1.5
0.5
� A
v /f
� A �
A � � A
'f', 1\ I" I" " "" 1\ IA
o 0.1
0. 15
0.25
0.2 fIr
I
A
� �
'" � "" 1\ I{\ 0.2
0.25
Fig. 10 Secondary diode currents (idJ and id2), DC side Voltage (Vf) and DC current (il).
The electrical parameters of the proposed IFMI are: turns ratio (n) of secondary windings of flyback transformers (Trl and Trz) to primary windings is 4, Primary magnetizing
ICRERA 201S
718
Palermo, Italy, 22-25 Nov 2015
4th International Conference on Renewable Energy Research and Applications inductance (Lm) 20flH, switching frequency (is) 40 kHz, maximum duty ratio (dmax) 0.45, filter inductance (Lf) l.5mB, secondary capacitances (C], C2) 0. 35flF and grid voltage (Vg) 230Vrms at 50Hz. The simulation results of the proposed IFMI are shown in Fig. 10 and Fig. 11 under rated power conditions. Fig. 10 shows secondary diode currents (idl and id2) and dc side voltage (lit). It is observed that the circuit is operating in DCM. Also, the dc side current (iJ) after filtering is a rectified sine waveform. The current iJ is passed through the unfolding circuit (SCR based inverter) for feeding ac power into the grid, as shown in Fig. 11. =
=
=
=
=
=
I PV Capacitor (Cpv) I 15mF The components used in the proposed system and their specifications are listed in Table I. The proposed IFMI circuit operates in OCM with a switching frequency of 40kHz. To validate the proposed IFMI, the circuit is tested at 200W. Fig. 13 shows the experimental waveforms of voltage across primary switches (lis] and Vs2). It is observed that the circuit is operating in OCM. CH4 Coupling
iii
B'rI'
Limi1
D
100MHz
1
Vol1>/Oiv
Elm
o
Probe 10A/V Curren1
-1
Inver1
-:2 L-___---'-____--'-___----' 0_1 0_15 0_2 0_25
C
I!lil
H'"=iSo.ov
CH1 f -%.8mV
