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IEEE ELECTRON DEVICE LETTERS, VOL., NO., ?? 2011

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Performance comparison of GaSb, strained-Si, and InGaAs double-gate ultra-thin-body n-FETs Mathieu Luisier

Abstract—Using a full-band and atomistic approach based on the nearest-neighbor tight-binding model and the Nonequilibrium Green’s Function formalism, (111)/ GaSb, (100)/ strained-Si, and (100)/ In0.53 Ga0.47 As ntype double-gate ultra-thin-body field-effect transistors designed according to the ITRS specifications for 2020 are simulated in the ballistic limit of transport and with electron-phonon scattering. It is found that at an EOT of 0.59 nm, the GaSb device offers the highest ballistic ON-current, at a fixed OFF-current, due to the projection to the Γ point of bands originating from the bulk L-valley and possessing a low transport effective mass. It is followed by the strained-Si FET and finally the In0.53 Ga0.47 As FET, the latter suffering from its small density-of-states in the channel despite very high electron velocities. However, when electron-phonon scattering is taken into account, the presence of multiple energy subbands, as in GaSb and strained-Si, increases the probability of backscattering for electrons and so that the current of these devices does not exceed that of the In0.53 Ga0.47 As FET by more than 13%. Index Terms—L-valley engineering, ultra-thin-body transistor, full-band device simulation, electron-phonon scattering

[5]. In effect, in an ultra-thin-body (UTB) configuration with confinement along the (111) crystal axis, GaSb offers many conduction subbands, projected from the bulk L-valley, capable of carrying electrons at high velocities. A recent study based on idealized device structures neglecting the contact series resistances and a non-self-consistent ballistic top-of-thebarrier transport model showed that GaSb could outperform Si and InGaAs by more than 40% and 50%, respectively, at a supply voltage VDD =0.8 V and EOT=0.5 nm [6]. In this letter, a full-band and atomistic quantum transport solver is used to compare the performance of a (111)/ GaSb, a (100)/ Si with uniaxial tensile strain along the [110] crystal axis [10], and a (100)/ In0.53 Ga0.47 As ntype double-gate UTB FET based on the ITRS specifications for the year 2020 [7]. The ballistic results confirm the trends observed in Ref. [6], but the inclusion of electron-phonon scattering, more important in the GaSb and strained-Si devices due to the presence of multiple energy subbands, reverses the ballistic conclusions and gives new perspectives on the potential of GaSb for logic applications.

I. I NTRODUCTION

T

HE continuous increase of the electron and hole injection velocities from one generation of transistors to the other has greatly contributed to the improvement of their performance, in parallel with the scaling of their dimensions [1]. Despite the introduction of performance boosters such as strain engineering, the electron and hole injection velocities in Si are reaching their physical limits, demanding for new materials with better transport properties to continue Moore’s law. III-V semiconductors are very appealing as alternatives to Si for n-type logic applications due to their very high electron mobility [2]. However, such devices suffer from a very low density-of-states (DOS) in the channel leading to small gate capacitances, especially when a small equivalent oxide thickness (EOT) is used [3]. Therefore, only few electrons can travel at a high velocity, limiting the achievable ON-current. A material such as GaSb with a low energy separation between the bulk Γ- and L-valleys (26 meV at room temperature), a small transverse (mL,t =0.1m0 ) and large longitudinal (mL,l =1.3m0 ) effective mass in the L-valley [4] could provide a viable solution to the DOS bottleneck encountered in InGaAs Manuscript received ; revised . Current version published. This work was supported in part by the National Science Foundation (NSF) under a PetaApps Grant 0749140, by the NSF through TeraGrid the National Institute of Computational Sciences (NICS), and by resources of the National Center for Computational Sciences (NCCS) at Oak Ridge National Laboratory (Contract No. DE-AC05-00OR22725). The review of this letter was arranged by Editor. The author is with the Integrated Systems Laboratory, ETH Z¨urich, 8092 Z¨urich, Switzerland (e-mail: [email protected]). Digital Object Identifier

II. S IMULATION A PPROACH 3 5 ∗

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The nearest-neighbor sp d s tight-binding method is used as bandstructure model, with spin-orbit coupling for GaSb [11] and In0.53 Ga0.47 As [12], without for uniaxially-strained Si [13]. Note that the In0.53 Ga0.47 As tight-binding parameters have been optimized to give the exact band gap and effective masses as function of the In concentration. The atomistic Schr¨odinger and Poisson equations are solved self-consistently in the Non-equilibrium Green’s Function formalism [14] and in the finite element method, respectively. Since UTB structures are two-dimensional, the third dimension is assumed periodic and modeled via a momentum (kz ) dependence of all the physical quantities. The source and drain contact resistances are added as a post-processing step after the complete intrinsic device characteristics were obtained. Electron-phonon scattering is computed in the self-consistent Born approximation, in the deformation potential theory, with diagonal scattering selfenergies coupling all the momentum together and the complete dispersion of the confined phonon [15]. The DG UTB FETs considered in this work are schematized and described in Fig. 1. They follow the prescriptions from the ITRS regarding high performance logic devices planned for the year 2020 (gate length Lg =10.7 nm, body thickness tbody =5 nm, EOT=0.59 nm, VDD =0.68 V, contact series resistances RS =RD =60 Ω·µm). The OFF-current (IOF F =Id at Vgs =0 V and Vds =VDD ) is set to 0.1 µA/µm in all the cases by shifting the entire I-V curve, which can be obtained by changing

IEEE ELECTRON DEVICE LETTERS, VOL., NO., ?? 2011

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Fig. 1. Schematic view of the double-gate ultra-thin-body n-FETs considered in this work. (a) (111) GaSb with transport along the axis, (b) (100) strained-Si with transport along the crystal axis and a 1% uniaxial tensile strain along the same axis corresponding to a stress value of 1.7 GPa in the channel, which is larger than the current limit of ≤1 GPa [8], [9], and (c) (100) In0.53 Ga0.47 As with as transport direction. The source and drain extensions Ls and Ld are set to 15 nm, the gate length Lg to 10.7 nm, the body thickness tbody to 5 nm, and the insulator layers have a physical thickness tox =3 nm corresponding to a EOT=0.585 nm (ǫR =20). The interface between the different channel materials and the surrounding insulator layers is assumed perfect. The supply voltage VDD is equal to 0.68 V. In all these devices, the third direction z is modeled via a kz -dependence of the bandstructure properties. The subplot (d) shows the doping profile of the three devices including gate underlap (1 nm) and a doping slope of 1 nm/dec. Strained-Si can be more heavily doped (1e20 cm−3 ) than III-V (5e19 cm−3 ).

the work function of the metal gate. By applying a tensile uniaxial stress along the [110] crystal axis to the Si device, it is expected that its transport effective mass is reduced and better performance is obtained [10]. The In concentration x in the unstrained Inx Ga1−x As FET is equal to 53% to suppress bandto-band tunneling and hole-induced barrier lowering which start to occur around x=75% for VDD =0.68 V. A 1 nm gatesource/drain underlap is used, as shown in Fig. 1 (d), to minimize source-to-drain tunneling and widen the effective gate length. Hence, for example, the sub-threshold slope (SS) of the Si device can be decreased from more than 100 mV/dec with 1 nm gate-source/drain overlap down to 82 mV/dec with 1 nm underlap. The bandstructure (at kz =0) of the GaSb, strained-Si, and In0.53 Ga0.47 As UTB is reported in Fig. 2. For convenience, the same energy window (0.5 eV) and wave vector extension (-1.5≤ k ≤1.5 1/nm) are selected. The GaSb UTB is characterized by the presence of many energy subbands, most of them originating from the bulk L-valley, resulting into a large DOS, as for the strained-Si case, but contrary to In 0.53 Ga0.47 As where only 4 subbands can be observed (2 degenerate bands due to spin). The inversion charge density at the top-of-thepotential-barrier [16] grows therefore faster as function of the internal Vgs in GaSb than in In0.53 Ga0.47 As and is almost

Fig. 2. Conduction bandstructure of the (a) GaSb, (b) strained-Si, and (c) In0.53 Ga0.47 As ultra-thin-body at kz =0. In the subplot (a), the two bold bands originate from the bulk Γ valley while the other bands are projected from the L-valley. Subplot (d) shows the 2-D charge density extracted at the top-of-thepotential-barrier along the channel [16] at an intrinsic voltage Vds,int =0.4 V as function of the intrinsic gate voltage Vgs,int . The voltage Vds,int =0.4 V corresponds to an extrinsic voltage Vds,ext =VDD close to the FET ON state.

similar as in strained-Si as illustrated in Fig. 2 (d). At the same time, the electron velocity is larger in GaSb than in strained-Si (stronger band curvature), but smaller than in In 0.53 Ga0.47 As. The ballistic output and transfer characteristics of the three different devices are given in Fig. 3 and some important metrics such as SS, DIBL, inversion charge, and injection velocity are summarized in Table I. The sub-threshold performances are relatively similar with a larger SS for In 0.53 Ga0.47 As due to its lower band gap and transport effective mass. (111) GaSb exhibits the highest ballistic ON-current (2265 µA/µm) due to a large inversion charge at the top-of-the-potential-barrier and a relatively good electron injection velocity (vinj =1.67e7 cm/s), about 50% larger than in strained-Si, but more than 2× lower than in In0.53 Ga0.47 As. The drive current of the strainedSi FET follows that of the GaSb one and outperforms that of the InGaAs FET, which suffers from its very low inversion charge, barely compensated by its high electron velocity. However, in terms of ballistic ON-current, the advantage of GaSb over InGaAs is limited to ∼30%. More interesting is the behavior of the three DG UTB FETs in Fig. 1 when electron-phonon scattering is turnedon. Due to its computational burden, the application of this model is restricted to the calculation of the FET ON-current. First, a simulation with electron-phonon scattering is performed using the intrinsic Vds and Vgs voltages extracted from the ballistic simulation to determine the ballistic ratio B=Iscatt /Iball , where Iscatt and Iball are the current with and without scattering at the same Vds and Vgs , respectively. Then, since Iscatt is smaller than Iball , the intrinsic voltages Vds and Vgs increase when scattering is turned-on and this correction must be taken into account. Assuming that B does not vary much when Vds and Vgs slightly change, the ON-current of the DG UTB FET in the presence of electron-phonon scattering

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TABLE I S UMMARY OF THE PERFORMANCE METRICS ( SUB - THRESHOLD SLOPE SS, DIBL, ON- CURRENT ION , CHARGE AT THE TOP OF THE POTENTIAL BARRIER nT oB , ELECTRON INJECTION VELOCITY vinj ) EXTRACTED FROM THE BALLISTIC SIMULATIONS ( LABEL bal ) AND IN THE PRESENCE OF ELECTRON - PHONON SCATTERING ( LABEL scatt ) FOR THE G A S B , STRAINED -S I , AND I N 0.53 G A 0.47 A S DG UTB FET S AT VDD =0.68 V.

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Fig. 3. Ballistic current characteristics of the double-gate UTB FETs depicted in Fig. 1. (a) Output characteristics Id -Vds of the GaSb DG UTB FET at 0≤ Vgs ≤0.68 V in steps of 0.05 V, except for the two largest currents (Vgs =0.65 and 0.68 V). (b) Same as (a), but for the strained-Si device. (c) Same as (a) and (b), but for the In0.53 Ga0.47 As transistor. (d) Transfer characteristics Id Vgs of the three different n-FETs at Vds =0.05 V and 0.68 V on a logarithmic (left axis) and linear scale (right axis).

can be accurately computed. As a consequence of the multiple, very close, subbands that can be observed in Fig. 2 (a) and (b), the electronphonon scattering rate is larger in the GaSb and strained-Si devices (more bands mean more possibilities to scatter out of a state) than in the InGaAs one (BGaSb =73%, BSi =76%, and BInGaAs =99%). The ON-currents of the three different devices with electron-phonon scattering barely exceed the ITRS requirement for 2020 (1870 µA/µm), as reported in Table I and the advantage of GaSb over InGaAs becomes negligible (less than 15%, same as over strained-Si). III. C ONCLUSION In this letter, the performance of a (111)/ GaSb DG UTB FET has been compared to that of a strained-Si and InGaAs device. It has been shown that in GaSb the benefit of the DOS increase provided by the projection of bands originating from the bulk L-valley is partly compensated by an increase of the electron-phonon scattering rate, giving no drastic performance improvement as compared to strained-Si and InGaAs for logic applications. The inclusion of direct polar optical phonons, only present in III-V semiconductors, might further degrade the currents of the GaSb and InGaAs FET while interface roughness between the high-κ layers and the semiconductor channel or remote electron-phonon scattering might affect the three different structures in the same proportion. R EFERENCES [1] D. A. Antoniadis and A. Khakifirooz, “MOSFET Performance Scaling Part I: Historical Trends”, IEEE Trans. on Elec. Devices, vol. 55, pp. 1391, 2008. [2] D.-H. Kim, J. A. del Alamo, “30 nm E-mode InAs PHEMTs for THz and Future Logic Applications”, in IEDM Tech. Dig. 2008, pp. 719-722.

[3] P. M. Solomon and S. E. Laux, “The ballistic FET: Design, capacitance and speed limit”, in IEDM Tech. Dig., 2001, pp. 9598. [4] I. Vurgaftman, J. R. Meyer, and L. R. Ram-Mohan, “Band parameters for IIIV compound semiconductors and their alloys”, J. Appl. Phys., vol. 89, no. 11, pp. 58155875, Jun. 2001. [5] M. Rodwell et al., “IIIV FET channel designs for high current densities and thin inversion layers”, in Proc. DRC, 2010, pp. 149152. [6] R. Kim, T. Rakshit, R. Kotlyar, S. Hasan, and C. E. Weber, “Effects of Surface Orientation on the Performance of Idealized IIIV Thin-Body Ballistic n-MOSFETs”, IEEE Elec. Dev. Lett., vol. 32, pp. 746-748, 2011. [7] www.itrs.net/links/2009ITRS/Home2009.htm [8] S. E. Thompson et al., “Future of strained Si/Semiconductors in nanoscale MOSFETs”, in IEDM Tech. Dig. 2006, pp. 415-418. [9] B. Yang et al., “High performance nMOSFET with in-situ phosphorusdoped embedded Si:C (ISPD eSi:C) source-drain stressor”, in IEDM Tech. Dig. 2008, pp. 51-54. [10] K. Uchida, T. Krishnamohan, K. C. Saraswat, and Y. Nishi, “Physical mechanisms of electron mobility enhancement in uniaxial stressed MOSFETs and impact of uniaxial stress engineering in ballistic regime”, in IEDM Tech. Dig. 2005, pp. 129-132. [11] G. Hegde et al., to be published. [12] M. Luisier and G. Klimeck, “Investigation of Inx Ga1−x As Ultra-ThinBody Tunneling FETs using a Full-Band and Atomistic Approach”, in Proc. SISPAD 2009, pp. 67-70. [13] T. B. Boykin, M. Luisier, M. Salmani-Jelodar, and G. Klimeck, “Straininduced, off-diagonal, same-atom parameters in empirical tight-binding theory suitable for [110] uniaxial strain applied to a silicon parametrization”, Phys. Rev. B, vol. 81, pp. 125202, 2010. [14] M. Luisier, A. Schenk, W. Fichtner, and G. Klimeck, “Atomistic simulation of nanowires in the sp3 d5 s∗ tight-binding formalism: From boundary conditions to strain calculations,” Physical Review B, vol. 74, no. 20, p. 205323, 2006. [15] M. Luisier, “A parallel implementation of electron-phonon scattering in nanoelectronic devices up to 95k cores”, in Proc. of the 2010 ACM/IEEE conference on Supercomputing, pp. 1-11. [16] M. Lundstrom and Z. Ren, “Essential physics of carrier transport in nanoscale MOSFETs”, IEEE Trans. Electron Devices, vol. 49, pp. 133141, Jan. 2002.