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for the phase-controlled series-parallel resonant converter with a center-tapped rectifier at an output power of 52 W and a switching frequency of 127 kHz.

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IEEE TRANSACTIONS ON POWER ELEmONICS, VOL. 8,N0.3 , JULY 1993

Phase-Controlled Series-Parallel Resonant Converter Dariusz Czarkowski and Marian K. Kazimierczuk, Senior Member, IEEE

Abstract-A constant-frequency phase-controlled series-parallel resonant dc-dc converter is introduced, analyzed in the frequency domain, and experimentally verified. To obtain the dc-dc converter, two identical series-parallel resonant inverters are paralleled and the resulting phase-controlled resonant inverter is loaded by a voltage-driven rectifier. The converter can regulate the output voltage at a constant switching frequency in the range of load resistance from full-load resistance to infinity while maintaining good part-load efficiency. The efficiency of the converter is almost independent of the input voltage. For switching frequencies slightly above the resonant frequency, power switches are always inductively loaded, which is very advantageous if MOSFET’s are used as switches. Experimental results are given for the phase-controlled series-parallel resonant converter with a center-tapped rectifier at an output power of 52 W and a switching frequency of 127 kHz. The measured current imbalance between the two inverters was as low as 1.2:l.

I. INTRODUCTION

R

ESONANT power conversion technology offers many advantages in comparison with PWM one. Among them are low electromagnetic interference (EMI), low switching losses, small volume and weight of components due to high operating frequency, high efficiency, and low reverse-recovery losses in diodes because of low d i l d t at turn-off. However, most frequency-controlled resonant converters, e.g., [ 11-[4], suffer from a wide range of frequencies which is required to regulate output voltage against load and line variations. This makes it difficult to filter EM1 and effectively utilize magnetic components. As a remedy for these problems, several fullbridge topologies of phase-controlled resonant inverters and converters have been proposed and analyzed [SI-[ 151. In these circuits, the operating frequency can be maintained constant. A drawback of some phase-controlled converters is that as one leg of MOSFET switches is loaded inductively, the other is loaded capacitively [8]. For inductive loads, there is no tum-on loss, but there is tum-off loss. In contrast, for capacitive loads, there is no tum-off loss, but there is tum-on loss. However. for capacitive loads, the antiparallel diodes generate high current spikes and switching losses, considerably reducing efficiency. Therefore, for power MOSFET’s, the inductive load conditions are preferred [I], [ 14). References [ 131-[ 151 describe phaseshift resonant converter topologies in which all four MOSFET switches are inductively tumed-off and have very little penalty on conduction losses. This paper presents a new phase-controlled ceries-parallel resonant converter ( P C SPRC), its steady-state analysis in the Manuscript received July 5 , 1992: revised February 19, 1993. This work was supported by the National Science Foundation by Grant ECS-8922695. The authors are with the Department of Electrical Engineering, Wright State University, Dayton, OH 45435. IEEE Log Number 92093 1 1.

I

1

1

1 b

J

Fig. 1. Class D voltage-switching phase-controlled series-parallel inverter.

frequency domain, design equations, and experimental results. In the proposed circuit, two identical series-resonant circuits share the same ac load. At operating frequencies higher than the resonant frequency, power switches are loaded inductively. This allows an easy use of power MOSFET’s because snubbers are not required [I]. The proposed converter is efficient at part load because the amplitudes of the currents through the resonant circuits and switches decrease with increasing load resistance and are well balanced. Fig. 1 depicts a Class D phase-controlled series-parallel resonant inverter (PC SPRI). It consists of two conventional Class D voltage-switching series-parallel inverters [ 11-[4]: inverter 1 and inverter 2. Each inverter is composed of two switches with their antiparallel diodes, a series-resonant circuit L-Cl, and an ac load resistance 2R, connected in parallel with the capacitor C2/2. The parallel combination of capacitors C2/2 and load resistances 2R, results in capacitor Cz and the load resistance R,. If the load resistance R, in the inverter of Fig. 1 is replaced by one of the Class D voltage-driven rectifiers analyzed in [ 161 and shown in Fig. 2, a phasecontrolled series-parallel resonant converter is obtained. Its dc output voltage Vo can be regulated against load and line variations by varying the phase shift between the voltages that drive inverter 1 and inverter 2 while maintaining a fixed operating frequency and inductive loads for both pairs of switches. For inductively loaded switching legs, zero-voltage switching can be accomplished by adding a shunt capacitor in parallel with one of the switches in each leg and using a dead time in drive voltages of MOSFET’s [ 161-1 181. The converter is suitable for medium-to-high power applications with the upper switching frequency limit of 150 kHz, as recommended in 1141. 11. ANALYSIS OF CLASSD PHASE-CONTROLLED

SERIES-PARALLEL RESONANTINVERTER

A . Assumptions The analysis of the PC SPRI of Fig. 1 begins with the following simplifying assumptions: 1) The loaded quality factor Q L of the inverter is high enough so that the currents il and i 2 are sinusoidal.

0885-8993/93$0! 1.00 @ 1993 IEEE

IEEE TRANSACTIONS ON POWER El.JXlXONICS.

310

VOL. 8. N0.3 ,JULY 1993

Fig. 3. Equivalent circuit for the fundamental components of the Class D phase-controlled inverter of Fig. 1.

Using the principle of superposition, one obtains the output voltages due to the voltages V1 and V2,respectively,

+ -

where

"0 (c) Fig. 2. Class D voltage-driven rectifiers. (a) Half-wave rectifier. (b) Transformer center-tappedrectifier. (c) Bridge rectifer.

2) The power MOSFET's are modeled by switches with ON-resistances

+

A = G z / ( 2 c i ) ,C = ( C i C z / 2 ) / ( C i C z / 2 ) , =

WO

TDS.

3) The reactive components of the resonant circuits are

d m

is the corner frequency and QL

2 R i / ( ~ o L= ) 2Ri/Zo

is the normalized load resistance (or the loaded quality factor). The factor 2 arises from the configuration of a single inverter (1 or 2) in which the value of the parallel capacitor is C2/2 and the load is 2&. Using (3), (6), and (7), one arrives at the output voltage of the inverter

passive, linear, time invariant, and do not have parasitic resonances. 4) Components of both resonant circuits are identical.

B . Voltage Transfer Function of Class D Phase-Controlled Series-Parallel Inverter Each switching leg and the dc input voltage source VI of the inverter shown in Fig. 1 form a square-wave voltage source. Since the input currents 21 and 22 of the resonant circuits are sinusoidal, only the power of the fundamental component of each input voltage source is transferred to the resonant circuit. Therefore, the square-wave voltage sources can be replaced by sinusoidal voltage sources that represent the fundamental components as shown in Fig. 3. These fundamental components are described by v1 = V,cos(wt v2

+ -)42

that yields the dc-to-ac voltage transfer function of the Class D phase-controlled inverter

(1)

4 = V,cos(wt - -) 3

(2)

2 = -VI

(3)

Let us denote

where

v,

lr

and 4 is the phase shift between v1 and v2. The phasors of the voltages at the input of the resonant circuits are expressed by

v1= Vmej(@/2)

(4)

and W w wo A b ( - , A ) = (- - --). WO wo wA+1

CZARKOWSKI AND KAZIMIERCZUK: PHASE-CONTROLLED SERIES-PARALLEL RESONANT CONVERTER

311

Hence,

1 MI I

n

4.

2. I.

Fig. 4 shows ( M II as a function of different pairs of parameters selected from the set 4, QL, w / w o , and A, while the other two parameters are kept constant.

0. 6.

15

C. Currents and Powers of Class D Phase-Controlled Series-Parallel Inverter The phasors and the amplitudes of the currents through the resonant inductors are given by (13)-(16) below. Fig. 5 shows normalized amplitudes ImlZo/VI and I m 2 Z o / V ~as functions of Q L and 4 for f / f o = 1.1 and A = 1. It can be seen that the amplitudes decrease with 4 and the difference between them is low at any operating point in comparison with their absolute values. The maximum values of the normalized amplitudes ImlZo/VI and Im2Z0/V1occur at low values of 4. Equations (15) and (16) differ by terms containing szn($/2), which are close to zero at low values of 4.Therefore, the current imbalance between the two inverters is small. Since the amplitudes ImlZo/VI and Im2Zo/VI decrease with 4,the converter offers good part-load efficiency. Close examination shows that the peak transistor currents are twice as high as those in a full-bridge PWM converter at the same output power. To determine whether the switches are loaded capacitively or inductively, complex powers at the fundamental frequency

0.5

I MI I 1.5 1 .o

0.5 0.0 0.

4. 6. 0. (C)

'

0.

ab (d)

Fig. 4. Three-dimensional representation of the magnitude of the dc-to-ac transfer function of the phase-controlled Class D series-parallel inverter. (a) 1 . l f I ) as a function of Q L and 0 at f / f o = 1.1 and -4= 1. (b) l~bfllas a function of Q L and -4at f / f o = 1.1 and d = 0. (c) l M ~ las a function of f / f o and A at Q L = 1 and d = 0. (d) IMII as a function of QLand f / f o at A = 1 and o = 0.

are calculated and their angles are examined. Another method for determining the type of the load for the switches is to calculate the impedances Z1 = V1/11 and 2 2 = V2/I2 seen by the voltage sources w1 and 212 at the fundamental frequency.

1993

IEEE TRANSACnONS ON POWER EIEClXONICS. VOL. 8, NO3 , 312

r . \

, 120.

90. 60. 30. 200.

4. I.

-

200. 0.

1.

-

0.

0.

Qb.

(b) Fig. 5. Three-dimensional representation of the normalized amplitudes of the currents through the resonant circuits atf/ f o = 1.1 and A = 1. (a) I,,,~ZO/V1versus Q L and 4 (b) I,2Z0/1.j versus Q L and 0.

The complex power supplied by the voltage source

211

(b) Fig. 6 . Three-dimensional representation of the power angles 4"i and ~2 at f / f o = 1.1 and A = 1. (a) ~ ' versus 1 Q L and 0.(b) $9 versus Q L and 0.

is

1 s1 = -v11; 2 zvl' n2Z,b(

z .A )

d, z,A ) + szn(

-b( X

$)COS(

$) +j[a(

2,A) - c o s 2 ( $ ) ]

4 E ' A ) -Ji&b(EA

=) SI 1

e J W 1=

Pi

(17)

+jQi

where 1 5'1 1 is the apparent power, PI is the real power, Q1 is the reactive power, and $1 = Arg(S1) is the principal argument of SI.The power supplied by the voltage source v2 is

d

-b( 2,A ) - szn( $)cos( $ )

x

L

+ j [ a (E.-4) - cos2( $ ) ]

a( L WO . -4) - j & b (

= 1S2(e31112 = P2 + j Q 2

E.-4) (18)

where (5'2) is the apparent power, P2 is the real power, Q2 Fig. 7. Three-dimensional representation of the power angles zi, as a function of Qr. and o at f / f o = 1 and .4 = 1. is the reactive power, and $12 = Arg(S2) is the principal argument of S z . Fig. 6 depicts principal arguments $1 and The replacement of resonant capacitors C1 in Fig. 1 by $2 as functions of 4 and QL, for f / f o = 1.1 and A = 1. Close examination shows that $1 and $2 are always positive coupling capacitors results in a topology of a phase-controlled for f / fo > 1.03 at A = 1. This indicates that both inverter 1 parallel resonant inverter (PC PRI). Equations that govern the and inverter 2 are loaded by inductive loads for f/fo > 1.03 operation of PC PRI can be obtained from those given in this section by setting A = 0. It can be shown that, for the PC at A = 1.

CZARKOWSKI AND KAZIMIERCZUK: PHASE-CONTROLLED SERIES-PARALLEL RESONANT CONVERTER

PRI, all switches are loaded inductively for f / f o > 1.07. The replacement of the capacitor Cp by an open circuit results in a topology of a phase-controlled series resonant inverter (PC SRI). The condition of inductive loads for all switches in the case of PC SRI is f / f o > 1, i.e., operation above resonance. However, equations for PC SRI must be derived separately because w, requires a redefinition. For PC SPRI, the minimum operating frequency f m i n that ensures inductive loads for the switches is, therefore, in the range from f o to 1.07f0 and depends bn A. As was mentioned in the previous paragraph, the condition is f / f o > 1.03 for A = 1. The complex power of the fundamental component S supplied to the inverter is given by (19), (see (19) above) where (SI is the apparent power, P is the real power, and Q is the reactive power supplied to the inverter. The angle $ = Arg(S) is the power factor angle of S and is

+=

The power factor angle $ is depicted in Fig. 7 as a function of 4 and QL for f / f o = 1.1 and A = 1. Although the power of the higher harmonics is neglected, this figure gives useful information about the ratio of real to reactive power in the circuit. The output power of the Class D phase-controlled inverter is obtained from (19) .

The maximum value of the amplitude of the current through the resonant circuit Im(max)can be found from (15) for operation above the resonant frequency f o . Thus, one obtains the maximum value of the amplitude of the voltage across

313

resonant capacitor C1 Im(ma,,

Vclm = ___

(22)

WC1

and across resonant inductor L VLm = W L 4 n ( 7 n a x ) .

(23)

D. Efficiency of Class D PC SPRI The parasitic resistance of each series-resonant circuit is r = TDS rL rcl, where T D S = ( T D S 1 T D S ~ ) is / ~ the average resistance of the on-resistances of the MOSFET’s, r L is the ESR of the resonant inductor L, and rc1 is the ESR of the resonant capacitor C1. Therefore, one can find the conduction power loss in the series-resonant circuits of inverter 1 and inverter 2 as Prl = r&/2 and P r 2 = rIL2/2, respectively. Substituting (15) and (16) for Iml and Im2, one obtains the conduction loss in four MOSFET’s, two inductors L , and two capacitors C 1 (see (24) below). Using (9), the conduction loss in the capacitor C, is found as

+ +

+

where rc2 is the ESR of the capacitor C2. The total conduction loss in the inverter is

PT = P r s

f

PCZ

-

4v;

7r”2,2{[4$>A)l2

+ &[b(:,A)12)

W + 2rc2(1+ A)2(-)2cos WO

Neglecting switching losses and drive power and using (21) and (26), one arrives at the efficiency of the phase-controlled

314

IEEE TRANSACTIONS ON POWER ELECTRONICS, VOL. 8, N0.3 , JULY 1993

where V R and ~ 1 ~ ~ are 1 the~ amplitudes of the fundamental components of the rectifier input voltage and current, n is the transformer turns ratio, RL is the load resistance, Titr is the transformer efficiency, VF is the diode threshold voltage, Vo is the dc output voltage, T L F is the dc ESR of the filter inductor, RF is the diode forward resistance, a h w = ( d w ) / 2 = 0.1808, TC is the ESR of the filter capacitor, T L f is the ac ESR of the filter inductor, and L f is the filter inductance. The efficiency of the rectifier is

0.

60

200.-0.

'*

(at

where P2 and PO are the input and output powers of the rectifier, respectively. The ac-to-dc voltage transfer function of the rectifier is

Fig. 8. Three-dimensional representation of the inverter efficiency r ) ~as a function of Q and Q L at f / f o = 1.1,and A = 1, 2, = 202.9 0 , r = 2 . 1 R, and r c 2 = 0.1 R.

inverter (see (27)below). Fig. 8 shows the efficiency of the inverter as a function of phase shift 4 and normalized load resistance Q L for f / f o = 1.1, T = 2.1 0 , T C Z = 0.1 0 , and 2, = 202.9 0. It can be seen that the inverter has an excellent efficiency at both full and part loads. The efficiency at no load is zero, since there are resonant currents, but no output current. The dc-to-ac voltage transfer function of the actual inverter is

111. CLASSD VOLTAGE-DRIVEN RECTIFTERS A comprehensive Of the 'lass rectifiers of Fig. 2 was performed in [ 161. The key expressions, from the designer's point of view, are given below.

where V R is ~ the rms value of the rectifier input voltage. The peak values of the diode forward current and the diode reverse voltage are

and

B . Class D Transformer Center-Tapped Rectifier Fig. 2(b) depicts a circuit of a Class D transformer centertapped rectifier. The input resistance of the rectifier is

R = -VRWI 2 -

A . Class D HalfWave Rectifier Fig. 2(a) depicts a circuit of a Class D half-wave rectifier. The input resistance of the rectifier is

-

IRlin

VF [If-+ VO

.ir2n2RL

871tr

RF + T L F RL

+ act

(rc

+r L f ) R LI f 2q

(34) where act = ( d w ) / 2 = 0.0377. The ac-to-dc voltage transfer function of the rectifier is

315

CZARKOWSKI AND KAZIMIERCZUK PHASE-CONTROLLED SERIES-PARALLEL RESONANT CONVERTER

120

90 80

100

-

g !

80

-3

U

70 60

60

50

40

40

20 15

45

75

30 150

105

160

170

180

190

200

WV)

R L ( V

Fig. 9. Phase shift 4 versus load resistance RL at VI=150 V and Vo=28 V.

5 and V,= 28 V. Fig. 10. Phase shift 4 versus input voltage V I at R ~ = 1 R

.-...

70

C. Class D Bridge Rectifier

M-Sl

84 81

VR E

78

'

15

I

I

I

45

75

105

R L W

and

(a) 95.5 -

MR

,

95

-F

94.5

e

where ab = act. The peak value of the diode current is given by (32) and the peak value of the diode voltage is R

VDRM= -Vo. 2

94 93.5

(40)

i

15

45

75

105

R L P )

(b)

IV. DESIGNEXAMPLE The design procedure is illustrated by a design example of a transformer phase-controlled series-parallel resonant converter that consists of an inverter of Fig. 1 and a center-tapped rectifier of Fig. 2(b). The specifications of the converter are: VI = 150 to 180 V, Vo = 28 V, and R L , ~ = 15 ~ R.

Fig. 12. Calculated effciencies of the inverter and the rectifier versus load resistance RL at V1=150 V and Vo=28 V. (a) Effciency of the inverter 91. (b) Effciency of the rectifier 1 ) ~ .

The maximum value of the output power is PO,,, = = 52.3 W. Assume that the rectifier efficiency at

V$/&,in

IEEE TRAMACTIONS ON POWER ELELTKONICS, VOL. 8. N 0 . 3 , JULY 1993

-tapped Voltage .ircuit\. current

inductor II ,,, = 27'4 L The peA \ d u e s ot the diode forward current dnd the diode ItLerse \olt'ige are In11 = 1 87 A and I1111\1

=

V V k \ i ~Rt I ~ IcI I 11 Kr W I rs

To \ didcite the aid>u s . J hie'idboarti of the convertei designed 111 the pic\ IOLI\ \cctioii b a s built, ucing IRF630 MOSFET's (International Kcctifier) as switches, MBR 10100 Schottky diodes ( AZotorola). I, = 2x0 / / H . = 13.6 nF. ( ' ? = 27.2 nF. an isolation transfurnrcr with / I = 2. I,, = 1.:1 mH. and (.',f = IO0 /'I-. Ail R . I L A X 1 8 (Micro Linear) IC was uvxi to drile the MC)SFE'l"b ant1 shift the phase Q. The measured value of the resoiiaiit treclucncq' was 1 15.5 k H r was 127 full load is 94% and the transformer turn> ratio is 2:l. Llsing and the measured ~ a l u oc l the sv, itching frequency (34) and (36). one can calculate the minimum value of the AH[, The ON-resistaric.r. ot' cacti MOSFET was I ' L ) , ~= 0.4 (2. input resistance of the rectifier R,,,,,,, 7S.80 0.Consider the value of ESK of each resonant inductor at 116 kHr. was operation at full power. From ( 3 s ) . .Ill( = 0.422).Assume r 1 = 1..-) 0 . and ilie \ alue o f ESR of each resonant capacitor I ~: 0 . 2 f!, Hcnce. the parasitic resistance that r / I = 9G%, ( J L , , ? , , ) = 0.75. - / d o = I . 1. anti . I 1. From at 127 kH/ \vas was the relationship \ ; I / \ > = ~411,.1A11~ and (2X). 1.211( = O.-L>!H i u a s found to be 2. I i!. 'fhc ESK of the capacitor was From (13). (.os(o / 2 ) = 0.94, which corresponds to ('1 = 40" I ( .2 = 0. i 5 1 . 'I'hc e\timatccl tiuiihtormer efficiency /it). and is a suitable value for full power. Assuming = 115 07%. The measured \slur of' the tic rehistance of the filter inductor was 1.1 = 0 . 2 !! iriid the iic resistance of the tilter kHz. one obtains L = % l Z , , , , , , , / ( ~ ~ , C ) ~ ~ and C' = l / ( ~ i : L ) = 6.59 nF. Using ( 1 5 ) and (23). one inductor at I O 0 LHr \ h a > I , / I = 2. I C ? . The ESR of the filter can calculate the maximum value of the \,(>Itageacros'r the capacitor ( ' / wa\ I.( = i 0 in!!. The parameters of the diode 7.-) m(1. resonant capacitor I>,1,,1 = 22s V and aci.o\s the resonant iiiodel nerc 11. = ( 1 . 1 I'; t i i d li1 ,fq

1

1

1 :

Fig. 16. Voltage and current wavetomi\ of the converter with 'I center-rapped rectifier at Vi =I50 V. CFO. and a11 opcn circuit at the output. (a! Voltage I ' V J acre\\ capacitor C'l and ciirrt'nt\i~and 12 through the re~onant circuit\. Vertical : 20 V and 1 .4/div: Iiorimntal: 2 2 p r / div. th! Voltnge I , , ) and current (11 of rectitirr diode. Vci-tical : 5 V and I .A/di\: honroni:il: 2 / I \ / div.

The characteristics of the converter were measured as functions of the load resistance RI, and the dc input voltage 11 at a fixed dc output voltage 1;) = 28 I-. Measured and calculated characteristics of the phase i,, are plotted in Fig. 9 as functions of load resistance RL at 1; = IS0 V and 1;) = 3X V. Fig. 10 depicts plots of measured and calculated o as functions of I; at R L = 15 0 and 1;) = 28 V. Plots of the measured and calculated converter efficiency = r/r r/n (excluding the drive power) versus IZL are portraqed in Fig. 1 1 . The measured efficiency of the converter was 87% at full load and 75% at 20% of full load. The calculated efficiencies versus R L are shown separately for the invcrter and the rectifier i n Fig. 13. Fig. 13 displays plots of the measured and calculated converter efticiency I/ as a function of of 1; at R L = IS !! and I;,= 28 V. The efficiency was virtually independent of \ > . I t can be seen that the measured and calculated characteristics of the converter were in good agreement. Fig. 14 depict5 the uavefornis of the drain-to-source voltages and drain currents of the bottom transistor4 in inverter 1 and inverter 2 for the load resistances I?L = IS. 75. and 2500 ( 1 , which corresponds to full load. 30% of full load. and 0.6% of full load. respectively. Observe that the converter can regulate the output voltage from full load to no load. For an open circuit at the output, the waveforms of the currents through the remnant circuits iiIe displayd i n Fig. 15(a) and

the koltagc and current waveforms of a diode in the rectifier are shown in Fig. IS(b) at o= 180" and l i = IS0 V. The measured value of the output voltage for an open circuit at the output and at phase shift =180" was \;I =2 V. With an open circuit at the output. a decrease in c:, may lead to a voltage breakdown of the rectifier diodes. The behavior of the converter with a short circuit at the output was also tested and it was found that the operation is safe for any value of (1). Fig. 16(a) depicts the waveforms of the currents through the resonant circuits and Fig. 16(b)depicts the voltage and current waveforms of a diode in the rectifier u ith a short circuit at the 150 V and o= 0". Thc output current was output for I)= c j

IEEE 1'RANSACITIONS ON POWER ELECTRONICS, VOL. 8 , N0.3 , JULY 1993

(b) Fly. 18. Wa\efomi\of drain-to-\ource voltages I ' / ) . ~ and ( . / I . bottom transistor\ of the imerters at I = 28 V and I ? , = IS
o f rhe 150 \'.

I o = 2.3 A. The phase shift (,!I was measured observing the drain-to-source voltage waveforms of the switches. Fig. 17 shows the drain-to-source voltage waveforms of the bottom transistors at \ j =1SO V and R L = 15. 75. and 3500 ( 2 , The drain-to-source voltage waveforms of the bottom transistors for RL = I 5 Q and \ > = I S 0 and 300 V are displayed in Fig. 18. Fig. 19 shows the waveforms of the voltage across the capacitor ( ' 2 and the currents through the resonant circuits of the inverters for RL, = 15. 75. and 3500 5 1. I t can be seen that these waveforms were approximately 4inusoidal over a wide range of' the load resistance. which contimi5 the assumption 4)in Section 11-A. Fig. 19 shows that the imhalance of the currents through serie\ resonant circuits is about 1.3: I . VI. CONCLUSlOh A new phase-controlled series-parallel resonant converter has been introduced. analyzed. and experimentally verified. Its basic properties are summarized belom : I ) The converter can regulate the output voltage 1;) from full load to no load by varying the phase shift between the drive voltages of the two inverters while maintaining a tixed operating frequency. 3) Both slvitching legs are loaded b! inductive loads for ' , J , .: 1,0:!1 at - 1 = 1 (for ,j"f'. i l.ll7 at ai! . t i and ,f'

therefore powel MOSFET's mithout snubbers can be used as switches. 3) The part-load efficiency of the converter is high (Fig. 1 1 ). 4 ) The full-load efficiency of the converter is almost independent of I > . 5 ) The imbalance of amplitude\ of currents flowing through the resonant inductor5 i \ \'er\ IOU (i.e.. 1.2:1 ) over a full range of the load resistance and the line voltage. 6) The converter is inherently short circuit and open circuit protected by the impcdances of the resonant circuits. 7 ) The foregoiny benefitz Lire achieved at the expense of hi gher number of re wiant coni ponen t s .

CZARKOWSKI AND KAZIMIERCZUK: PHASE-CONTROLLED SERIES-PARALLEL RESONANT CONVERTER

REFERENCES R. L. Steigerwald, “A comparison of half-bridge resonant converter topologies,” IEEE Trans. Power Electron., vol. 3, pp. 174-182, Apr. 1988. A. K. S. Bhat and S. B. Dewan, “Steady-state analysis of a LCC-type commutated high-frequency inverter,” i d E E E Power Electronics Spec. Con$ Rec., Kyoto, Japan, Apr. 11-14, 1988, pp. 1220-1227. I. Batarseh, R. Liu, C.Q. Lee, and A.K. Upadhyay, “Theoretical and experimental studies of the LCC-type parallel resonant converter,” IEEE Trans. Power Electron., vol. 5 , pp. 14C150, Apr. 1990. M. K. Kazimierczuk, N. Thirunarayan, and S. Wang, “Analysis of seriesparallel resonant converter,” IEEE Trans. Aerosp. Electron. Syst., vol. 29, pp. 88-99, Jan. 1993. H. Chireix, “High power outphasing modulation,” Proc. IRE, vol. 23, pp. 1370-1392, Nov. 1935. F. H. Raab, “Efficiency of outphasing RF power-amplifier systems,’’ IEEE Trans. Commun., vol. COM-33, pp. 1094-1099, Oct. 1985. F. S. Tsai and F. C. Y. Lee, “ Constant-frequency, phase-controlled resonant power processor,” in IEEE Power Electron. Spec. Con$ Rec., 1986, pp. 617-622. I. J. Pitel, “Phase-modulated resonant power conversion techniques for high-frequency link inverters,” IEEE Trans. Industry Applicat., vol. IA22, pp. 10441051, Nov./Dec. 1986. F. S. Tsai, P. Materu, and F. C. Y. Lee, “Constant-frequency clampedmode resonant converter,” in IEEE Power Electron. Spec. Conf. Rec., 1987, pp. 557-566. Y. Chin and F. C. Y. Lee, “Constant-frequency parallel-resonant converter,” IEEE Truns. Industry Applicaf., vol. 25, pp. 133-142, Jan./Feb. 1989. R. J. King, “A design procedure for the phase-controlled parallelresonant inverter,” IEEE Trans. Aerosp. Electron. Syst., vol. AES-25, pp. 497-507, July 1989. M. K. Kazimierczuk, “Synthesis of phase-modulated resonant DC/AC inverters and DC/DC convertors,” IEE Proc., Pt B , Electric Power Applications, vol. 139, pp. 387-394, July 1992. P. Jain, “A constant frequency resonant dc/dc converter with zero Soc. Conf Proc., Oct. 1991, switching losses,” IEEE Industry Amlicat. .. pp. 1067-1073. P. Jain. D. Bannard. and M. Cardella, “A ohase-shift modulated double tuned resonant dc/dc converter: analysis and experimental results,’’IEEE Applied Poner Electron. Conf. Rec., 1992, pp. 90-97. P. Jain and H. Soin, “A constant frequency parallel tuned resonant dc/dc converter for high voltage applications,” IEEE Power Electronic,s Specialists Conf. Rec., 1992, pp. 71-76. M.K. Kazimierczuk, W. Szaraniec, and S. Wang, “Analysis and design of parallel resonant converter at high Q L,” IEEE Trans. Aerosp. Electron. Sysr , vol. AES-28, pp. 35-50, Jan. 1992. M. K. Kazimierczuk and W. Szaraniec, “Class-D zero-voltage-switching inverter with only one shunt capacitor,” IEE Proc., Pt. B . EIecrr-ic P o n w Appl., vol. 139, bp. 449456, Sept. 1992. ~

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[ 181 D. Czarkowski and M. K. Kazimierczuk, “Simulation and experimental results for Class D series resonant inverter,” IEEE 14th Int. Telecommun. Energy Conf. Rec. (INTELEC’YZ), Wash. DC, Oct. 4-8, 1992, pp.

153-159.

Dariusz Czarkowski was bom in Poland on April 1, 1965. He received the M.S. degree in electronics engineering and the M.S. degree in electrical engineering from the University of Mining and Metallurgy, Cracow, Poland, in 1988 and 1989, respectively. In 1989, he joined the Moszczenica Coal Mining Company and from 1990 he worked as an Inshctor at University of Mining and Metallurgy. He is presently a Research Assistant at the Department of Electrical Engineering, Wright State University, Dayton, OH. His research interests are in the areas of the modeling and control of power converters, electric drives, and modem power devices.

Marian K. Kazimierczuk (M’91-SM’91) received the M.S., and Ph.D., and D.Sci. degrees in electronics engineering from the bepartment of Electronics, Technical University of Warsaw, Warsaw, Poland, in 1971, and 1978, and 1984, respectively. He was a Teaching and Research Assistant from 1972 to 1978 and Assistant Professor from 1978 to 1984 with the Department of Electronics, Institute of Radio Electronics, Technical University of Warsaw, Poland. In 1984, he was a Project Engineer for Design Automation, Inc., Lexington, MA. In 1984-1985, he was a Visiting Professor with the Department of Electrical Engineering, Virginia Polytechnic Institute and State University, VA. Sihce 1985, he has been with the Department of Electrical Engineering, Wright State University, Dayton, OH, where he is currently an Associate Professor. His research interests are in high-frequency high-efficiency power tuned amplifiers, resonant dc/dc power converters, dc/ac inverters, high-frequency rectifiers, and lighting systems. He has published over 120 techrlical papers, more than SO of which appeared in IEEE Transactions and Journals. Dr. Kazimierczuk received the IEEE Harrell V. Noble Award for his contributions to the fields of aerospace, industrial, and power electronics in 1991. He is also a recipient of the 1991 Presidential Award for Faculty Excellence in Research and the 1993 Teaching Award from Wright State University

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