IEEE ELECTRON DEVICE LETTERS, VOL. 32, NO. 3, MARCH 2011
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Photosensitivity of Field-Effect Transistors Based on ZnO Nanowire Networks Shi-Ming Peng, Yan-Kuin Su, Fellow, IEEE, Liang-Wen Ji, Sheng-Joue Young, Cheng-Zhi Wu, Wei-Bin Cheng, Wan-Chun Chao, and Chi-Nan Tsai
Abstract—Self-assembling ordered ZnO nanowire (NW) network-based field-effect transistors (FETs) were fabricated by bottom-up photolithography. The devices had on/off ratios of > 104 , mobilities of ∼1.31 cm2 V−1 s−1 , and threshold voltages of ∼−1 V. Under UV treatment (340 nm, 57.46 mW/cm2 ), the devices exhibited relative photoconductivity ratio increases of 105 at a depletion state of −8 V gate bias (1.56 × 103 A/W). The fabricated FETs exhibit a broad range of electrical characteristics because of variation in the contact quality of the metal/NW, the dielectric/NW, and the NW/NW interfaces. However, the fabricated approach offers a cost-effective route to integrate self-assembled ZnO NW network-based FETs. Index Terms—Field-effect transistor (FET), photosensitivity, ZnO nanowire.
I. I NTRODUCTION
D
EVELOPMENTS in self-assembling nanostructures in the past decade have enabled the integration of nanowires (NWs) through a hybrid strategy combining “bottom-up” syntheses with “top-down” approaches. Potential applications in electronic devices have attracted tremendous interest. Recently, numerous techniques have been developed for directly transferring or printing micro/nanoscale semiconductors on desired support substrates, which enables the large-scale integration of Manuscript received October 28, 2010; revised November 9, 2010; accepted November 9, 2010. Date of publication January 6, 2011; date of current version February 23, 2011. This work was supported in part by the Advanced Optoelectronic Technology Center, National Cheng Kung University, Tainan, Taiwan, under projects from the Ministry of Education, by the Bureau of Energy, Ministry of Economic Affairs, under Grant 98-D0204-6, by the National Science Council of Taiwan under Grant NSC 96-2221-E-006-079-MY3, by the Center for Micro/Nano Science and Technology, National Cheng Kung University, by the TDPA “Lamp Development of White Light-Emitting Diode for Local Lighting” program under Contract TDPA 97-EC-17-A-07-S1-105, and by the National Science Council of the Republic of China in Taiwan under Contracts NSC 97-2623-E-168-001-IT and NSC-98-2221-E-150-005MY3. The review of this letter was arranged by Editor C. Jagadish. S.-M. Peng is with the Institute of Microelectronics, Department of Electrical Engineering, National Cheng Kung University, Tainan 701, Taiwan (e-mail:
[email protected]). Y.-K. Su is with the Institute of Microelectronics, Department of Electrical Engineering, Advanced Optoelectronic Technology Center, National Cheng Kung University, Tainan 701, Taiwan, and also with the Department of Electrical Engineering, Kun Shan University, Tainan 710, Taiwan (e-mail:
[email protected]). L.-W. Ji, C.-Z. Wu, W.-B. Cheng, W.-C. Chao, and C.-N. Tsai are with the Institute of Electro-Optical and Materials Science, National Formosa University, Yunlin 632, Taiwan (e-mail:
[email protected];
[email protected];
[email protected];
[email protected]; 21705@yahoo. com.tw). S.-J. Young is with the Department of Electronic Engineering, National Formosa University, Yunlin 632, Taiwan (e-mail:
[email protected]). Color versions of one or more of the figures in this letter are available online at http://ieeexplore.ieee.org. Digital Object Identifier 10.1109/LED.2010.2094600
NW arrays for electronic applications [1]. The experimental studies in NW networks report substantial performance improvements in various devices [2]–[4], mainly due to the intrinsic carrier-transport mechanism, large-area junctions, and low power consumption. ZnO has attracted tremendous interest as a promising material for optoelectronic devices, owing to its direct wideband gap of 3.37 eV and exciton binding energy of 60 meV at room temperature. In particular, 1-D ZnO nanostructures have been extensively studied and can be used as multifunctional building blocks for versatile applications [2]–[7]. Among them, ZnO NW field-effect transistors (FETs) have potential for use in the next-generation optoelectronic device owing to their superior carrier transportation channels, high transparency, mechanical flexibility, and the fact that they can be used to make displays with low power consumption. In recent years, some investigation has involved the fabrication of multiple ZnO NW FETs by a hydrothermal method [2], [8], which have a range of potential applications because they can be manufactured at a low temperature on large-area flexible substrates. This letter demonstrates a fabrication strategy that combines the conventional photolithography technique with selfassembling growth to obtain ordered ZnO NW networks for FETs. To further characterize the ZnO NW photosensitivity, the relative photoconductivity and photoresponsivity of ZnO NW network FETs are also discussed. II. E XPERIMENT A SiO2 film (εr = 3.9) was first deposited on the indium tin oxide glass substrate by radio frequency (RF) magnetron sputtering at room temperature. The growth conditions were a chamber working pressure of ∼2 × 10−2 torr, an RF power of 100 W, and a gas mixing ratio of Ar/O2 = 10/1. The ZnO seed layer (200 nm) was covered with a layer of Ti/Au metal and defined by photolithography. The Ti/Au (100 nm/50 nm) contact pads were deposited on the ZnO seed layer by electron beam evaporation. Liftoff processes were used to obtain the ZnO seed layer with Ti/Au metal on the top. Finally, ZnO NW networks were synthesized by a hydrothermal decomposition method. The details of the seed layer and ZnO NW growth processes were reported by the authors in a previous study [9]. The device channels in this letter were 80 μm wide and 8 μm long. Fig. 1(a) shows a schematic representation of the bottom-contact-type FETs with the ZnO NW network channel layer. An HP-4156C semiconductor parameter analyzer was used to measure the current–voltage characteristics of the proposed ZnO devices.
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IEEE ELECTRON DEVICE LETTERS, VOL. 32, NO. 3, MARCH 2011
Fig. 1. (a) Schematic of a fabricated bottom-contact-type FETs with ZnO NW networks. (b) FE-SEM top-view image.
Fig. 2. Raman scattering spectra result of ZnO NW network devices.
Spectral responsivity measurements were obtained using the TRAIX 180 system with a 300-W xenon arc lamp light source and a standard synchronous detection scheme. III. R ESULTS AND D ISCUSSION Fig. 1(b) shows the low- and high-magnification [inset of Fig. 1(b)] FE-SEM images of the ordered-assembly NW devices. The laterally aligned ZnO NW arrays were selectively grown across the gap between the source and drain electrodes because the preexisting sidewall seed layer is used as a nucleation site for further growth in the self-assembly of ordered ZnO NW networks. These NW/NW and metal/NW junction networks provide an electrical conducting path. Fig. 2 shows the internal stresses in the NW networks, which were revealed by micro-Raman spectral analysis. The E2 (high) mode is typically used to analyze stress state in films and nanostructures. The E2 (high) peak was shifted to higher wavenumbers than that in vertically aligned NWs (437 cm−1 ) or in bulk unstrained ZnO. Restated, biaxial compressive stress in the inward radial direction induced piezoelectric potential by polarization of cations (Zn2+ ) and anions (O2− ) in the NW. Simultaneously, electrons are trapped in the polarization region, reducing the effective area of the channel [5]. Fig. 3(a) and (b) shows the output and transfer characteristics for ZnO NW network FET devices, respectively. The output curves exhibited pinchoff behavior and good modulation of the channel conductance by the applied gate voltage. The gate voltage (VG ) was swept from −13 to 20 V at a constant drain–source voltage (VDS ) of 20 V. The transfer curve for the multiple-NW devices exhibited a normally on n-channel
Fig. 3. (a) Typical FET output characteristics. (b) (IDS , black line) Transfer, (IGS , green line) gate leakage current versus gate voltage, (gm , blue line) transconductance, and (340 nm, violet line) UV-treatment characteristics based on a ZnO NW network.
depletion mode, which implied a nonzero current at zero gate bias and negative threshold voltages (Vth is about −1 V). The on/off-current ratio exceeded 104 , and the subthreshold swing of SS = (dVgs )/[d(log Ids )] was about 2.9 V/dec, respectively. The maximum gate leakage current (rightmost axis) remained lower than 2 nA as a function of VG . The transconductance (gm = dIds /dVg ) curves based on the transfer characteristics indicate that the approximate value was 3 μS. The saturation field effect mobility (μsat ) can also be calculated using the MOSFET model, which can be expressed as [8] μsat =
2IDS Ci (Weff /Leff )(VGS − Vth )2
(1)
where Ci is the capacitance per unit area of the gate insulator and Weff /Leff is the effective width/length ratio. The mobility extractions in network devices are ambiguous since the effective network path (Weff /Leff ) is difficult to estimate in advance; thus, the channel in this letter was designated a full coverage channel for simplicity. The extracted value of μsat was 1.31 cm2 V−1 s−1 , which was comparable to that in the dense layer of interconnected in-plane ZnO nanorod transistors [8]. After UV treatment (340 nm, 57.46 mW/cm2 ), the devices exhibited lower on/off ratios. The numerous interfacial charges that form when additional photocarriers are redistributed become trapped at the NW–dialectric interfaces through the gate electric field. To further characterize ZnO NW photosensitivity,
PENG et al.: PHOTOSENSITIVITY OF FIELD-EFFECT TRANSISTORS BASED ON ZnO NANOWIRE NETWORKS
the relative photoconductivity (γ) and photoresponsivity (R) of the FETs can be expressed as [10], [11] IDS (photo) −IDS (dark) Signal Iph γ= ≈ = N oise IDS (dark) IDS (dark) R(A/W ) =
Iph Popt
(2) (3)
where Iph is the drain photocurrent, IDS(photo) is the drain current under UV treatment, and IDS(dark) is the drain current in darkness. The varying carrier concentration in the NW channel usually represents the behavior of the accumulation and depletion of FET modes by gate voltage modulation. The calculations for device properties indicated that the relative photoconductivity ratio was 105 higher at a depletion state of −8 V gate bias (1.56 × 103 A/W) than that at an accumulation state of +20 V. Therefore, the relative photoconductivity ratio could be improved by gate voltage modulation. The fabricated FET devices (15 samples) exhibit a broad range of electrical characteristics [threshold voltage (−1.5 to 8 V), transconductance (2 to 20 μS), subthreshold swing (2.4 to 8.2 V/dec), mobility (0.2 to 8.81 cm2 V−1 s−1 ), and on/off current ratio (1.63 × 102 to 7.74 × 106 )] because of variation in the contact quality of the metal/NW, the dielectric/NW, and the NW/NW interfaces. Although the intersection and stacking of the NWs cause a contact screening effect, the multi-NWs ensure multiple channel paths in the channel layer and enhance high drain currents. Recently, Ko et al. [2] have reported the all-solution-processed low-temperature zinc oxide NW network transistor. The experimental result reveals poor modulation of the channel conductance by the applied gate voltage; because the electronic path between two planar electrodes is blocked, a complex NW network path and some of the NWs lie far away from the gate. In this letter, the self-assembly of ordered ZnO NW networks of FETs improved ineffective and weak modulation of the channel path because the well-ordered NW networks are laid on the dielectric/bottom gate. The devices thus formed good modulation of the channel conductance by the applied gate voltage. However, the effective electronic path and the ability to control the gate control ability would improve the device performance by allowing the NW density and surrounding- and double-gate structures to be controlled, potentially strengthening the charge coupling between the gate dielectric and the channel layer.
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IV. C ONCLUSION In summary, this letter has demonstrated the fabrication of bottom-contact-type FETs with ZnO NW network channel layers by the “bottom-up” low-temperature chemical method and conventional photolithography. The fabricated FET devices exhibit a broad range of electrical characteristics because of variation in the contact quality of the metal/NW, the dielectric/NW, and the NW/NW interfaces. However, the fabricated approach is cost effective and has potential applications in large-scale displays. Future applications may improve flexibility, high-sensitivity photodetection, and transparency. R EFERENCES [1] Z. Fan, J. C. Ho, T. Takahashi, R. Yerushalmi, K. Takei, A. C. Ford, Y. L. Chueh, and A. Javey, “Toward the development of printable nanowire electronics and sensors,” Adv. Mater., vol. 21, no. 37, pp. 3730– 3743, Oct. 2009. [2] S. H. Ko, I. Park, H. Pan, N. Misra, M. S. Rogers, C. P. Grigoropoulos, and A. P. Pisano, “ZnO nanowire network transistor fabrication on a polymer substrate by low-temperature, all-inorganic nanoparticle solution process,” Appl. Phys. Lett., vol. 92, no. 15, pp. 154102-1–154102-3, Apr. 2008. [3] H. E. Unalan, Y. Zhang, P. Hiralal, S. Dalal, D. Chu, G. Eda, K. B. K. Teo, M. Chhowalla, W. I. Milne, and G. A. J. Amaratung, “Zinc oxide nanowire networks for macroelectronic devices,” Appl. Phys. Lett., vol. 94, no. 16, pp. 163501-1–163501-3, Apr. 2009. [4] Y. K. Chang and F. C. N. Hong, “The fabrication of ZnO nanowire field-effect transistors by roll-transfer printing,” Nanotechnology, vol. 20, no. 19, pp. 195302-1–195302-6, May 2009. [5] X. Wang, J. Zhou, J. Song, J. Liu, N. Xu, and Z. L. Wang, “Piezoelectric field effect transistor and nanoforce sensor based on a single ZnO nanowire,” Nano Lett., vol. 6, no. 12, pp. 2768–2772, Dec. 2006. [6] L. W. Ji, S. M. Peng, Y. K. Su, S. J. Young, C. Z. Wu, and W. B. Cheng, “Ultraviolet photodetectors based on selectively grown ZnO nanorod arrays,” Appl. Phys. Lett., vol. 94, no. 20, pp. 203106-1–203106-3, May 2009. [7] Y. K. Su, S. M. Peng, L. W. Ji, C. Z. Wu, W. B. Cheng, and C. H. Liu, “Ultraviolet ZnO nanorod photosensors,” Langmuir, vol. 26, no. 1, pp. 603–606, Nov. 2010. [8] B. Sun, R. L. Peterson, H. Sirringhaus, and K. Mori, “Low-temperature sintering of in-plane self-assembled ZnO nanorods for solution-processed high-performance thin film transistors,” J. Phys. Chem. C, vol. 111, no. 51, pp. 18 831–18 835, Dec. 2007. [9] L. W. Ji, S. M. Peng, J. S. Wu, W. S. Shih, C. Z. Wu, and I. T. Tang, “Effect of seed layer on the growth of well-aligned ZnO nanowires,” J. Phys. Chem. Solids, vol. 70, no. 10, pp. 1359–1362, Oct. 2009. [10] Z. M. Liao, Y. Lu, J. Xu, J. M. Zhang, and D. P. Yu, “Temperature dependence of photoconductivity and persistent photoconductivity of single ZnO nanowires,” Appl. Phys. A, vol. 95, no. 2, pp. 363–366, May 2009. [11] K. W. Lee, K. Y. Heo, and H. J. Kim, “Photosensitivity of solution-based indium gallium zinc oxide single-walled carbon nanotubes blend thin film transistors,” Appl. Phys. Lett., vol. 94, no. 10, pp. 102112-1–102112-3, Mar. 2009.
