Posicast-Based Digital Control of the Buck Converter - Semantic Scholar

IEEE TRANSACTIONS ON INDUSTRIAL ELECTRONICS, VOL. 53, NO. 3, JUNE 2006

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Posicast-Based Digital Control of the Buck Converter Qi Feng, Student Member, IEEE, R. M. Nelms, Fellow, IEEE, and John Y. Hung, Senior Member, IEEE

Abstract—The analysis, design, and microcontroller-based implementation of a digital controller using a Posicast element are presented for the buck converter. Posicast is a feedforward compensator that eliminates overshoot in system response, but the traditional approach is sensitive to variations in natural frequency. The new method described here reduces the undesirable sensitivity by using Posicast within a feedback loop. Compared to classical proportional–integral–derivative (PID) control, the new control results in lower noise in the control signal because the controller has a lower gain at high frequency. Furthermore, the authors’ experiments indicate that the new controller is less sensitive to the inherent time delay associated with a digital controller for a dc–dc converter. The authors present a straightforward method to design controller parameters from the small-signal averaged model of the converter dynamics. Experimental results for a PID-controlled converter and Posicast-type controller are also compared.

Fig. 1. Step response of a lightly damped system.

Index Terms—Buck converter, dc–dc converter, digital control, Posicast.

I. I NTRODUCTION

O

NE OF THE challenges in controlling the dc–dc converter is compensation for the converter’s nonlinear lightly damped dynamics, which are a function of load parameters. Advances in signal processing technology have spurred research in new control techniques to improve converter control. In this paper, the authors describe a new control technique based on the Posicast principle. Classical Posicast is a feedforward control method for lightly damped systems. Originally introduced in the late 1950s [1], [2] and further studied in the early 1960s [3], [4], the method rescales the reference input for a brief time period to eliminate the oscillatory response that is characteristic of lightly damped systems. Consider the step response shown in Fig. 1. The response is characterized by overshoot δ and the damped time response period Td . The block diagram shown in Fig. 2 describes the structure of a classical “half-cycle” Posicast. Classical Posicast is designed using knowledge of the step response overshoot δ and damped time response period Td . The frequency response of the Posicast element 1 + P (s) is shown in Fig. 3. Accurate knowledge of the step response parameters yields a compensator whose lowest frequency zeros cancel the

Manuscript received May 9, 2003; revised January 30, 2006. Abstract published on the Internet March 18, 2006. This work was supported by the Center for Space Power and Advanced Electronics with funds from NASA Grant NCC3-511, Auburn University, and the Center’s industrial partners. Q. Feng was with the Department of Electrical Engineering, Auburn University, Auburn, AL 36849 USA. He is now with the Shanghai Institute of Technical Physics, Chinese Academy of Sciences, Shanghai 200083, China. R. M. Nelms and J. Y. Hung are with the Department of Electrical Engineering, Auburn University, Auburn, AL 36849 USA (e-mail: nelms@ eng.auburn.edu; [email protected]). Digital Object Identifier 10.1109/TIE.2006.874418

Fig. 2. Classical structure of half-cycle Posicast.

Fig. 3. Frequency response of Posicast element 1 + P (s) for δ = 0.8 and Td = 2.43 ms.

dominant pair of plant poles. The controller is called “halfcycle” because the embedded time delay is one-half of the time period Td . More recently, researchers have extended the basic half-cycle Posicast structure to higher order [5], [6]. Since all classical Posicast methods are based on the feedforward cancellation of dynamics, researchers have observed sensitivity to modeling uncertainty, especially with respect to the response

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Fig. 4. Proposed hybrid feedback control using Posicast.

period Td . In summary, classical Posicast has the potential to eliminate the oscillatory response of a lightly damped system, but the drawback is sensitivity to modeling uncertainty. The Posicast approach can be more useful if the parametric sensitivity can be reduced. In this paper, the authors describe a new method to take advantage of Posicast while addressing the sensitivity issue. The control approach is experimentally verified on a buck-type dc–dc converter. This paper employs a Posicast element within a feedback system designed for the buck dc–dc converter. This hybrid control approach, first introduced in [7], not only enjoys the benefit of classical Posicast but also reduces sensitivity to parametric uncertainty because a feedback loop is employed. The new control system structure is illustrated in Fig. 4. In Section II, the design of the Posicast element and the compensator C(s) are described. The discrete-time implementation is explained in Section III. Computer simulation and experimental results are presented in Sections IV and V, respectively. The proposed control system is compared to the classical proportionalintegral-derivative (PID) control of a buck dc–dc converter. II. A NALYSIS AND D ESIGN The ideal dynamics of the buck dc–dc converter are [8] Gp (s) = =

Vout (s) D(s) s2 LC

Vin + s(L/R) + 1

(1)

where Vout output voltage; input voltage; Vin D on-time duty cycle (0–1); L filter inductance; C filter capacitance; R load resistance. The ideal dynamics model (1) ignores parasitic losses such as the series resistances of the inductor and capacitor; the impacts of these losses are discussed later. The undamped natural frequency ωn and damping factor ζ are given by 1 (2) ωn = LC 1 L ζ= . (3) 2R C From these two parameters, the damped time response period Td and the step response overshoot δ are computed from

Fig. 5. Variation of the damped period Td and overshoot ζ as a function of load resistance R.

standard second-order characteristics 2π ωn 1 − ζ 2 √ 2 δ = e−ζπ/ 1−ζ .

Td =

(4) (5)

Both of the parameters Td and δ vary with the load resistance R. Plotted in Fig. 5 is the characteristic of the time period Td versus load resistance for the cases L = 1, C = 1, and R ranging from 1 to 10 (see circles). The variation in step response overshoot δ is also plotted in the same figure (× marks). In this paper, a half-cycle Posicast transfer function is described as 1 + P (s), where the function P (s) is defined by P (s) =

δ −s(Td /2) e −1 . 1+δ

(6)

The key elements of the function P (s) are the scaling factor parameterized by δ and the time delay element parameterized by Td . A hybrid control scheme [7] is applied here to take advantage of the superior damping qualities of Posicast while reducing parametric sensitivity and load sensitivity through feedback action. A block diagram explaining the control method is shown in Fig. 4. Previous researchers [1]–[5] placed Posicast before the lightly damped system, but the authors recommend that Posicast be used within a feedback structure. The proposed control method is a significant departure from the classical Posicast. The overall system characteristic polynomial using classical half-cycle Posicast is found by simply removing the dominant lightly damped poles of the plant Gp (s). In the proposed method, the closed loop characteristic polynomial ∆(s) is given by ∆(s) = 1 + C(s) (1 + P (s)) Gp (s).

(7)

The design method for the proposed control system has two steps. First, the function P (s) is designed for the buck converter using (2)–(5). Next, the controller C(s) is designed to

FENG et al.: POSICAST-BASED DIGITAL CONTROL OF THE BUCK CONVERTER

Fig. 6. Frequency response of the Posicast-compensated function C(s)[1 + P (s)]Gp (s) for K = 35.

compensate the combined model [1 + P (s)]Gp (s). Classical frequency domain techniques are used. To counteract steadystate disturbances, a pure integrator-type compensator has been found suitable for the buck converter application, i.e., K C(s) = . s

Fig. 7. Comparison of PID- and Posicast-compensated open-loop transfer functions.

locus approach. In contrast, the open-loop frequency response is easily computed, as described in an earlier work [7]. B. Comparison to PID Control

(8)

The gain K is chosen as large as possible to minimize settling time, but not so large that overshoot is excessive. The complete hybrid controller transfer function is described by combining the compensator C(s) and the Posicast transfer function as K δ −s(Td /2) e −1 . C(s) (1 + P (s)) = 1+ s 1+δ

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(9)

The frequency response of the Posicast-compensated open-loop function C(s)[1 + P (s)]Gp (s) is shown in Fig. 6. The phase margin is about 70◦ and the gain margin is approximately 14 dB. The open-loop bandwidth is about 600 rad/s. Several design issues are further discussed in the next sections.

Comparing the proposed Posicast-based control to classical PID control yields useful insight. The frequency responses of the Posicast-compensated open-loop transfer function and a PID-compensated open-loop transfer function are plotted together in Fig. 7. Both approaches can be tuned to yield the same phase margin by adjusting the loop gain. For the same phase margin, however, the Posicast-compensated magnitude response is significantly suppressed at higher frequencies compared to that of the PID-compensated system. Therefore, the Posicast-compensated system suppresses high frequency noise much better than the PID approach. For identical phase margins, the Posicast-compensated approach yields a larger gain margin. C. Parasitic Effects

A. Comment on Design by Root Locus Root locus analysis and design methods are another widely used approach for feedback system analysis and design. The technique is especially insightful for designing phase lead controllers, and the authors have successfully used root locus analysis to design digital controllers for the dc–dc converter [9]. In the Posicast-based design approach, the open-loop function takes on a transcendental form, however, so that the root locus is not easily constructed. Methods dating back to the 1960s suggest that analytical methods can be employed since the usual geometric construction rules do not apply [10]. In practice, however, the analytical methods quickly become cumbersome, often involving either numerical solutions of nonlinear equation sets [11], numerical integration [12], or iterations around neighborhoods of solutions [13]. Root locus analysis of systems involving time delays remains an open research area [14]. To date, the authors have not been able to find insight from the root

The frequency responses shown in Fig. 7 include the effect of parasitic losses, i.e., the series resistances of the converter inductor and capacitor. Parasitic elements in the model increase the transfer function gain at high frequency. Since gain increase occurs at frequencies beyond the gain-crossover frequency, closed-loop stability is not significantly affected. Parasitic losses do not have a significant effect on the converter resonant frequency, but can have greater effect on the converter damping. Therefore, the effects of parasitic losses can be ignored in the computation of the time delay (4), but should be considered in adjusting the overshoot parameter (5). D. Digital Computation Delay The authors account for the computational time delay by augmenting the model (1) as G∗p (s) = Gp (s)e−sT .

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Lag time is introduced by the digital controller computation burden and is equal to one sampling period T . Computation time does not affect the dynamic properties of the open-loop converter, so both parameters Td and δ are independent of the computation time. Therefore, the Posicast function (6) has a significant advantage over the traditional PID controller in that the parameters of (6) can be determined without any consideration of the computation lag time. The effects of computational delay are easily compensated by adjusting the controller function C(s). In the case where C(s) is of the form shown in (8), the gain K is slightly decreased to maintain the desired stability margin.

TABLE I PARAMETERS OF THE EXPERIMENTAL SYSTEM

III. D IGITAL I MPLEMENTATION The proposed hybrid controller (9) can be straightforwardly implemented on a digital controller. A key element is the time delay function described by e−s(Td /2) . Accurate implementation of the time delay function is affected by the digital controller sampling period, so the following design approach is used. The controller sampling period T is selected so that the ratio is an integer number N , i.e., N = (Td /2) ÷ T.

(10) B. Implementation Summary

In this way, time delay can be implemented by storing sample values in the controller memory and shifting the values. A firstin–first-out (FIFO) queue is used to prevent the overflow of the memory address pointing to stored inputs, and the size of the queue equals the integer N . The remaining part of the hybrid controller (9) can be discretized using Euler’s approximation s≈

1 − z −1 T

(11)

where z is the standard Z-transform operator z = esT and T is the controller sampling period (not to be confused with the damped period Td ). Substituting (11) into (9) yields the discrete-time controller transfer function Gc (z) =

1 KT KT δ z −Td /2T + . 1 + δ 1 + z −1 1 + δ 1 − z −1

(12)

The notation · represents the floor operator. A. Design Example As an example, consider the model parameters listed in Table I. The time delay Td /2 is not an integer multiple of the sampling period T , so the integer closest to the ratio Td /2T was chosen, that is, N = 24; the corresponding delay time is 1.2 ms. For a gain K = 35, the resulting discrete-time controller transfer function is Gc (z) =

9.722 × 10−4 + 7.778 × 10−4 z −24 . 1 − z −1

(13)

The corresponding difference equation is uk = uk−1 + 9.722 × 10−4 ek + 7.778 × 10−4 ek−24 .

(14)

Shown in Figs. 8 and 9 are the program flowcharts to implement the control algorithm using a Texas Instruments TMS320F240 digital signal processor (DSP) evaluation module. Controller sample times are governed by the DSP’s built-in timer, which generates periodic interrupts. An interrupt service routine (see Fig. 9) is used to compute the difference equation, update the storage queue for the time delay in the function 1 + P (s), and also update the output control effort (duty cycle D). IV. S IMULATION R ESULTS A MATLAB simulation diagram is shown in Fig. 10. Included in the simulation is a band-limited white noise generator to study the effects of measurement noise. The converter model includes parasitic elements and the parameters are measured values, which are listed in Table I. Simulated output voltage, duty cycle, and measurement noise are plotted in Fig. 11. Measurement noise is attenuated greatly by the Posicast element, and the output settling time is about 3.7 ms. The effect of Posicast time delay is noticeable in the control duty cycle at time t = 1.2 ms, where there is an inflection in the plotted curve. V. E XPERIMENTAL R ESULTS The hybrid controller using Posicast within the feedback loop has also been tested experimentally. The parameters of the experimental buck converter and controller are listed in Table I. During experimental testing, several controller parameters were varied to study controller sensitivity. Measurements were recorded using a Tektronix TDS754D oscilloscope. The data were transferred to an Excel spreadsheet for plotting multiple responses on a single plot.


Fig. 8.

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Flowchart of controller main algorithm implemented on a microcontroller.

A. Steady-State Response

C. Discussions

Table II lists the converter output voltage (second column) for various input voltages ranging from 15 to 36 V (first column). The percent deviation of the output voltage from the reference voltage (Vref = 12 V) is shown at the right hand column. Experiments also confirm that changes in Posicast parameters have very little effect on the steady-state response of the converter.

Controller designs for dc–dc converters are often based on small-signal averaged models. The accuracy of a fixed model diminishes over large signal ranges, but converter control using the averaged model approach has been widely and successfully demonstrated. To a large degree, sensitivity to model variations is reduced by high loop gain in a properly designed feedback system. Controllers based on the PID transfer function are commonly used for dc–dc converter applications. Power converters have relatively low order dynamics that can be well controlled by the PID method. In fact, the PID controller is difficult to outperform for several reasons. The integrator increases the system type number, thus minimizing steady-state error. Two zeros in the controller make it possible to dampen resonant characteristics and improve transient response. Compared to many other control philosophies, the PID controller structure is fairly easy to explain and understand. Yet, there are some limitations of the PID controller. The integrator introduces additional phase delay and tends to slow the system response. The phase delay can be countered, however, by the two zeros of the PID controller. A minimum

B. Transient Response Families of dynamic responses are plotted in Figs. 12–15 for various values of each controller parameter. The experiments confirm that increasing the compensator gain K reduces the rise time at the expense of higher overshoot. An excess compensator gain can negate the performance gain achieved using Posicast. Changes of other controller parameters (Figs. 13 and 14) have a smaller effect than the change of gain K. The settling time of the system for K = 24, δ = 0.8, and Td = 2.4 ms is about 4 ms, which agrees with the simulated response plotted in Fig. 11. The Posicast-compensated converter maintains good transient response throughout a 4:1 range of load resistance (Fig. 15).

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Fig. 9. Flowchart of interrupt service routine implemented on a microcontroller.

of three gain parameters must be designed for controllers of the PID variety. Two parameters determine the compensators’ zero characteristics, and the third parameter is used to adjust the overall loop gain. One approach for tuning is to use the two zeros to cancel undesirable lightly damped poles in the converter model. The basic PID transfer function is not strictly proper, however, and amplification of high-frequency noise is a serious drawback in switching converter applications. Practical applications of the PID controller include one or more additional “instrumentation” poles to reduce the high frequency gain. As such, typical PID compensators have four to five gain coefficients to design. The pure integrator in the PID controller also develops problems if the control signal becomes saturated. This is the well-known integrator windup problem; many practical controllers substitute a lag compensator for the pure integrator. Alternatively, some steps to minimize windup effects must be designed and implemented. Research has also shown that PID-based control of the power converter may require additional algorithm modifications to achieve a combination of good transient and steady-state performance [15]. These modifications include the use of a control deadzone, an averaging digital filter to counteract switching noise, and the use of two sets of gains (one set for the transient period and the second set for steady-state performance). The application of PID-type controllers is further complicated in a digital implementation. There are two basic ap-


proaches to design the digital controller. By far, the simplest and most common approach is to design the compensator based on a continuous time (s-domain) model of the converter, and then convert or map the s-domain compensator function to a discrete-time (z-domain) function. Common mappings are the backward Euler and bilinear (also known as trapezoidal or Tustin’s rule) transformations. Conversion of s-domain functions to z-domain functions introduces distortion in both frequency and time responses. The Euler transformation is especially prone to time response distortion unless the sampling frequency is high relative to the compensator bandwidth. Bilinear transformation is more forgiving at lower sampling rates, but its frequency response distortion is also well known. Prewarping s-domain functions before mapping to the z-domain is a common but imperfect technique to counteract some of the frequency response distortions. Discrete-time design of digital compensators is the alternative to s-domain design and z-domain remapping. In discretetime design, the plant transfer function (converter model) is first developed in z-domain (discrete-time model). Subsequent designs using frequency response, root locus, or state variable methods are performed in the discrete-time framework. Although discrete-time design techniques are well documented in the literature, practical application is not as widespread as the s-domain design approach. Many engineers are more comfortable designing in the s-domain and are less familiar with the interpretation of sampled date time response characteristics on the unit circle (z-domain). In addition, s-domain frequency responses can be quickly sketched by hand, whereas discrete-time frequency response characteristics are cumbersome to produce without computer-based tools. The Posicast-based controller described in this paper produces many of the beneficial closed loop effects of the PID-type controller, such as good steady-state performance and good damping of resonant behavior. The proposed control approach has additional advantages that have been experimentally observed and verified. • Controller gain parameters are very easy to determine. • Control method produces a very good response that is predictable by the small-signal averaged continuous time model. • Key element of the Posicast controller structure is especially easy to implement in discrete-time hardware. • Frequency response of the Posicast element inherently reduces high-frequency noise, and the damping effect of Posicast eliminates the need for multiple sets of controller gains. • Proposed method has been experimentally confirmed to not require any of the additional modifications described earlier for PID control (deadzone, additional filtering, gain scheduling). The good experimental results discussed earlier are achieved using a single controller gain setting. • Experiments confirm that the gain margin of the Posicastcompensated converter is larger than that of the PIDcompensated controller; this was predicted earlier in the gain margin comparison of the respective compensated frequency responses (Fig. 7).


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Fig. 10. Simulation diagram in MATLAB.

Fig. 11. Simulated (top) output voltage and (middle) duty cycle, and (bottom) measurement noise for Vin = 20 and Vout = 12 V.

Fig. 12. Measured step responses for different compensator gains K. Fixed parameters δ = 0.8 and Td /2 = 1.2 ms.

TABLE II OUTPUT VOLTAGE VARIATIONS USING THE PROPOSED HYBRID CONTROLLER

Fig. 13. Measured step responses for different time delays Td /2. Fixed parameters K = 24 and δ = 0.8.

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Fig. 14. Measured step responses for different overshoot parameters δ. Fixed parameters K = 24 and Td /2 = 1.2 ms.

the time delay parameter Td . This observation is consistent with the fact that the buck converter resonant frequency does not change significantly with respect to either control input (duty cycle) or load resistance. The performance of the hybrid controller is more sensitive to the damping factor, so the authors recommend accounting for the parasitic losses when designing the overshoot parameter δ. A simple integral controller with a single gain K is used with the Posicast function. The integral action ensures proper steady-state response, much like a PID controller. In contrast to the PID controller, however, the proposed method only has a single compensator gain K to tune. Gain tuning is performed using well-established frequency domain techniques. The authors’ experimental results indicate that the hybrid Posicast-based controller is an effective approach for buck converter output voltage regulation. Prior work has also confirmed excellent results for boost converter control [16]. In summary, the hybrid Posicast-based feedback control approach can be applied to both buck and boost dc–dc converters. ACKNOWLEDGMENT The authors would like to thank the anonymous reviewers for their insightful suggestions. R EFERENCES

Fig. 15. Measured step responses for various load resistances R. Fixed parameters K = 24, δ = 0.8, and Td /2 = 1.2 ms.

VI. C ONCLUDING R EMARKS The authors have presented a Posicast-based control approach for a buck-type dc–dc converter. The control method uses a Posicast function within a feedback control structure to take advantage of Posicast’s superior damping qualities while reducing the sensitivity of classical feedforward Posicast. The design approach, including compensation for parasitic losses, has been presented along with a description of the digital implementation. The experimental performance (steady-state accuracy and settling time) is consistent with that predicted by simulation results. The Posicast function parameters Td and δ can be straightforwardly computed from the analytical ideal model of the buck converter. System performance is not very sensitive to

[1] O. J. M. Smith, “Posicast control of damped oscillatory systems,” Proc. IRE, vol. 45, no. 9, pp. 1249–1255, Sep. 1957. [2] ——, Feedback Control Systems. New York: McGraw-Hill, 1958. [3] G. Cook, “An application of half-cycle Posicast,” IEEE Trans. Autom. Control, vol. AC-11, no. 3, pp. 556–559, Jul. 1966. [4] ——, “Control of flexible structures via Posicast,” in Proc. Southeast. Symp. Syst. Theory, Knoxville, TN, Apr. 7–8, 1986, pp. 31–35. [5] N. C. Singer and W. P. Seering, “Preshaping command inputs to reduce system vibration,” Trans. ASME, J. Dyn. Syst. Meas. Control, vol. 112, no. 1, pp. 76–82, Mar. 1990. [6] G. Cook, “Discussion on preshaping command inputs to reduce system vibration,” Trans. ASME, J. Dyn. Syst. Meas. Control, vol. 115, no. 2, pp. 309–310, Jun. 1993. [7] J. Y. Hung, “Feedback control with Posicast,” IEEE Trans. Ind. Electron., vol. 50, no. 1, pp. 94–99, Feb. 2003. [8] R. P. Severns and G. E. Bloom, Modern DC-to-DC Switchmode Power Converter Circuits. New York: Van Nostrand Reinhold, 1985. [9] L. Guo, J. Y. Hung, and R. M. Nelms, “Digital controller design for buck and boost converters using root locus techniques,” in Proc. 29th Annu. Conf. IEEE Ind. Electron. Soc., Roanoke, VA, Nov. 2–6, 2003, pp. 1864–1869. [10] C. Chang, “An analytical method for obtaining the root locus with positive and negative gain,” IEEE Trans. Autom. Control, vol. AC-10, no. 1, pp. 92–94, Jan. 1965. [11] D. L. Spencer, L. Philipp, and B. Philipp, “Root locus design using Dickson’s technique,” IEEE Trans. Educ., vol. 44, no. 2, pp. 176–184, May 2001. [12] C. T. Pan and K. S. Chao, “A computer-aided root-locus method,” IEEE Trans. Autom. Control, vol. AC-23, no. 5, pp. 856–860, Oct. 1978. [13] I. Suh and Z. Bien, “A root-locus technique for linear systems with delay,” IEEE Trans. Autom. Control, vol. AC-27, no. 1, pp. 205–208, Feb. 1982. [14] J. J. Gribble, “Modified root locus plots for SISO systems with time delay,” IEEE Control Syst. Mag., vol. 13, no. 1, pp. 54–56, Feb. 1993. [15] L. Guo, J. Y. Hung, and R. M. Nelms, “PID controller modifications to improve steady-state performance of digital controllers for buck and boost converters,” in Proc. 17th Annu. IEEE Appl. Power Electron. Conf. Expo., Dallas, TX, Feb. 2002, pp. 381–388. [16] Q. Feng, J. Y. Hung, and R. M. Nelms, “Digital control of a boost converter using Posicast,” in Proc. 18th Annu. IEEE Appl. Power Electron. Conf. Expo., Miami, FL, Feb. 9–13, 2003, pp. 990–995.


Qi Feng (S’01) was born in Leshan, China, on June 1, 1975. He received the B.S. degree in electrical engineering from the Beijing University of Aeronautics and Astronautics, Beijing, China, in 1996, and the M.S. degree in electrical and computer engineering from Auburn University, Auburn, AL, in 2003. From 1996 to 2000, he was an Electrical Engineer at the Shanghai Aircraft Research Institute, China. He is currently an Assistant Researcher and a Project Leader at the Shanghai Institute of Technical Physics, Chinese Academy of Sciences, Shanghai, China,where his work specializes in the development of mixed-signal CMOS readout integrated circuits for infrared image sensors.

R. M. Nelms (F’04) received the B.E.E. and M.S. degrees from Auburn University, Auburn, AL, in 1980 and 1982, respectively, and the Ph.D. degree from the Virginia Polytechnic Institute and State University, Blacksburg, in 1987, all in electrical engineering. He is currently a Professor in the Department of Electrical and Computer Engineering, Auburn University. His research interests are in power electronics, power systems, and electric machinery. Dr. Nelms is a Registered Professional Engineer in the State of Alabama.

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John Y. Hung (S’79–M’80–SM’93) received the B.S. degree from the University of Tennessee, Knoxville, in 1979, the M.S.E. degree from Princeton University, Princeton, NJ, in 1981, and the Ph.D. degree from the University of Illinois, UrbanaChampaign, in 1989, all in electrical engineering. He is the holder of two U.S. patents in the area of control systems. He is currently an Associate Professor in the Department of Electrical and Computer Engineering, Auburn University, Auburn, AL. Prof. Hung served as an Associate Editor of the IEEE TRANSACTIONS ON CONTROL SYSTEMS TECHNOLOGY in 1997 and 1998, and the IEEE TRANSACTIONS ON INDUSTRIAL ELECTRONICS in 1996–2005. He is the Technical Program Co-Chair for the 2006 Annual Conference of the IEEE Industrial Electronics Society (IECON-2006, Paris, France), and the General Chair for IECON-2008 (Miami, FL). He also serves as the Treasurer of the IEEE Industrial Electronics Society. He has received several awards for his teaching and research, including a Best Paper Award from the IEEE TRANSACTIONS ON INDUSTRIAL ELECTRONICS .