Predictive Control of a Current Source Rectifier with Imposed Sinusoidal Input Currents P. Zavala∗ , M. Rivera† , S. Kouro∗ , J. Rodriguez∗ , B. Wu‡ , V. Yaramasu‡ , C. Baier† , J. Mu˜noz† , J. Espinoza§ , P. Melin§ ∗ Department
of Electronics Engineering, Universidad T´ecnica Federico Santa Mar´ıa, Valpara´ıso, CHILE, Email:
[email protected] of Industrial Technologies, Universidad de Talca, Curico, CHILE, Email:
[email protected] ‡ Department of Electrical and Computer Engineering, Ryerson University, Toronto, Canada Email:
[email protected],
[email protected] § Department of Electrical Engineering, Universidad de Concepci´ on, Concepci´on, CHILE Email:
[email protected],
[email protected]
† Department
Abstract—A new predictive control strategy for current source rectifiers which allows an effective control of source and load currents is presented in this paper. This method uses the commutation states of the converter in the subsequent sampling time according to an optimization algorithm given by a cost function and the discrete system model. The two control goals are: (a) regulation of dc-link current according to an arbitrary reference, and (b) a good tracking of the source current to its sinusoidal reference. The feasibility of the proposed method is verified by MATLAB/Simulink software.
N OMENCLATURE is vs ii vi 𝑣𝑑𝑐 𝑖𝑑𝑐 𝐶𝑓 𝐿𝑓 𝑅𝑓 𝐿𝑑𝑐 𝑅𝑑𝑐
Source current vector [𝑖𝑠𝐴 𝑖𝑠𝐵 𝑖𝑠𝐶 ]𝑇 Source voltage vector [𝑣𝑠𝐴 𝑣𝑠𝐵 𝑣𝑠𝐶 ]𝑇 Input current vector [𝑖𝐴 𝑖𝐵 𝑖𝐶 ]𝑇 Input voltage vector [𝑣𝐴 𝑣𝐵 𝑣𝐶 ]𝑇 DC-side voltage DC-side current Filter capacitor Filter inductor Filter resistor Load inductor Load resistor
I. I NTRODUCTION Current source converters (CSC) are commonly used in medium-voltage, high-power drives in the megawatt level such as pumps, fans, compressors, conveyors and ship propulsion [1]. The CSC is traditionally controlled with classic cascaded linear control loops (usually PI controllers), rotating frame coordinate transformations and a modulation stage [2]. The modulation methods used in practice for CSC are the trapezoidal pulse width modulation (TPWM) [3], off-line calculated pulse patterns with selective harmonic elimination (SHE) [4], and current space vector modulation (SVM) [5]. In order to keep lower switching frequencies, hybrid modulations combining TPWM and SHE are also used in practice, depending on the fundamental frequency (TPWM for lower frequencies and SHE for higher frequencies) [2]. 978-1-4799-0224-8/13/$31.00 ©2013 IEEE
Some of the challenges for the modulation stage of the CSC include contending with restrictions on some switching states; overcoming the trade-off of low switching frequency operation (to improve efficiency); and avoiding lower order harmonics to prevent resonance issues with the output filter and load (or input filter and grid for grid-tied CSC). In addition, neither TPWM nor SHE control the amplitude of the fundamental component generated by the CSC. Only the phase angle and fundamental frequency are controlled by the modulation; the rectifier controls the amplitude by adjusting the dc-current amplitude. This leads to lower dynamic performance since the large dc-choke causes slow dc-current regulation. On the other hand, the phase, frequency and amplitude of the fundamental can be controlled and the dc-current can be fixed when using current-SVM; this, however, results in a slightly higher THD (particularly low frequency harmonics), which could affect resonance issues of the converter. Finite control set model predictive control (FCS-MPC) [6], [7] has been demonstrated to be particularly useful for power converter topologies with diverse and complex control challenges and restrictions. The FCS-MPC has been introduced for matrix converters [8], [9], active front ends [10], and twolevel and multilevel inverters [11], [12]. The use of FCSMPC features power factor control and high-quality sinusoidal input currents [8], [9]. The FCS-MPC is inherently suitable to the limited number of switching states (control actions, or control set) of power converters and the discrete nature of digital implementation platforms such as Microprocessors, DSPs and FPGAs. A discrete-time predictive model of the system is used to predict future values of the variables for each possible switching state of the power converter. The predicted values are then used to evaluate the control goals such as: reference tracking, special system requirements (efficiency, harmonics, common-mode voltages, etc), constraints (saturation, forbidden switching states, etc.) and compensations (dead time compensation, voltage imbalance compensation, etc.) which are included in a cost function. The switching state that leads to the lowest cost and hence meets control goals best is then generated. Predictions can be done over two or more sample periods to achieve better performance [13], which
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is currently limited by model accuracy and computational capability. In this paper, a predictive current control scheme for a current source rectifier (CSR) is presented. The load current is directly controlled by the MPC strategy without the use of linear controllers or modulators. At difference of the already published works in [14]–[16], this strategy is complemented with a source current control, which is imposed to have a sinusoidal waveform and be in phase with its respective source voltage. In this way, control challenges of the CSC are met: reference tracking of phase, frequency and amplitude is achieved, and clean sinusoidal voltages and currents reduce resonances. The simulation results validate the proposed method. II. C URRENT S OURCE R ECTIFIER T OPOLOGY The CSR consists of an array of six unidirectional power semiconductor switches which feed a dc-load, as shown in Fig. 1. The converter operates by connecting at any given time one switch from the high side and one switch from the low side of the rectifier to the load. This constraint limits the rectifier to nine feasible switching states [2]. The input currents are given as a function of the switches and dc-side current, and the dc-side voltage are synthesized by the switches and input voltages as follows: (1) ii = sr 𝑖𝑑𝑐 , 𝑣𝑑𝑐 = sr 𝑇 vi ,
(2)
where sr corresponds to the switches matrix of the rectifier as follows: ⎤ ⎡ 𝑆1 − 𝑆4 (3) sr = ⎣ 𝑆3 − 𝑆6 ⎦ . 𝑆5 − 𝑆2 In addition, an input filter is necessary to avoid over-voltages s during the switching transitions and to avoid high 𝑑i 𝑑𝑡 . Its model is given by: 𝑑is + vi , v s = 𝑅 𝑓 i s + 𝐿𝑓 𝑑𝑡 i s = 𝐶𝑓
𝑑vi + ii . 𝑑𝑡
(4) (5)
On the load side, the mathematical model is given as follows: 𝑣𝑑𝑐 = 𝐿𝑑𝑐
𝑑𝑖𝑑𝑐 + 𝑅𝑑𝑐 𝑖𝑑𝑐 . 𝑑𝑡
(6)
In order to minimize the computational burden, the 𝛼𝛽 linear transformation is applied to all three-phase current and voltage vectors, defined as: ⎡ ⎤ ] 𝑢𝑎 [ ] [ 2/3 √ −1/3 −1/3 𝑢𝛼 ⎣ 𝑢𝑏 ⎦ , √ (7) = 𝑢𝛽 0 3/3 − 3/3 𝑢𝑐 where, the vector [𝑢𝑎 𝑢𝑏 𝑢𝑐 ]𝑇 is the natural frame current or voltage vector, and [𝑢𝛼 𝑢𝛽 ]𝑇 is the stationary frame vector.
𝑣𝑠𝐴 𝑣𝑠𝐵 𝑁
𝑣𝑠𝐶
𝑆1 𝑖𝑠𝐴
𝑅 𝑓 𝐿𝑓
𝑣𝐴
𝑆5
𝑖𝐴 𝑣𝐵
𝑖𝑠𝐵
𝑆3
𝑖𝑑𝑐
𝑅𝑑𝑐
𝑖𝐵
𝑣𝑑𝑐 𝑣 𝐶 𝑖𝐶
𝑖𝑠𝐶 𝐶𝑓 Fig. 1.
𝑆4
𝑆6
𝐿𝑑𝑐 𝑆2
Topology of the current source rectifier.
III. C LASSIC P REDICTIVE C ONTROL S TRATEGY A. Control Scheme A simplified block diagram of this control scheme is presented in Fig. 2, where superscript 𝑝 corresponds to 𝑘+1 sampling time. The predictive control scheme considers the discrete change of switching states at equidistant points with a constant sampling period. This state is selected out of the nine available possibilities in order to meet two requirements: first, the line side of the converter must deliver mainly active power, and second, on the load side, the current must follow the reference. The first condition is fulfilled by minimizing the instantaneous reactive power, which is indicated as follows: △𝑞𝑠 (𝑘 + 1) = ∣𝑣𝑠𝛼 (𝑘 + 1)𝑖𝛽𝑠 (𝑘 + 1) − 𝑣𝑠𝛽 (𝑘 + 1)𝑖𝛼 𝑠 (𝑘 + 1)∣, (8) where, 𝑘 is the sample instant. On the other side, the second condition requires a minimum error between the load current and its reference as: △𝑖𝑑𝑐 (𝑘 + 1) = ∣𝑖∗𝑑𝑐 − 𝑖𝑑𝑐 ∣,
(9)
where, 𝑖𝑑𝑐 is the load current and 𝑖∗𝑑𝑐 corresponds to the dc-side reference current. Both requirements are merged in a unique so-called cost function given by: 𝑔(𝑘 + 1) = △𝑖𝑑𝑐 (𝑘 + 1) + 𝜆𝑞 △𝑞𝑠 (𝑘 + 1).
(10)
The control scheme works as follows: at each sampling time, all possible switching states are used to calculate the predicted values of the load and input currents, which are then used to calculate the cost function 𝑔. Next, the switching state yielding the minimum value of 𝑔 will be applied to the converter [14]. The weighting factor 𝜆𝑞 decides whether priority is given to those states which minimize the error in the load current or those which improve the power factor. Basically, 𝜆𝑞 is adjusted empirically, such that the output current presents no noticeable deviations with respect to the reference. B. Calculation of the Predicted Values The mathematical model introduced from (1) to (6) provide the basis for predicting the input and output currents which will be evaluated by the cost function. By using (4) and (5), the prediction of the input current is computed from a first-order difference equation, as described in [17],
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is (𝑘 + 1) = 𝑐1 vs (𝑘) + 𝑐2 vi (𝑘) + 𝑐3 is (𝑘) + 𝑐4 ii (𝑘).
(11)
CSR
vs is
𝑅𝑓
𝐿𝑓
3
3 vi
Input Filter
𝑖𝑑𝑐
ii 3
3
3
is
𝑞𝑠𝑝 9
Cost Function Optimization
3
1 𝑞𝑠∗
vs is v i
[ [ B=
0 −1/𝐿𝑓 0 1/𝐿𝑓
𝑖𝑝𝑑𝑐 9
3
1 𝑖∗𝑑𝑐
Input Current Prediction
Output Current Prediction vi
1/𝐶𝑓 −𝑅𝑓 /𝐿𝑓
vs 3
−1/𝐶𝑓 0
.
(14)
for 𝑘𝑇𝑠 ≤ 𝑡 ≤ (𝑘 + 1)𝑇𝑠 , with 𝑇𝑠 being the sampling time, the discrete-time state space model is determined as [17]: ] [ ] [ ] [ vi (𝑘) vs (𝑘) vi (𝑘 + 1) =Φ +Γ , (15) is (𝑘 + 1) is (𝑘) ii (𝑘) Γ = A−1 (Φ − I2𝑥2 )B.
Solving (16), the coefficients are determined as: √ 𝐶 𝑐1 = 𝐿𝑓𝑓 𝑠𝑖𝑛(𝑇𝑠 𝑤𝑟 ), 𝑐2 = −𝑐1 , 𝑐3 = 𝑐𝑜𝑠(𝑇𝑠 𝑤𝑟 ), 𝑐4 = 1 − 𝑐3 .
(16)
(17)
The term 𝑤𝑟 corresponds √ to the resonance frequency, which is given by 𝑤𝑟 = 1/ 𝐶𝑓 𝐿𝑓 . On the load side, the output current prediction can be obtained using a forward Euler approximation given in (6), such that: 𝑖𝑑𝑐 (𝑘 + 1) = 𝑑1 𝑣𝑑𝑐 (𝑘) + 𝑑2 𝑖𝑑𝑐 (𝑘),
PLL
1
3
1 is ∗
𝜃 𝑣𝑠
9
Output Current Prediction
𝑒𝑞.(28) 𝐼𝑠
vi
𝑖∗𝑑𝑐
3 𝑖𝑑𝑐
𝜃
00 0
Source Current Reference
Fig. 3.
𝐼𝑠
Proposed predictive source and output current control scheme.
IV. P ROPOSED P REDICTIVE C ONTROL S TRATEGY: I MPOSED S INUSOIDAL S OURCE C URRENTS (13)
ii ∼ = ii (𝑘𝑇𝑠 ) ∼ = ii (𝑘),
9
𝑖𝑝𝑑𝑐
Cost Function Optimization
𝑉𝑠
,
]
is 𝑝
𝑣𝑑𝑐
Gate Signals
𝑒𝑞.(26)
]
vs ∼ = vs (𝑘), = vs (𝑘𝑇𝑠 ) ∼
Φ = 𝑒A𝑇𝑠 ,
𝐶𝑓
3 3 3 v s is v i
3 𝑖𝑑𝑐
Assuming that:
where,
3
3 vi
Load 𝑅𝑑𝑐 𝐿𝑑𝑐
𝑖𝑑𝑐
6
The coefficients 𝑐1 , 𝑐2 , 𝑐3 and 𝑐4 are defined so that the same values for the currents of the equivalent continuous-time system are obtained for all sampling instants. This is carried out through a state-space system with state variables is and vi and the input variables ii and vs as: ] [ ] [ ] [ v˙i vi vs =A +B , (12) is ii i˙s A=
ii
3
𝑣𝑑𝑐
Fig. 2. Predictive current control scheme with instantaneous reactive power minimization.
where,
𝐿𝑓
Gate Signals
6
3
𝑅𝑓
Input Filter
𝐶𝑓
Reactive Power Prediction
CSR
vs
Load 𝑅𝑑𝑐 𝐿𝑑𝑐
(18)
where, 𝑑1 = 𝑇𝑠 /𝐿𝑑𝑐 and 𝑑2 = 1 − 𝑅𝑑𝑐 𝑇𝑠 /𝐿𝑑𝑐 , are constants dependent on load parameters and the sampling time 𝑇𝑠 [17]. Note that the current is (𝑘 + 1) and 𝑖𝑑𝑐 (𝑘 + 1) depend upon 𝑆𝑟 (𝑘) through (1) and (2).
A new alternative for input-side control is presented in this section. The proposed control scheme is represented in Fig. 3, where unlike the previously mentioned strategy, the term that minimizes the instantaneous reactive power on the input side is replaced by a direct control of the source currents in order to force them to follow a sinusoidal reference. When a sinusoidal and clean ac-supply is presented, there are no differences between the two methods. As reported in [18], a sinusoidal source current reference can be obtained under balanced source voltages. However, when a distortion is present in the source voltage, this current reference is not sufficiently sinusoidal to obtain unity power factor. Here, a way to impose sinusoidal waveform of the source current is , is proposed as follows: according to the model observed in Fig. 3, the source voltage can be defined as vs = 𝑉𝑠 𝑒𝑗𝜃𝑣𝑠 , where 𝑉𝑠 and 𝜃𝑣𝑠 are the source voltage amplitude and phase angle, respectively. The algorithm considers the behavior of the mains assuming a non-distorted and balanced source. The aim is to calculate the ideal source current in order to force the system to have this amplitude and behavior. The algorithm also considers a sinusoidal current source waveform defined as is = 𝐼𝑠 𝑒𝑗𝜃𝑖𝑠 , where 𝐼𝑠 and 𝜃𝑖𝑠 are the source current amplitude and its phase angle, respectively. The source current amplitude (𝐼𝑠 ), in terms of load current amplitude 𝐼𝑑𝑐 , source voltage amplitude 𝑉𝑠 and system parameters, can be obtained using a power balance between the input and output side of the converter,
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𝑃𝑜 = 𝜂𝑃𝑖 ,
(19)
where 𝑃𝑖 is the input active power, 𝑃𝑜 is the output active power and 𝜂 is the efficiency of the current source rectifier. Considering a linear inductive load, the output active power 𝑃𝑜 can be expressed as: 𝑃𝑜 =
∗ 2 𝐼𝑑𝑐 𝑅𝑑𝑐 ,
(20)
𝐼𝑜∗
is the reference of the load current amplitude and where, 𝑅𝑑𝑐 the load resistance. The input power 𝑃𝑖 is defined as the dot product between the input voltage and current: 3 𝑃𝑖 = {vi ⋅ ii }, (21) 2 where, vi = 𝑉𝑖 𝑒𝑗𝜃𝑣𝑖 , ii = 𝐼𝑖 𝑒𝑗𝜃𝑖𝑖 , 𝜃𝑣𝑖 and 𝜃𝑖𝑖 are the phase angles of the input voltage and current, respectively, and 𝑉𝑖 , 𝐼𝑖 are respective amplitudes. The input filter is a linear system which then uses the input filter model described in (4) and (5) and expresses the filter parameters as impedances at a fixed source frequency of 𝜔𝑠 = 2𝜋𝑓𝑠 . The input voltage and current vectors can be expressed as follows: vi = vs − is (𝑗𝜔𝑠 𝐿𝑓 + 𝑅𝑓 ), vi . ii = is − 𝑗𝜔𝑠 𝐶𝑓
(22) (23)
Then by substituting (22) and (23) in (21), we obtain: 3 (24) 𝑃𝑖 = 𝐼𝑠 (1 − 8𝜋 2 𝑓𝑠2 𝐶𝑓 𝐿𝑓 )(𝑉𝑠 − 𝑅𝑓 𝐼𝑠 ), 2 then, by substituting (24) and (20) in (19), using a unitary displacement power factor in the mains (𝜃𝑖𝑠 = 𝜃𝑣𝑠 ), the quadratic equation for 𝐼𝑠 , is: ∗ 2 . 𝐼𝑠 (1 − 8𝜋 2 𝑓𝑠2 𝐶𝑓 𝐿𝑓 )(𝑉𝑠 − 𝑅𝑓 𝐼𝑠 )𝜂 = 𝑅𝐷𝐶 𝐼𝑑𝑐
(25)
Finally, by solving (25), the solution for the source current amplitude reference 𝐼𝑠∗ , is obtained : √ ∗ 2𝑘 𝑉𝑠 𝑘1 − 𝑉𝑠2 𝑘2 + 𝐼𝑑𝑐 3 𝐼𝑠 = , (26) 𝑘4 where, 𝑘1 = 8𝜋 2 𝑓𝑠2 𝐿𝑓 𝐶𝑓 − 1, 𝑘2 = 𝑘12 , 𝑘3 = 4𝜂 −1 𝑅𝑑𝑐 𝑅𝑓 𝑘1 ,
𝑘4 = 2𝑅𝑓 𝑘1 .
(27)
As observed in (27), the source current amplitude is obtained as a function of the efficiency 𝜂, the input filter parameters (𝐿𝑓 , 𝐶𝑓 ), the fundamental source voltage amplitude 𝑉𝑠 and output current amplitude 𝐼𝑑𝑐 . With a source frequency of 60[𝐻𝑧], the discriminant 𝑉𝑠2 𝑘2 + ∗ 2 𝐼𝑑𝑐 𝑘3 in (26) is less than zero if the filter resonant frequency is less than approximately 70[𝐻𝑧] for any converter or any value of load and source variables. The implementation of a Phase-Locked-Loop (PLL) is necessary to obtain the phase of the fundamental source voltage in order to generate the sinusoidal reference. Finally, the resulting source current reference is defined as: ⎫ 𝑖∗𝑠𝐴 = 𝐼𝑠 sin(𝑤𝑠 𝑡 + 𝜃) ⎬ 𝑖∗𝑠𝐵 = 𝐼𝑠 sin(𝑤𝑠 𝑡 − 2𝜋/3 + 𝜃) , (28) ⎭ 𝑖∗𝑠𝐶 = 𝐼𝑠 sin(𝑤𝑠 𝑡 + 2𝜋/3 + 𝜃)
where, 𝜃 is considered equal to zero in order to obtain unity power factor. So, with this reference source current expressed in 𝛼𝛽 coordinates, the input current error can be written as: △𝑖𝑠 (𝑘 + 1) = ∣𝑖∗𝑠𝛼 − 𝑖𝑠𝛼 ∣ + ∣𝑖∗𝑠𝛽 − 𝑖𝑠𝛽 ∣,
(29)
where, 𝑖∗𝑠𝛼 and 𝑖∗𝑠𝛽 correspond to the source current references and 𝑖𝑠𝛼 and 𝑖𝑠𝛽 are the source current predictions in sample 𝑘+1. The output side objective can be obtained by minimizing the error between the output current reference 𝑖∗𝑑𝑐 and its predicted value 𝑖𝑑𝑐 (𝑘 + 1) as mentioned in (9). Expressions of (9) and (29) are merged in a single cost function as indicated in (30), which is evaluated for every switching state, applying to the converter the switching state that minimizes this cost function. 𝑔 = △𝑖𝑑𝑐 (𝑘 + 1) + 𝜆𝑠 △𝑖𝑠 (𝑘 + 1).
(30)
Again, through appropriate selection of the weighting factor 𝜆𝑠 , a given total harmonic distortion (THD) of the input and output currents is obtained. First, 𝜆𝑠 is set to zero in order to prioritize the control of the output current. As such, the converter can control the output current while the input currents will be highly distorted. After that, factor 𝜆𝑠 is slowly increased, thereby lending more importance to the control of the source currents. The value of 𝜆𝑠 , which generates the minimal THD in both load and source current, is selected. V. S IMULATION RESULTS A. Classical Method: Minimization of the Instantaneous Reactive Power In order to validate both the classical method and the proposed method, simulation results have been obtained using MATLAB/Simulink. The controller operates with a sample time of 𝑇𝑠 = 20𝜇s. Thanks to technological advances in switch devices (such as Silicon Carbide SiC) and fast and powerful processors, this sampling time is not a problem nowadays. The control strategy is evaluated considering the cost function indicated in (10) and with a weighting factor 𝜆𝑞 equal to 𝜆𝑞 = 1.7𝑥10−7 which has been empirically adjusted as explained in [19], where first it is established in a value equal to zero in order to prioritize the control of the output current and later it is increased slowly aiming to obtain minimal THD of source and load currents. Fig. 4 shows the output current 𝑖𝑑𝑐 , and its reference 𝑖∗𝑑𝑐 , the source voltage 𝑣𝑠𝐴 and the source input current 𝑖𝑠𝐴 for steady and transient operation. In the first 0.45𝑠, a load reference of ∗ = 120𝐴 is applied, observing a THD of 4.30% in current 𝐼𝑑𝑐 𝑖𝑠𝐴 . A step change is given at 𝑡 = 0.45𝑠 where the load ∗ ∗ = 120𝐴 to 𝐼𝑑𝑐 = 96𝐴. reference 𝑖∗𝑑𝑐 is reduced from 𝐼𝑑𝑐 As shown in Fig. 4, a good tracking of the load current with respect to its reference can be obtained along with a good dynamic performance. On the input side, the source current is sinusoidal and in phase with its respective source voltage. Of course, due to the relation between the load current and input current, an amplitude change in source current 𝑖𝑠𝐴 given by (26) is observed. At low output current a major distortion of the source currents is observed.
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120
120
𝑖∗𝑑𝑐
110
𝑖𝑑𝑐
100 90 0.35
0.4
0.45
0.5
0.55
90 0.35
0.4
100
0
0
-100
-100 0.45 Time [s]
0.45
0.5
0.55
Fig. 4. Simulation results of predictive current control with instantaneous reactive power minimization: (top) output 𝑖𝑑𝑐 [A] current and its reference 𝑖∗𝑑𝑐 [A]; (bottom) source voltage 𝑣𝑠𝐴 [V/20] and phase current 𝑖𝑠𝐴 [A].
0.35
0.4
0.5
0.55
0.5
0.55
𝑖𝑠𝐴
𝑣𝑠𝐴
100
0.4
𝑖𝑑𝑐
100
𝑖𝑠𝐴
𝑣𝑠𝐴
0.35
𝑖∗𝑑𝑐
110
0.45 Time [s]
Fig. 5. Simulation results of predictive current control with imposed sinusoidal source current: (top) output 𝑖𝑑𝑐 [A] current and its reference 𝑖∗𝑑𝑐 [A]; (bottom) source voltage 𝑣𝑠𝐴 [V/20] and phase current 𝑖𝑠𝐴 [A]. 5
B. Proposed Method: Imposed Sinusoidal Source Current 4.8 THD %
Simulation results are presented in Fig. 5 which shows the source current 𝑖𝑠𝐴 and its respective source voltage 𝑣𝑠𝐴 , where the condition of unitary power factor is fulfilled. This condition is imposed by the source current reference 𝑖∗𝑠𝐴 = 𝐼𝑠 𝑠𝑖𝑛(𝑤𝑠 𝑡 + 𝜃), because the phase of this current reference is the same of the source voltage. In this method, the source current is forced to have a sinusoidal waveform with an amplitude of approximately 𝐼𝑠 = 87.5𝐴 before 𝑡 = 0.45𝑠 and amplitude of approximately 𝐼𝑠 = 56𝐴 after 𝑡 = 0.45𝑠. In addition, the THD of the source current is is 4.29%. As in the previous case, both input and output currents present a good dynamic behavior. The main difference is that the source current 𝑖𝑠𝐴 presents a faster dynamic response with the step change applied to the load and less distortion under low output current. Thus, the ripple associated to both dc-currents could be improved with a higher value of load inductance. This method does not involve greater calculations, and with this idea, sinusoidal source and output currents can be obtained, realizing a desirable tracking to their respective references. In the previous strategy the control objective is to reduce the instantaneous reactive power without taking into consideration the behavior of the input current and this is the main difference respect to the proposed method where the input current is imposed to follow a given reference.
4.6
Min THD is
4.4 4.2
1
1.5 Fig. 6.
2
2.5 3 3.5 Nominal Weighting Factor
4
4.5
Weighting factor value vs THD of source currents.
(in relation to the amplitude references) given by: = 𝜆𝑠 = 𝜆𝑛𝑜𝑚 𝑠
𝑛𝑜𝑚 𝐼𝑑𝑐 = 1.3715. 𝐼𝑠𝑛𝑜𝑚
(31)
Considering that the optimal weighting factor is a multiple of the nominal weighting factor, the optimal value can be selected by plotting different simulated values of the source current THD in the function of a 𝜆𝑛𝑜𝑚 sweep as shown in 𝑠 is thus 2.5𝜆𝑛𝑜𝑚 Fig. 6. The optimal weighting factor of 𝜆𝑜𝑝𝑡 𝑠 𝑠 because with this value the THD of the source current is minimized, while a good performance of the load current is maintained. Fig. 7 presents simulation results of source and and load current waveforms using 𝜆𝑠 = 0.05𝜆𝑛𝑜𝑚 𝑠 for the proposed control strategy. 𝜆𝑠 = 2.5𝜆𝑛𝑜𝑚 𝑠 VI. C ONCLUSION
C. Weighting Factor Selection The cost function using predictive source and load current control is given by (30). If only the minimization of the load current is considered, then 𝜆𝑠 = 0. However, the input side will show a distorted source current. For this reason, an optimal weighting factor is needed in order to have minimum THD of the input and output currents. The heuristic search process begins by defining a nominal weighting factor 𝜆𝑛𝑜𝑚 𝑠
In this paper, a predictive control strategy with imposed sinusoidal source currents has been presented. The control algorithm allows simple but effective control of a current source rectifier. This control scheme uses a discrete time model of the converter and a simple cost function. The main idea relies on predicting the best suited switching state, which will be applied in the next sampling period. The measured
5846
R EFERENCES
120
𝑖∗𝑑𝑐
110
𝑖𝑑𝑐
100 90 0.35
0.4
0.45
0.5
0.55
0.5
0.55
𝑖𝑠𝐴
𝑣𝑠𝐴 100 0 -100 0.35
0.4
0.45
Time [s] Fig. 7. Simulation results of predictive current control with imposed sinusoidal source current with different weighting factor values: (top) output 𝑖𝑑𝑐 [A] current and its reference 𝑖∗𝑑𝑐 [A]; (bottom) source voltage 𝑣𝑠𝐴 [V/20] and its respective phase current 𝑖𝑠𝐴 [A].
load and source currents follow their respective references very closely, which corroborates the good dynamics provided with the proposal. Furthermore, the proposed method has been compared with the classical predictive solution showing better performance in terms of dynamic behavior and THD. ACKNOWLEDGMENTS This publication was made possible by the Initiation FONDECYT Research Project 11121492, a National Priorities Research Program grant from the Qatar National Research Fund NPRP 4-077-2-028 (a member of the Qatar Foundation), Basal Project FB0821 and the Universidad T´ecnica Federico Santa Mar´ıa. The statements made herein are solely the responsibility of the authors. A PPENDIX Simulation parameters are indicated in Table I. TABLE I S IMULATION PARAMETERS Variable
Description
Value
𝑉𝑠
Source voltage amplitude
√ 4160/ 3 [𝑉 ]
𝑓𝑠
Input frequency
60 [𝐻𝑧]
𝐿𝑓
Filter inductance
9.8 [𝑚𝐻]
𝐶𝑓
Filter capacitance
61.3 [𝜇𝐹 ]
𝑅𝑓
Filter resistance
0.5 [Ω]
𝑅
Load resistor
14.4 [Ω]
𝐿
Load inductor
45.9 [𝑚𝐻]
𝑇𝑠
Sampling time
20 [𝜇𝑠]
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