Electronic Sensors and Systems Sector Advanced Technology Center
SONOS Nonvolatile Semiconductor Memories for Space and Military Applications November 16, 2000 Dennis A. Adams1, David Mavis2, James R. Murray3, and Marvin H. White4 1 Northrop
Grumman Corporation
2 Mission
Research Corporation
Baltimore, MD
Albuquerque, NM
[email protected]
[email protected]
3 Sandia
National Laboratories
Albuquerque, NM
[email protected] 11/15/2001
4
Lehigh University
Bethlehem, PA
[email protected] SONOS-2000.PPT
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Electronic Sensors and Systems Sector Advanced Technology Center
Topics z Advanced Technology Center (ATC) Overview z SONOS Product Overview z SONOS Technology Characteristics z SONOS Product Status z Summary
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Advanced Technology Center Overview
z Conveniently located near BWI airport z 180 employees z ISO 9001 certified design, maskmaking, process, test, & packaging capabilities z Over 21,000 square feet of modern Class 100/10 wafer fabrication cleanroom
4-inch GaAs line
6-inch silicon line
z >$30M in annual sales z Over 30 years experience supplying high-rel microelectronics
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Programmable SONOS-based NVM Products Output Buffers
SRAM Digital Logic SRAM
SONOS EEPROM
Analog Delay Line Differential Input Buffers
CMOS Mixed Signal ASICs
Rad Hard EEPROMs
BiCMOS Mixed Signal ASICs 11/15/2001
Rad Hard FPGA SONOS-2000.PPT
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Electronic Sensors and Systems Sector Advanced Technology Center
NGC SONOS Product Overview Device
Process
Status
Use
64K EEPROM
1.2u CMOS/SONOS
Production
MIL & Com. Space
256K EEPROM
1.2u CMOS/SONOS
Production
MIL & Com. Space
Development
MIL & Com. Space
1M EEPROM
0.8uCMOS/SONOS
Mixed-signal
2.0u BiCMOS/SONOS Prototypes
MIL & Com. Space
Tile Array RH 4K FPGA
0.8u CMOS/SONOS
Prototypes
MIL & Com. Space
4439 Module
1.2u CMOS/SONOS
Production
MIL Avionics
1.2u CMOS/SONOS
Production
MIL Avionics
0.8u CMOS/SONOS
Prototypes
MIL Avionics
Controller 4459 Module Controller 4466 Controller 11/15/2001
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SONOS Basic Mechanisms
(Silicon – Oxide – Nitride – Oxide – Silicon) -10V
+10V 40A Capping Oxide
150A Oxynitride
Poly Gate
40A Capping Oxide
150A Oxynitride
Poly Gate 16A Tunnel Oxide
16A Tunnel Oxide
N+
N+
N+
N+ P-Si
P-Si
• +10 volt programming
• -10 volt programming
results in trapped electrons in SONOS dielectric stack
results in trapped holes in SONOS dielectric stack
• Data loss caused by emission of trapped charge from SONOS stack 11/15/2001
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64K / 256K EEPROM hardness > 300 krads
Standby Current (Amps)
1.0E-02
1.5 mA Spec
1.0E-03 1.0E-04 1.0E-05 1.0E-06 1.0E-07 1.0E-08 0
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500 1000 Total Dose [krads(SiO2)]
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1500
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SONOS Endurance Cycling Effects # of Cycle (7.5ms/2.5ms) 0 1E4 1E5 1E6
1 2.8 Hours
0
Vth (Volts) -1
10 Years 28 Hours
# of Memory Window Cycles (30 Years, +80C) 0
+0.58V
1E4
+0.58V
1E5
+0.50V
1E6
+0.30V
VT = .176V (1 Transistor = 1E4 Cycles) (1 Transistor = 1E6 Cycles)
VT = .30V (1E6 Cycles) VT = .58V (1E4 Cycles)
32 Years -2
10 0
101
102
103
10 4
10 5
106
107
10 8
109
Retention Time (Seconds) 11/15/2001
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Lehigh Scaled SONOS Pulse Width Response
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Scaled SONOS is the Key to 4MBit EEPROMs
(NGC Wafer 63570-1, 80 A oxynitride) 1.E-03 1.E-04
IDS (Amps)
1.E-05 1.E-06 1.E-07
-5 V -6 V
+5 V
-7 V
+6 V
1.E-08
+7 V
1.E-09 1.E-10 1.E-11 1.E-12 -5.0
-4.0
-3.0
-2.0
-1.0
0.0
1.0
2.0
3.0
4.0
5.0
VGS (Volts)
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NSONOS Array Wafer 63570-2 ,80A Oxynitride Initiallization - +7 V / 2.5 m s, -7V / 7.5 m s
[Lehigh University Data]
0
Vth [v]
-0.5
5v
-1
-5v
-1.5
-6v 6v 7v
-2
-7v
-2.5 -3 1.0E-07 1.0E-06
1.0E-05 1.0E-04 1.0E-03 1.0E-02
1.0E-01 1.0E+00
Programming Time [s] 11/15/2001
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NSONOS 6160 Array Wafer 63570-2, 80A Oxynitride, 7V / 2.5 msec, -7V / 7.5 msec
[Lehigh University Data]
10 yrs
0 -0.5
1E4 cycles 1E4 cycles
-1
Vth [V]
0 cycles 0 cycles
-1.5
1E5 cycles
-2
1E5 cycles 1E6 cycles
-2.5 -3 1 1 1 . E- . E- . E04 03 02
1 1. E 1. E 1. E 1. E 1. E 1. E 1. E 1. E 1. E 1. E 1. E . E- +0 +0 +0 +0 +0 +0 +0 +0 +0 +0 +1 0 9 8 7 6 5 4 3 2 1 01 0
Retention Time [s] 11/15/2001
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Radiation Hardened 64K EEPROM z In-system Reprogrammable z Nonvolatile Data Retention
10 years @ 1E4 Write Cycles
100 years ROM Applications
z Moderate Speed
Write Cycle Time: 10 msec
Read Cycle Time: 250 nsec
z Rad Hardness
Total Dose: 300 kRads
Transient: survival > 1E12 R/s, logic upset 1E8 R/s
SEU: LETth > 60 MeV/mg/cm2 during read/write only
SEGR: None for Kr or Lighter: Heavier ions During Write Only
z Variety of Package Options (FP, LCC, Bare Die, MCM) z PRIME FEATURE
Only Rad-Hard EEPROM
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256K EEPROM Production Update z W28C256FHP qualification completed April ‘00 Utilized
64K EEPROM “generic” life test data
z September ‘00, 256K EEPROM lifetest complete 15
devices @ 150C for 1500 hours (equivalent to 3000 hours @ 125C)
Life
test continuing to end of life
z Production orders being taken and deliveries being made Packaged Known
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parts (flatpack)
Good Die (KGD)
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0.8 um Rad Hard 1Mbit EEPROM Development z Key Features
Organization: 128K x 8
Power Supply: 5v or 3.3v (I/O)
Programming Voltage: 10v
Clear/Write Time: 1E12 Rad(Si)/s
Qualification: 1/03
Production: 1/03
z Major Milestones*
SEU Immunity: >35 MeV-cm2/g
SEU Permanent Damage: >Ar
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1MBit EEPROM Cell (31.8 µm2)
* Pending continued funding
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The Mixed Signal Tile Individual Tile Size = 60 x 60 mils I/O Protects
PNP/NPN BJT’s CMOS Driver
z BiCMOS/SOI process z Device Characteristics
CMOS Gate Array
– FTP = 2 GHz PNP / NPN Drivers
2 Bits EEPROM
Schottky Diodes
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– FTN = 4 GHz
CMOS gate array for digital logic (5V) – < 2 nsec gate delay
SONOS E2PROM – 104 program cycles with up to 100 year retention
Long Channel CMOS Hi Value Resistors
High performance complementary bipolar transistors (10V)
Area for Nichrome Resistors & Capacitors
Diffused Resistors
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z Up to 100 kRad (Si) total dose hardness
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MSA-3333: Helping to Power the Internet!! z 3333 Mixed-signal Tile Array First
production design
Utilizes
3 x 4 tiles (12 total)
Interface
ASIC for fiber optic telecommunication applications
z 3333 Status Prototypes
delivered
Working
in customer’s hardware
Initial
production of ~500 per year
Follow-on
production of up to ~15K per year
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0.8 um Rad Hard Field Programmable (SONOS) Gate Array z Cooperative effort with MRC, Aerospace Design Concepts, & FPGA Technologies (SBIR program) z 4K gates of configurable logic z A truly “unique” FPGA
Rad hard
Nonvolatile
Reprogrammable
z User friendly software interface z Fully functional prototypes demonstrated at the 2000 NSREC 11/15/2001
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NGC Radar T/R Modules use SONOS Technology z ~ 60 % of Northrop Grumman’s ESSS business is radar related z Current and planned Active Aperture radar systems utilize mixed-signal Transmit / Receive module ASICs with embedded SONOS EEPROM z SONOS technology will fill a critical Northrop Grumman system need for the next 15 20 years
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4439 F-22 T/R Module Controller ASIC Output Buffers
z Transmit/receive module controller for active aperture radar
SRAM Digital Logic SRAM
SONOS EEPROM
z Digital control logic for beam steering computer interface
Analog Delay Line Differential Input Buffers
z Analog delay circuitry for programmable timing control
z SRAM for phase and gain setting storage z EEPROM for nonvolatile data storage (chip ID, analog delay, GaAs MESFET settings)
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Next Generation 4466 T/R Module Controller 0.8 um CMOS / SONOS (also used for 1M EEPROM and 4K FPGA) 0.8 um technology gives 4x functionality and 2X density improvement over 1.2 um generation controllers First silicon - 11/30/00
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Summary z SONOS is a viable production technology NOW >70K
SONOS-based devices delivered to date
z Major corporate commitment to SONOS technology Significant Critical
capital investment in 6-inch process line
system “design-ins” depend on SONOS technology
z Recent progress on scaled SONOS very encouraging Sound
technology base for future SONOS products (ie. 1Mbit/4MBit EEPROMs)
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Acknowledgement of Support z Sandia National Labs z Army SMDC z Air Force SBIRS Program Office z Mission Research Corporation z DTRA z Air Force Research Laboratories z Lehigh University
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“On the Go with SONOS”
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SONOS Production Product Deliveries
Product
Quantity Delivered
64K EEPROM
7,091
256K EEPROM
2551
Controller ASICs
63,230 (orders in hand for 150K adtl. parts)
Total:
70,576
Notes: 1. Includes deliveries and current orders. Device qualified April 2000
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4439 SONOS ASIC Deliveries
S O N O S
A S IC
D e liv e r ie s
4 5 0 0 0
4 0 0 0 0
3 5 0 0 0
3 0 0 0 0
2 5 0 0 0
2 0 0 0 0
1 5 0 0 0
1 0 0 0 0
5 0 0 0
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1/21/97
1/3/97
11/25/96
6/30/96
6/9/96
5/26/96
4/28/96
3/24/96
3/10/96
12/10/95
11/19/95
10/29/95
9/17/95
7/30/95
6/18/95
6/4/95
4/2/95
0
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256K EEPROM Key Features
z Radiation hardened to all environments z In-system reprogrammable z Moderate operating speeds z Up to 100 year retention z 32K x 8 architecture z Column redundancy z 32 pin flat pack; KGD 11/15/2001
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