Proceedings of the 39th European Microwave Conference
Real-time FPGA-based baseband predistortion of W-CDMA 3GPP high-efficiency power amplifiers: comparing GaN HEMT and Si LDMOS predistorted PA performances R. Quaglia, V. Camarchia, S. Donati Guerrieri, E. G. Lima, G. Ghione, Qiang Luo, M. Pirola, R. Tinivella Politecnico di Torino, DELEN, Corso Duca degli Abruzzi, 29, I-10129 Torino, ITALY Phone +39 011 564 4219, Fax +39 011 564 4099
[email protected]
Abstract—We carry out a comparative design study on two high-efficiency power amplifiers (a second-harmonic tuning LDMOS and a Doherty GaN-based amplifier) linearized through baseband digital predistortion so as to comply with the W-CDMA 3GPP standard with acceptable efficiency. Several predistortion schemes (both memoryless and with memory) were tried, having in mind the final FPGA implementation. The results, besides highlighting some interesting features of the two amplifiers considered, show that significant improvements can be achieved in the Power Added Efficiency (PAE) even starting from a highly efficient but poorly linear power stage.
I. I NTRODUCTION High-efficiency PA topologies, like the Doherty scheme, have been recently revisited through the help of novel GaNbased FETs. Due to the linearity-efficiency tradeoff, such high-efficiency solutions typically need, independent of the technology, linearization to meet the requirements of broadband wireless communication standards in a multichannel environment. Although GaN based devices potentially allow for higher power density and operation frequency than the Si-based LDMOS (today the most widely adopted power transistor for wireless basestation applications), at the present stage the total power that can be achieved by state-of-the-art GaN-HEMT or LDMOS modules is comparable; due to the relative immaturity, higher cost and reliability issues of the GaN technology, the choice between the two solutions should be discussed having in mind the specific application examples. In the present work, we focus on the development of a multichannel PA for the 3GPP W-CDMA standard [1]. For the download (DL) link we took into consideration the 16 QAM (High Speed Packet Access HSPA) and 64 QAM (Evolved HSPA or HSPA+) modulation schemes with 5 MHz channel width in a DL frequency band from 2110 MHz to 2170 MHz (this corresponds to one of the available choices for the DL band within the standard). The linearity requirements are quite demanding, since the Adjacent Channel Power Ratio (ACPR) must be better than 45 dB; we tested the PAs for a multiuser access of the same channel, corresponding to a Peak to Average Power Ratio (PAPR) of 11 dB [1]. Starting from such requirements, we extracted a baseband digital predistorter (DPD) for two high-efficiency power am-
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plifiers, an LDMOS Si-based harmonic-tuning PA (LPA) and a Doherty GaN-based PA (DPA). We evaluated for the DPD design several behavioural models, taking into account the final implementation through a hardware FPGA block (Xilinx VIRTEX-4). For the LPA, several DPD solutions were found to allow the linearized amplifier to meet the 3GPP standard, with an increase in efficiency up to 20% with respect to the unpredistorted case, and correspondingly reducing the needed power back-off to around 9 dB. For the DPA amplifier, the choice of the predistortion scheme turned out to be more critical, and only some of the DPD schemes tested could be applied with success, leading to an improvement of 25% in terms of efficiency, and 12 dB in terms of back-off. II. T HE POWER AMPLIFIER STAGES The first PA considered (LPA) is a LDMOS class AB PA with second harmonic tuning, based on the Freescale LDMOS technology. The second PA (representative of a more aggressive approach in terms of technology and design) is an advanced uneven Doherty amplifier (DPA) based on the GaN SELEX-SI technology. Both the LPA and the DPA have been designed for wireless communication systems operating at 2.14 GHz [2], [3] and were realized in hybrid technology. The two PAs were chosen as representative examples of a conservative design approach in a well consolidated technology as opposed to a more advanced approach in terms of design and materials. The RF power performances of the LPA under single-tone excitation are shown in Fig. 1 (solid lines); the LPA yields 38 dBm of output power at 1 dB of gain compression and 50 % PAE. The PAE degrades with increasing Output Back-Off (OBO), especially when the PA exits the saturated operation region, but it keeps larger than 20% over a 10 dB OBO interval vs. the 1 dB compression point. The single-tone performances of the DPA are also plotted in Fig. 1 (dashed lines), yielding 37 dBm of output power at 1 dB of gain compression, with PAE higher than 55% up to 6 dB OBO, or 42% up to 10 dB OBO. Linearity performances will be discussed in Sec. IV.
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The memoryless (Poly DPD and LUT DPD) and with memory (NARX DPD and PH DPD) predistortion techniques were applied to the LPA and the DPA. For the LPA, the memoryless approach is inaccurate (see Sec. IV for more details), while both the direct and indirect learning strategies (with memory) lead to good results; in Fig. 2 a comparison between the AM-AM characteristic of the measured and PH model is shown.
Fig. 1. Measured RF performances of the LPA (solid lines) and of the DPA (dashed lines) in terms of POUT , Gain, and PAE vs. PIN .
III. DPD (PA) MODELING STRATEGIES Several DPD approaches were taken into consideration, both memoryless and with memory [4]. For the memoryless approach, polynomial (Poly DPD) and Look Up Table (LUT DPD) strategies were tested, while indirect and direct learning techniques have being investigated for the DPD with memory. Keeping in mind the final FPGA implementation, we exploited in this case for the PA and DPD models the Parallel Hammerstein (PH) scheme [5]. The PH model with a polynomial non-linearity is a simplified version of the Volterra modified odd series [6]; its constitutive equation is: u(n) =
P M
hm,2p−1 |x(n − m)|2(p−1) x(n − m)
p=1 m=0
where x(n) and u(n) are the input and output signals at the sample time n respectively, 2P − 1 is the nonlinearity order, and M the memory length. The most attractive feature of the PH is that the model is linear in its parameters hm,2p−1 , so that a straightforward identification technique, such as the Least Squares (LS), can be used for the identification of the model parameters; this technique is amenable to implementation in a FPGA with fast algorithms also enabling for the real-time model extraction needed when resorting to adaptive predistortion. In particular, in the direct learning case, the PH model of the PA was first identified, and then the DPD was implemented as the inverse model, with analytically derived coefficients [7]; the feedback structure of the DPD was calculated with the Nonlinear AutoRegressive scheme with eXogenous inputs [8] (NARX): the DPD derived in this case will be therefore referred as the NARX DPD. Instead, in the indirect learning case, the PA model is not needed for DPD design, since the DPD is directly identified from the PA experimental data. Following the strategy presented in [9] a postdistorter placed at the PA output is extracted and then copied at the PA input where it acts as a predistorter; the resulting DPD will be referred to as the PH DPD.
Fig. 2. LPA Measured and PH PA simulated AM-AM characteristics: input signal W-CDMA 3GPP with 11 dB of PAPR.
In the DPA case, the direct learning strategy is effective only when the input signal PAPR is low to medium (up to 5-6 dB), since the PH polynomial approximation does not correctly follow the sudden slope change in the AM-AM characteristic (see Fig. 3) when the auxiliary device turns on. For higher PAPR (and, consequently, larger PA back-off), the DPD extracted through direct learning becomes almost ineffective. On the other hand, indirect learning allows to generate a more accurate approximation of the inverse function and, as a consequence, gives better linearization results.
Fig. 3. Output vs. input normalized characteristics: PA measured and modelled (PH), together with DPD-only measured and modeled (PH).
Due to the higher cut-off frequency of the GaN technology and to the reduced effect of design parasitics, the DPA actually
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TABLE I LPA ACPR FOR INCREASING PAPR
shows reduced memory effects vs. the LPA, implying that also a simpler memoryless DPD is effective in this case (Sec. IV).
ACPR, dB
IV. DPD DESIGN AND COMPLIANCE TO THE W-CDMA 3GPP STANDARD The DPD stages for the LPA and DPA have been first implemented for testing in the MATLAB environment. Predistorted data are fed to the PA exploiting an RF source able to generate arbitrary signals (Agilent ESG E4433B). The ACPR and the complex envelopes at the PA output were measured by an Agilent MXA N9020A Vector Signal Analyzer (VSA). Drain and Gate voltages and currents are also acquired allowing for monitoring the PAE as well. The hardware predistorter implementation was done with the PC
Matlab
VSA 89600
Xilinx ISE
LAN
PAPR 3.5 dB
PAPR 6 dB
PAPR 8 dB
PAE 38%
PAE 31%
PAE 26%
PA only
34
35.1
37.2
Poly DPD
n.c.
41.14
41.48
PH DPD
50
49.3
49.1
NARX DPD
40
47.4
47.2
yield a 10 dB ACPR improvement vs. the unpredistorted case, while the results from the memoryless approaches are poor, confirming the accuracy of the PH PA model but also the impact of memory effects in the LPA (notice that no improvement is obtained even from the LUT DPD).
VECTOR SIGNAL ANALYZER
6 0
2 0 P A E
ADS Suite
A C P R N A R X D P D
1 5 GPIB
5 5
BASEBAND SIGNAL GENERATOR
I
I FPGA BOARD
Q
P A E , %
A C P R P A o n ly DUT
5
4 5
S ta n d a rd A C P R lim it
Q
Un-Predistorted Baseband Signal
Fig. 4.
MODULATOR
5 0
1 0
RF SIGNAL GENERATOR
A C P R , d B
GPIB PCI
Predistorted Baseband Signal
0
Scheme of real-time FPGA predistorter.
FPGA board Xtreme DSP Virtex-4 Development kit made by Nallatech. The FPGA implementation makes use of 5 parallel branches that simultaneously process the I and Q baseband signal components. The FPGA maximum sampling frequency (accounting for processing delays in the implementation) is 78 MHz, large enough to allow real-time predistortion of the W-CDMA 3GPP signal (also including 2 upper and lower sidebands). The PH model can be readily parallelized, but care has to be applied to equalize the processing times of the various branches. Thanks to the high-speed DAC of Analog Device mounted on the FPGA board, real time predistortion can be carried out according to the chain in Fig. 4. The final accuracy of the FPGA implementation is limited by a 14 bit arithmetic; although this is lower than the one achievable with double-precision floating point MATLAB off-line processing, this is more than enough to guarantee comparable results. To investigate the effectiveness of the DPD for W-CDMA 3GPP systems, we have used as the input stimulus a WCDMA signal with PAPR increasing from 3.5 dB to 8 dB. The average output power was backed-off in each PA case so that the peak instantaneous power reaches the point at 1 dB of gain compression. For the LPA case, Table I shows the best performances obtained for the various DPD modelling approaches discussed in Sec. III. Both the NARX and DPDs
6
8
1 0
1 2
1 4 1 6 1 8 In p u t B a c k -O ff, d B
2 0
2 2
2 4
4 0
Fig. 5. Measured ACPR and PAE as a function of the IBO with and without NARX DPD for a W-CDMA 3GPP signal with 11 dB of PAPR.
Fig. 6. Measured output spectrum of the LPA with a 3GPP W-CDMA input signal with 11 dB of PAPR, for the PA only, PA with NARX DPD, PA with Poly DPD and PA with PH DPD. The frequency deviation is with respect to the center channel frequency.
Concerning the applicability of the DPD schemes to the LPA with respect to the even grater (11 dB) PAPR of multiuser
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per channel scenario in a 3GPP standard, the unpredistorted LPA meets the required 45 dB ACPR specification only with a 20 dB of Input Back-Off (IBO), resulting in an average efficiency as low as 3%. Predistortion with the NARX DPD and PH DPD approaches lowers to 9 dB the back-off needed to meet the ACPR specification, with a much larger (18%) PAE (Fig. 5). Fig. 6 shows the measured output power spectrum of the LPA with the 3GPP input for the PA only, PA with NARX DPD, PA with Poly DPD and PA with PH DPD; the improvement in terms of spectral regrowth is evident in all the adjacent bands, and the best ACPR is 54 dB (PH-DPD). For the DPA (as already stressed in Sec. III), the DPD effectiveness is sensitive to the extraction strategy. At low PAPR (up to 3.5 dB) improvements in ACPR and efficiency result from all of the four DPD solutions considered. As seen in Table II, increasing the PAPR to 6 dB and then to 8 dB makes the DPD obtained from direct learning (NARX DPD) almost ineffective, while the PH DPD derived from the indirect strategy is still providing satisfactory results. For this reason the PH scheme has been chosen for the FPGA hardware DPD with a negligible impact on the performances (ACPR improvement). TABLE II DPA ACPR FOR INCREASING PAPR
ACPR, dB
negligible difference in the performances of the PH DPD (with memory) vs. the ones of the Poly DPD (memoryless). A further confirmation of this fact is that the best DPD performances are obtained by the LUT DPD. Concerning the application to the W-CDMA 3GPP standard, the LUT DPD showed a 12 dB improvement in the IBO needed to fulfill the ACPR specifications vs. the unpredistorted case, with an increase in the average PAE of 25%. Fig. 7 shows the output power spectrum of the DPA with and without the DPD stage for the 3GPP standard with 11 dB PAPR; the improvement in terms of spectral regrowth results into a 51 dB ACPR. V. C ONCLUSIONS Two high-efficiency PAs based, respectively, on a more conservative LDMOS second-harmonic tuning design (LPA), and on an advanced GaN HEMT-based Doherty approach (DPA) were taken into consideration in the development of a digitally predistorted, high-efficiency PA complying with the W-CDMA 3GPP standard linearity requirements. Several predistortion schemes were tested, with a view at a final FPGA hardware implementation. For the LPA the PAE was improved from 3% to 18%, while for the DPA the improvement was from 5% to 30%. The results obtained show that even fairly nonlinear PAs such as the DPA can be successfully linearized for exploitation within the framework of demanding, highlinearity standards.
PAPR 3.5 dB
PAPR 6 dB
PAPR 8 dB
PAE 50%
PAE 44%
PAE 40%
PA only
29.11
27.62
28.10
Poly DPD
43.14
41.71
41.05
LUT DPD
47.27
47.38
46.37
PH DPD
43.38
40.53
40.31
VI. ACKNOWLEDGEMENTS The authors wish to acknowledge P. Colantonio, R. Giofr`e, L. Piazzon and E. Cipriani (University of Rome Tor Vergata) for helpful discussions and for providing the PAs hardware. The work was partly supported by the NOE NEWCOM++ and by the PRIN 2007 M3ICGAN projects.
NARX DPD
39.94
32.06
32.22
R EFERENCES
Fig. 7. Measured output spectrum of the DPA with a 3GPP W-CDMA input signal with 11 dB of PAPR, for the PA only, PA with LUT DPD, PA with Poly DPD and PA with PH DPD. The frequency deviation is with respect to the center channel frequency.
The low in-band memory effects are evident from the
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