Reduction of Voltage Harmonics for Parallel-operated Inverters Qing-Chang Zhong Dept. of Aeronautical and Automotive Engineering Loughborough University Leicestershire LE11 3TU, United Kingdom e-mail:
[email protected]
Frede Blaabjerg Institute of Energy Technology Aalborg University (AAU) Aalborg 9220, Denmark e-mail:
[email protected]
Josep M. Guerrero Dept. Enginyeria de Sistemes Automàtica i Informàtica Industrial Universidad Politécnica de Cataluña Barcelona, Spain e-mail:
[email protected]
Tomas Hornik Dept of Electrical Engineering & Electronics The University of Liverpool Liverpool, L69 3GJ, United Kingdom e-mail:
[email protected]
Abstract— The inherent limitations of the conventional droop control scheme have recently been revealed and a robust droop controller to achieve exact proportional load sharing has been proposed. This paper continues the work with a strategy to improve the voltage quality so that the total harmonic distortion of the output voltage can be maintained small even when nonlinear loads are connected. Experimental results are provided to verify the analysis and design.
I. I NTRODUCTION Nowadays, more and more distributed generation and renewable energy sources, e.g. wind, solar and tidal power, are connected to the public grid via power inverters. They often form microgrids before being connected to the public grid [1], [2]. Due to the availability of high current power electronic devices, it is inevitable that several inverters are needed to be connected in parallel for high-power and/or lowcost applications. Another reason is that parallel-connected inverters provide system redundancy and high reliability, which is important for critical customers. A natural problem for parallel-connected inverters is that how the load is shared among them. A key technique is the droop control [3], [4], [5], [6], [7], [8], which is widely used in conventional power generation systems. The advantage is that no external communication mechanism is needed among the inverters. This enables good sharing for either linear or nonlinear loads [3], [6], [9], [10]. The work of Qing-Chang Zhong was partially funded by EPSRC,
UK under grant No. EP/J001333/1.
978-1-4577-0541-0/11/$26.00 ©2011 IEEE
The equal sharing of linear and nonlinear loads has been intensively investigated [3], [4], [9] and high accuracy of equal sharing can be achieved. A voltage bandwidth droop control was used to share nonlinear loads in [6] and a small signal injection method was proposed to improve the reactive power sharing accuracy in [10], which can also be extended to harmonic current sharing. It is pointed out in [3] that the output impedance of the inverters plays a critical role in power sharing and a droop controller for inverters with resistive output impedances is proposed for sharing linear and nonlinear loads [4]. Although significant progress has been made for the equal sharing of linear and nonlinear loads, it was still a problem to share loads accurately in proportional to the power ratings of the inverters until very recently. In particular, the accuracy of reactive power sharing (for the Q−E and P −ω droop) is not high [11]. Moreover, some approaches developed for equal sharing cannot be directly applied to proportional sharing. Another issue is that the output voltage drops due to the increase of the load and also due to the droop control. Hence, the proportional sharing problem needs to be investigated in a systematical way. All the strategies mentioned above are sensitive to numerical computational errors, parameter drifts and component mismatches. Very recently, it has been proved that, in order for the parallel-connected inverters to share the load in proportional to their power ratings, the inverters should have the same per-unit impedance. It also requires that the RMS voltage set-points for the inverters to be the same. Both are very strong conditions. As a result, a robust droop controller
473
E*
has been proposed in [12] to achieve accurate proportional load sharing among inverters connected in parallel in microgrids operated in both the standalone mode and the grid-connected mode. The accuracy of sharing is no longer dependent on the output impedance of the inverters originally designed nor on the RMS voltage set-point. Moreover, the controller is able to regulate the output voltage to reduce the effect of the load and droop control on the output voltage. The voltage harmonics could be high if the innerloop controller for the inverters are not well designed. In this paper, a mechanism is added to the robust droop controller to make sure that the total harmonic distortion of the output voltage is maintained small, even when nonlinear loads are present. Hence, the power sharing problem, the harmonics problem and the voltage regulation problem are all solved with a simple controller.
ω it+δ i Fig. 2.
In this paper, the inverters are assumed to have resistive output impedances. Inverters with inductive output impedances need to be considered slightly differently. Fig. 1 shows two inverters with resistive output impedances connected in parallel. The line impedances are omitted because the output impedances of the inverters are designed to dominate the impedance from the inverter to the AC-bus. The reference voltages of the two inverters are, respectively, √ vr1 = 2E1 sin(ω1 t + δ1 ), √ vr2 = 2E2 sin(ω2 t + δ2 ).
S1 = P1 + jQ1
Ro1 v r1
~ E ∠δ 1 1
E ∗ I1∗
and S2∗ = currents I 1∗ and
i2 Ro 2
Z
E 2 ∠δ 2 ~
vr 2
Fig. 1. Two inverters with resistive output impedances connected in parallel
In order for the inverters to share the load in proportional to their power ratings, the conventional droop controller Ei = E ∗ − ni Pi , ω i = ω ∗ + mi Q i ,
vo
1 s
mi
Qi
i
ω*
The conventional droop control scheme
n1 S1∗ = n2 S2∗ = · · · = nn Sn∗ , m1 S1∗ = m2 S2∗ = · · · = mn Sn∗ .
S 2 = P2 + jQ2
Vo ∠0o
i1
Pi
as shown in Figure 2, is widely used to generate the amplitude and frequency of the voltage reference v ri for each inverter [4], where ω ∗ is the rated frequency. Note that the P − E and Q − ω droop is used because the output impedances are resistive. Otherwise, the P − ω and Q−E droop should be used when the output impedances are inductive. The drooping coefficients n i and mi are normally determined by the desired voltage and frequency drops, respectively, at the rated active power and reactive power. The frequency ω i is integrated to form the phase of the voltage reference v ri . In order for the inverters to share the load in proportional to their power ratings, the droop coefficients of the inverters should be in inverse proportional to their power ratings [6], i.e., ni and mi should be chosen to satisfy
A. Conventional droop controller
The power ratings of the inverters are = E ∗ I2∗ with the rated voltage E ∗ and rated I2∗ . They share the same output voltage v o .
ni
vr
II. D ROOP C ONTROLLERS FOR L OAD S HARING
S 1∗
-
Ei
(3) (4)
It is easy to see that ni and mi also satisfy n1 n2 nn = = ··· = . m1 m2 mn It has been revealed recently that in order to guarantee accurate load sharing for this strategy, the following conditions need to be satisfied: δ1 = δ2 · · · = δn E1 = E2 · · · = En ⇐⇒ . n2 nn m2 mn n1 m1 = · · · = Ro1 Ro2 Ron Ro1 = Ro2 · · · = Ron However, this is almost impossible in reality. It is impossible to maintain E1 = E2 = · · · = En because there are always numerical computational errors, disturbances and noises. It is also difficult for the output impedances to satisfy the condition because of parameter drifts and component mismatches. B. Robust droop controller
(1) (2)
A mechanism to achieve accurate proportional load sharing proposed in [12] is shown in Figure 3. This results
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in a droop controller that is robust against numerical computational errors, disturbances, noises, parameter drifts and component mismatches. There are two main features that are different from the conventional droop controller. One is that an integrator is introduced into the amplitude channel to form Ei and the other is that a voltage regulation unit is introduced to the droop controller. The combination of these two features provides a mechanism to guarantee the accuracy of the real power sharing (that of the reactive power sharing is guaranteed by the fact that the frequencies of all inverters will converge to the same frequency) because ni Pi = Ke (E ∗ − Vo ).
III. C ONTROLLER D ESIGN FOR I NDIVIDUAL I NVERTERS TO I MPROVE THE O UTPUT VOLTAGE Q UALITY
(5)
The right-hand side of the above equation is always the same for all inverters connected in parallel as long as K e is chosen the same, which can be easily met. Hence, exact real power sharing can be achieved without having the same E i . The active power sharing no longer depends on the inverter output impedances and is also immune to the numerical computational errors and disturbances, which guarantees the accuracy of real power sharing. Moreover, from (5), there is Vo = E ∗ −
ni Pi . Ke
The output voltage drop is no longer determined by the output impedance originally designed but by the parameters ni , Ke and the actual power P i . It can be considerably reduced by using a large K e . E*
-
Ke
Ei
1 s
-
ni
RMS
The circuit of a single-phase inverter under consideration is shown in Figure 4. It consists of a single-phase H-bridge inverter powered by a DC source, and an LC filter. The inverter is connected to the AC bus via a circuit breaker CB and the load is assumed to be connected to the AC bus. The control signal u is converted to a PWM signal to drive the H-bridge so that the average of u f over a switching period is the same as u, i.e. u ≈ u f . Hence, the PWM block and the H-bridge can and will be ignored in the controller design. The inductor current i is measured to construct a controller so that the output impedance of the inverter is forced to be resistive and that it dominates the impedance between the inverter and the AC bus. Moreover, the output voltage vo is measured, together with the inductor current i, for proportional load sharing. This avoids measuring the load current i o and reduces the cost and complexity of the controller. As is now well known, it is advantageous to force the output impedance of parallel-connected inverters to be resistive [3]. It has been shown in [12] that the capacitor C can be regarded as a part of the load instead of a part of the inverter. This reduces the control plant to an H-bridge and an inductor and considerably simplifies the design and analysis of the controller, which facilitates the understanding of the nature of inverter control. The simple controller shown in Figure 5(a), as proposed in [12], consists of the proportional feedback of the inductor current. It is able to force the output impedance of the inverter to be resistive if the gain K i is large enough. However, this results in high THD in the output voltage if nonlinear loads are present. Here, another controller shown in 5(b) is proposed to improve the output voltage quality while forcing the output impedance resistive. In addition to the current feedback through K i , the voltage error v r − vo is added to vr through a block K R (s).
Pi
+ VDC -
vo
uf
vri
i
io
L
i
u
Fig. 3. The robust droop controller proposed in [12] to obtain accurate proportional load sharing
Fig. 4.
ω it+δ i
1 s
mi
Qi
PWM
IGBT H-bridge
vo CB
C
AC bus
ω* A singe-phase inverter
The following two equations hold for the closed-loop
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The block K R (s) can be designed to have small gains at low frequencies and high gains at high frequencies. There are many ways to achieve this. One option is to choose
i Ki
-
u
KR (s) =
vr
vo
Ki u
KR(s)
-
vr
(b) The proposed controller to improve the voltage quality
Phase (deg)
system consisting of Figure 4 and Figure 5(b): u = vr − Ki i + KR (s)(vr − vo ), uf = sLi + vo . Since the average of u f over a switching period is the same as u, there is (approximately)
Fig. 6.
Current [A]
which gives vo = vr − Zo (s) · i sL + Ki . 1 + KR (s)
The resistive and inductive part of the output impedance are all decreased at harmonic frequencies when the gain of K R is larger than 1, which improves the THD of the output voltage. It is worthy noting that the main factor that affects the voltage THD is the size of the output impedance instead of its type (resistive or inductive). The THD can be small even if the output impedance is inductive as long as it is small and the output impedance does not have to be resistive. The voltage THD can be big if the output impedance is resistive but large. Another observation is that the current feedback increases the output impedance but the voltage feedback decreases the output impedance.
1+K3
Fig. 7.
1+K5 1+K7
3ω 5ω 7ω 3
4
10
10
The Bode plots of a typical 1 + KR (s) with ξ = 0.01
vr − Ki i + KR (s)(vr − vo ) = sLi + vo ,
Zo (s) =
16 14 12 10 8 6 4 2 0 90 45 0 −45 −90 2 10
Gain (abs)
Fig. 5. Design of the inner-loop controller to achieve a resistive output impedance
with
2ξhωs × Kh , + 2ξhωs + (hω)2
of which the gain at frequency hω is K h with zero phase; see the Bode plots of a typical 1 + K R (s) with ξ = 0.01 shown in Figure 6. It is more or less 1 everywhere apart from at the frequencies around the harmonics. This is equivalent L at frequency hω ( and to reducing the inductance L to 1+K h Ki also the output resistance to 1+Kh ), which is able to improve the THD of the output voltage v o . The damping factor ξ can be chosen as ξ = 0.01 to accommodate frequency variations and h can be chosen to cover the major harmonic components in the current, e.g. the 3rd, 5th and 7th harmonics.
(a) A simple controller proposed in [12] i
Σ
h=3,5,··· s2
0.4 0.3 0.2 0.1 0 −0.1 −0.2 −0.3 −0.4 7
i1
7.01
7.02
7.03 Time [s]
Circulating current
7.04
7.05
7.06
The circulating current at 2 : 1 sharing
IV. E XPERIMENTAL R ESULTS The above strategy has been verified in a laboratory setup. It consists of two single-phase inverters controlled by dSPACE kits and powered by separate 42V DC power supplies. The values of the inductors and capacitors are 2.35mH and 22µF, respectively. The switching frequency is 7.5kHz and the frequency of the system is 50Hz. The nominal output voltage is 12V RMS and K e = 10. The coefficients for K R are K3 = 14, K5 = 10 and K7 = 2.5.
476
P2
2
3
4
5
6 7 Time [s]
8
9
10
11
Reactive Power [Var]
Q1
Q2
1
2
3
4
5
6 7 Time [s]
8
9
10
11
12
THD of vo [%]
Output Voltage [V] Current [A]
6 7 Time [s]
8
9
10
11
12
vo
7.01
7.02
7.03 Time [s]
7.04
7.05
7.06
i1
i2
0 −2 7.01
7.02
7.03 Time [s]
7.04
7.05
7.06
Fig. 9. Experimental results with a nonlinear load at 2 : 1 sharing but without using the proposed control strategy
A. Without a load
1
2
3
4
5
6 7 Time [s]
8
9
10
11
12
vo
Since the sharing ratio is 2 : 1, the load current component is 23 (i1 + i2 ) for Inverter 1 and 13 (i1 + i2 ) for Inverter 2. 2 The circulating current component is± i1 −2i , which takes 3 the positive sign for Inverter 1 and the negative sign for Inverter 2. When there was no load connected to the inverters, the circulating current is shown in Figure 7. It can be seen that the circulating current is very small. B. With a nonlinear load
7.01
7.02
7.03 Time [s]
7.04
7.05
7.06
(d) Output voltage in the steady state i1
2
i2
0 −2 7.01
7.02
7.03 Time [s]
7.04
7.05
7.06
(e) Currents in the steady state Fig. 8.
5
(c) Currents in the steady state
4
−4 7
4
2
−4 7
(c) THD of the output voltage 24 16 8 0 −8 −16 −24 7
3
4
12
(b) Reactive power 10 9 8 7 6 5 4 3 2 1 0 0
2
(b) Output voltage in the steady state 1
(a) Active power 2 0 −2 −4 −6 −8 −10 −12 0
1
(a) THD of the output voltage Output Voltage [V]
P1
32 28 24 20 16 12 8 4 0 0
24 16 8 0 −8 −16 −24 7
Current [A]
Real Power [W]
28 24 20 16 12 8 4 0 −4 0
THD of vo [%]
The current gains are K 1 = 2 and K2 = 4. The droop coefficients are n1 = 0.4 and n2 = 0.8; m1 = 0.1 and m2 = 0.2. Hence, it is expected that P 1 = 2P2 . Due to the configuration of the hardware setup, the voltage for Inverter 2 was measured by the controller of Inverter 1 and then sent out via a DAC channel, which was then sampled by the controller of Inverter 2. This brought some latency and errors into the system.
Experimental results with a nonlinear load at 2 : 1 sharing
A nonlinear load, consisting of a rectifier loaded with an LC filter and the same rheostat 7.9Ω used in the previous experiment, was connected to Inverter 2 initially. Inverter 1 was connected to the system at around t = 2.7 second and was then disconnected at around t = 9.2 second. Figure 8 shows the relevant curves of the experiment. It can be seen that the two inverters were able to share the load very accurately in the ratio of 2 : 1. The THD of the output voltage dropped from 6.2% to 5.0% after Inverter 1 was connected into the system. In order to show the significant improvement of the proposed strategy for the THD of the output, a similar experiment was carried out without the K R block and the
477
Real Power [W]
28 24 20 16 12 8 4 0 −4 0
P
1
2
3
4
5
6 7 Time [s]
8
9
10
efficient strategy has been proposed to design the inner-loop controller to significantly improve the THD of the output voltage. The resulting controller is very compact. It is worth noting that the filters used in the inverters adopted in the experiments are by no means optimal. The inductors can be chosen smaller, which is able to reduce the THD of the output voltage further. The aim of the paper is to demonstrate the significant improvement of the proposed strategy but not to discuss the optimal design of inverters. The experimental results have shown that a simple controller can solve the power sharing problem, the voltage harmonics problem and the voltage regulation problem. There is no need to use very complex controllers.
P
1
2
11
12
Reactive Power [Var]
(a) Active power 2 0 −2 −4 −6 −8 −10 −12 0
Q1
1
2
3
4
5
6 7 Time [s]
8
9
10
Q2
11
12
THD of vo [%]
(b) Reactive power 10 9 8 7 6 5 4 3 2 1 0 0
R EFERENCES
1
2
3
4
5
6 7 Time [s]
8
9
10
11
12
(c) THD of the output voltage Fig. 10. Experimental results at 2 : 1 sharing when the nonlinear load was changed
results are shown in Figure 9. The nonlinear load current was shared very well by the two inverters in the ratio of 2 : 1 but the voltage THD was about 22% for one inverter and about 16% for two inverters operated in parallel. The THD has been significantly improved by the proposed strategy, while keeping accurate sharing of real power and reactive power. Figure 10 shows the effect of changing the nonlinear load. The resistance of the load was changed from 5.7Ω to 7.9Ω at about t = 4 second and then changed back at about t = 8.8 second. The inverters shared the load in the ratio of 2 : 1 during the process and the voltage THD reduced when the load was decreased. The error in the sharing accuracy is due to the measurement errors in the output voltage. V. C ONCLUSIONS The inherent limitations of the conventional droop control scheme have been revealed and a robust droop controller has been proposed recently in [12]. This is able to obtain accurate proportional sharing in both real power and reactive power among parallel-operated inverters even if there are numerical computational errors, disturbances, noises, component mismatches and parameter drifts. A problem left unattended is the power quality of the output voltage. In this paper, an
[1] R. Lasseter, “Microgrids,” in Power Engineering Society Winter Meeting, 2002. IEEE, vol. 1, 2002, pp. 305–308 vol.1. [2] J. Guerrero, J. Vasquez, J. Matas, M. Castilla, and L. de Vicuna, “Control strategy for flexible microgrid based on parallel line-interactive UPS systems,” IEEE Trans. Industrial Electronics, vol. 56, no. 3, pp. 726 –736, 2009. [3] J. Guerrero, L. GarciadeVicuna, J. Matas, M. Castilla, and J. Miret, “Output impedance design of parallel-connected UPS inverters with wireless load-sharing control,” IEEE Transactions on Industrial Electronics, vol. 52, no. 4, pp. 1126–1135, Aug. 2005. [4] J. Guerrero, J. Matas, L. G. de Vicuna, M. Castilla, and J. Miret, “Decentralized control for parallel operation of distributed generation inverters using resistive output impedance,” IEEE Transactions on Industrial Electronics, vol. 54, no. 2, pp. 994–1004, April 2007. [5] J. M. Guerrero, J. C. Vasquez, J. matas, L. Garcia de Vicuna, and M. Castilla, “Hierarchical control of droop-controlled AC and DC microgrids- a general approach towards standardization,” IEEE Trans. Industrial Electronics, vol. PP, no. 99, p. to appear, 2010. [6] A. Tuladhar, H. Jin, T. Unger, and K. Mauch, “Parallel operation of single phase inverter modules with no control interconnections,” in Applied Power Electronics Conference and Exposition, 1997. APEC ’97 Conference Proceedings 1997., Twelfth Annual, vol. 1, Feb 1997, pp. 94–100 vol.1. [7] K. D. Brabandere, B. Bolsens, J. V. den Keybus, A. Woyte, J. Driesen, and R. Belmans, “A voltage and frequency droop control method for parallel inverters,” IEEE Trans. Power Electronics, vol. 22, no. 4, pp. 1107–1115, 2007. [8] Q.-C. Zhong and G. Weiss, “Synchronverters: Inverters that mimic synchronous generators,” IEEE Trans. Industrial Electronics, vol. 58, no. 4, pp. 1259–1267, 2011. [9] U. Borup, F. Blaabjerg, and P. Enjeti, “Sharing of nonlinear load in parallel-connected three-phase converters,” IEEE Transactions on Industry Applications, vol. 37, no. 6, pp. 1817–1823, Nov/Dec 2001. [10] A. Tuladhar, H. Jin, T. Unger, and K. Mauch, “Control of parallel inverters in distributed ac power systems with consideration of line impedance effect,” Industry Applications, IEEE Transactions on, vol. 36, no. 1, pp. 131–138, Jan/Feb 2000. [11] Y. W. Li and C.-N. Kao, “An accurate power control strategy for power-electronics-interfaced distributed generation units operating in a low-voltage multibus microgrid,” IEEE Trans. Power Electronics, vol. 24, no. 12, pp. 2977 –2988, 2009. [12] Q.-C. Zhong, “Robust droop controller for accurate proportional load sharing among inverters operated in parallel,” IEEE Trans. Industrial Electronics, vol. 58, 2011, to appear.
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