Robust Capacitor-Current-Feedback Active Damping for the LCL-Type Grid-Connected Inverter Donghua Pan, Xinbo Ruan, Xuehua Wang, Chenlei Bao, and Weiwei Li State Key Laboratory of Advanced Electromagnetic Engineering and Technology Huazhong University of Science and Technology Wuhan, P. R. China
[email protected] and
[email protected] difference between the sampling instant and the PWM reference update instant, and it is one sampling period in the synchronous sampling case (where the sampling takes place at the beginning and in the middle of a switching period) [7]. The PWM delay is caused by the zero-order hold (ZOH) effect which keeps the PWM reference constant after it has been updated, and it is definitely half sampling period [8]. The delay effect on the LCL-type grid-connected inverter with capacitor-current-feedback active damping has been discussed in recent literatures. Ref. [9] regards one-sixth of the sampling frequency (fs /6) as a critical LCL-filter resonance frequency, and shows that if the resonance frequency is higher than fs /6, the resonance peak should not be damped below 0 dB to ensure system stability. More importantly, Ref. [10] shows that if the resonance frequency is equal to fs/6, the digital controlled LCL-type grid-connected inverter will always be unstable no matter how much the capacitor current feedback coefficient is. However, what essentially causes the loss of damping effectiveness for the resonance frequency of fs /6 is still not identified.
Abstract—This paper explores the effect of the computation and pulsewidth modulation (PWM) delays on the capacitorcurrent-feedback active damping for the LCL-type gridconnected inverter. It turns out that proportional feedback of the capacitor current is equivalent to a virtual impedance connected in parallel with the filter capacitor in digital control. The LCL-filter resonance frequency is changed by this virtual impedance. And if the actual resonance frequency is higher than one-sixth of the sampling frequency (fs/6), where the virtual impedance contains a negative resistor component, a pair of open-loop unstable poles will be generated. As a result, the LCL-type grid-connected inverter becomes much easier to be unstable if the resonance frequency is moved closer to fs /6 due to the variation of the grid impedance. To address this issue, this paper proposes a capacitor-current-feedback active damping with reduced computation delay, which is achieved by shifting the capacitor current sampling instant towards the PWM reference update instant. With this method, the virtual impedance exhibits more like a resistor in a wider frequency range, and the open-loop unstable poles are removed, thus high robustness against the grid-impedance variation is acquired. Experimental results confirm the theoretical expectations.
The LCL-filter resonance frequency can be intentionally arranged away from fs /6 to avoid instability. Since a lower resonance frequency usually calls for larger filter inductors or filter capacitor [11], a resonance frequency higher than fs/6 would be cost-effective. However, the real grid contains the inductive grid impedance, and depending on the grid configuration, the grid impedance may vary in a wide range, which leads to a wide range variation of the resonance frequency. As reported in [12], a 40% drop of the resonance frequency can be yielded as the grid impedance varies up to a typical 10% per-unit (PU). In view of this, the grid impedance might reduce the resonance frequency to fs /6, and thus trigger instability. Therefore, the stability challenge for the resonance frequency of fs /6 must be addressed to yield high robustness against the grid-impedance variation.
I. INTRODUCTION The LCL filter is widely used in grid-connected inverters for its cost-effective attenuation of switching harmonics compared with the L filter [1]. However, the resonance hazard of the LCL filter requires proper damping solutions to stabilize the system [2]. To avoid the attendant increased power loss associated with passive damping, active damping is usually considered as an effective alternative [3]. In this paper, the capacitor-current-feedback active damping is adopted for its simple implementation [4]–[6]. In [4], it has been proved that proportional feedback of the capacitor current is equivalent to a virtual resistor connected in parallel with the filter capacitor. However, this conclusion is drawn without considering the delay effect, and thus it is not accurate when digital control is employed.
This paper explores the effect of computation and PWM delays on the capacitor-current-feedback active damping for the LCL-type grid-connected inverter, and proposes useful guidelines for improving system robustness against the grid-
In the digital controlled system, there will be computation and PWM delays. The computation delay is the time This work was supported by the National Natural Science Foundation of China under Award 50837003 and Award 51007027, and the National Basic Research Program of China under Award 2009CB219706.
978-1-4799-0336-8/13/$31.00 ©2013 IEEE
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Figure 1. An LCL-type grid-connected inverter with capacitor-currentfeedback active damping.
impedance variation. In Section II, the averaged switch model (ASM) of digital controlled LCL-type grid-connected inverter with capacitor-current-feedback active damping is derived. Based on the ASM and the open-loop Bode diagrams, great insights into the delay effect on the damping performance are provided in Section III. To improve system robustness against the grid-impedance variation, a capacitor -current-feedback active damping with reduced computation delay is proposed and designed in Section IV. In Section V, the experimental results are presented to verify the theoretical analysis. Finally, Section VI concludes this paper.
Figure 2. Computation and PWM delays inherent in the digital PWM.
To evaluate the delay effect on the damping performance from a general point of view, the capacitor-current-feedback active damping with an unspecified computation delay is intentionally investigated. Indeed, the fundamental component of the capacitor current has no contribution to the resonance damping [3], and thus is unnecessary to be sampled accurately. In view of this, we might sample the capacitor current at the time instant which has a time duration of Td (0 < Td ≤ Ts) before the PWM reference update instant, and the sampled capacitor current is shown with the dashdotted line in Fig. 2. Thus, the computation delay in capacitor-currentfeedback active damping can be expressed in a general value of Td. For convenience, it is defined that Td = λTs (0 < λ ≤ 1). Obviously, λ = 1 for the synchronous sampling case.
II. MODELING THE LCL-TYPE GRID-CONNECTED INVERTER Fig. 1 shows the configuration of a voltage source inverter (VSI) feeding into the grid through an LCL filter. The grid impedance at the point of common coupling (PCC) is considered as a pure inductance Lg. A phase-locked loop (PLL) is used to synchronize the grid current reference iref with the voltage at PCC, which is denoted by vg′, and the amplitude of iref is directly given as I*. The grid current iL2 is sensed with the sensor gain of Hi2, the sensed current is compared to its reference, and the error signal is sent to a current regulator Gi. The capacitor current ic is fed back to damp the LCL-filter resonance actively, and Hi1 is the feedback coefficient. Finally, the modulation reference vm is obtained and fed to a digital PWM modulator.
After being updated, the PWM reference is held on and compared to the triangular carrier to generate the duty cycle. This behavior is modeled by the ZOH, which is expressed as Gh(s) ≈ Tse−0.5sTs [9]. It means that a PWM delay of half sampling period is introduced. Considering the computation and PWM delays, the ASM of the digital controlled LCLtype grid-connected inverter is given in Fig. 3, where KPWM is the transfer function of the PWM inverter, expressed as KPWM = Vin /Vtri, and Vin is the input voltage, Vtri is the amplitude of the triangular carrier. Meanwhile, the sampler is represented by 1/Ts [14].
The mechanism of the computation and PWM delays is shown in Fig. 2, where the sine-triangle, asymmetrical regular sampled PWM is employed, and Ts is the sampling period. In general, iL2 and ic are sampled at the beginning and in the middle of the switching period, and the sampled currents are shown with the dashed lines in the figure. Such sampling method is called the synchronous sampling, and it has the advantage of obtaining the average current per switching period (the fundamental component) without requiring low pass filtering [7]. At time step k, the sampled currents are used to calculate the PWM reference, which is then updated at time step k+1 to avoid the unwanted intermediate PWM transitions [13]. Thus, a computation delay of Ts is introduced into the grid current loop and the capacitor-currentfeedback active damping, which is expressed as Gd(s)= e−sTs.
Referring to Fig. 3, by replacing the feedback of the capacitor current ic(s) with the capacitor voltage vc(s), and moving its feedback node from the output of Gd(s) to the output of 1/sL1, it would be found that the capacitor-currentfeedback active damping is equivalent to a virtual impedance Zeq connected in parallel with the filter capacitor. And Zeq is expressed as 729
iref(s) + –
Gi(s)
Gd(s)
+ –
1 Ts
Gh(s)
e
KPWM
−sλTs
+
–
vinv(s)
1 sL1
+
vg(s)
ic(s)
1 sC
–
–
+
vc(s)
iL2(s) 1 s(L2+Lg)
Hi1 Hi2
Figure 3. ASM of the digital controlled LCL-type grid-connected inverter with capacitor-current-feedback active damping.
Rd 0 −Rd λ=1 λ=0.5
Figure 4. Equivalent virtual impedance of the capacitor-current-feedback active damping.
Z eq ( s ) =
L1Ts e sλTs H i1 K PWM CGh ( s )
(1)
L1 e s ( λ + 0.5)Ts Rd e s ( λ + 0.5)Ts H i1 K PWM C where Rd = L1/(Hi1KPWMC) is the equivalent virtual resistor of the capacitor-current-feedback active damping without delays [4]. As shown in Fig. 4, Zeq can be represented in form of parallel connection of a resistor Req and a reactor Xeq. Substituting s = jω into (1), yields =
Req (ω ) =
Rd Rd , X eq (ω ) = . sin ( λ + 0.5 ) ωTs cos ( λ + 0.5) ωTs
(2)
In Zeq, the component Req damps the resonance peak of the LCL filter, and the component Xeq changes the resonance frequency. As seen in (2), both Req and Xeq are frequencydependent, the frequency boundary of Req to be positive and negative is fRb = fs /(4λ+2), and the frequency boundary of Xeq to be inductive and capacitive is fXb = fs /(2λ+1). Thus, fXb = 2fRb. For the synchronous sampling case (λ = 1), fRb = fs /6, fXb = fs /3, and the curves of Req and Xeq as the function of frequency are shown with the solid lines in Fig. 5.
ωr ( L1 + L2 + Lg )
Frequency
fs/6 fs/4 fs/3 fs/2
Figure 5. Curves of Req and Xeq as the function of frequency.
the resonance angular frequency of the LCL filter, i.e., L1 + L2 + Lg ωr = L1 ( L2 + Lg ) C
(4)
A. Performance Evaluation in the Open-Loop Bode Diagrams For λ = 1, the Bode diagrams of the uncompensated loop gain (Gi(z) = 1) for different fr are shown in Fig. 6. As seen, for a specified fr, both the magnitude and phase plots vary significantly with the increase of Hi1. 1) Magnitude Plots: In the range (0, fs /3), Xeq is inductive and yields a higher actual resonance frequency fr′, as shown in Fig. 6(a) and (b); and in the range (fs /3, fs /2), Xeq is capacitive and yields a lower fr′, as shown in Fig. 6(c). From (1) and (2), it is clear to see that a larger Hi1 leads to a smaller |Xeq|, and thus fr′ deviates farther from fr. Since fXb = fs /3, no matter how Hi1 increases, fr′ will only approach but never step over fs /3. But if fr < fs /6, fr′ might step over fs /6 if Hi1 is large enough. The value of Hi1 yielding fr′ = fs /6, Hi1c,
Based on the equivalent virtual impedance shown above, the effect of computation and PWM delays on the damping performance is comprehensively explored in this section. The loop gain is used for performance evaluation. For convenience of derivation, the loop gain in the z-domain is preferred. Applying z transform to the model in Fig. 3, the loop gain is derived as (3), shown at the bottom of this page. In (3), Gi(z) is the discrete representation of Gi(s), and ωr is H i 2 K PWM Gi ( z )
λ=1 λ=0.5
and the resonance frequency is fr = ωr /(2π). In the following analysis, the capacitor-current-feedback active damping with one-sample computation delay (λ = 1) is first evaluated to point out the basic problems in conventional applications.
III. EFFECT OF THE COMPUTATION AND PWM DELAYS ON THE DAMPING PERFORMANCE
T ( z, λ ) =
Rd 0 −Rd
ωr Ts ( z 2 − 2 z cos ωr Ts + 1) − ( z − 1) sin ωr Ts 2
⋅
⎡ ⎤ H K ( z − 1) ⎢ z ( z 2 − 2 z cos ωr Ts + 1) + i1 PWM ( z − 1) ⎡⎣ z sin (1 − λ ) ωr Ts + sin λωrTs ⎤⎦ ⎥ ωr L1 ⎣ ⎦
730
.
(3)
|T(z,1)| (dB) T(z,1) (°)
(a) (b) (c) Figure 6. Bode diagrams of the uncompensated loop gain T(z,1). (a) fr ∈ (0, fs /6). (b) fr ∈ (fs /6, fs /3). (c) fr ∈ (fs /3, fs /2).
is derived in Appendix, and here its expression is given as ω L ( 2 cos ωr Ts − 1) . H i1c = r 1 (5) K PWM sin ωr Ts For Hi1 > Hi1c, fr′ > fs/6, as shown in Fig. 6(a); and if fr ≥ fs /6, fr′ > fs /6 certainly exists for Hi1 > 0. 2) Phase Plots: As seen from Fig. 6, the −180° crossings might take place at fr or fs /6 or both of them. For Hi1 = 0, the phase plots cross over −180° at fr if fr < fs /6 or at fs /6 if fr > fs /6 [10]. While for Hi1 > 0, the situations become much more complicated. From (3), the uncompensated loop gains at fr and fs /6 can be obtained as H i 2 L1 T e jωr Ts ,1 =− (6a) Gi ( z ) =1 H i1 ( L1 + L2 + Lg )
(
)
T ( e jπ / 3 ,1)
=
Gi ( z ) =1
sin ωr Ts + ωr Ts (1 − 2 cos ωr Ts ) H i 2 L1 ⋅ H i1c − H i1 ( L1 + L2 + Lg ) sin ωrTs
fr′, as shown in Fig. 6(a). Apparently, these features are exactly the same as those in the undamped case. More importantly, for fr′ > fs /6, Req is negative at fr′. As demonstrated in the Appendix, a pair of open-loop unstable poles will be generated in this case. B. Stability Analysis with the Nyquist Stability Criterion After a detailed investigation of the frequency responses of the loop gain, stability analysis is carried out with the Nyquist stability criterion. In the open-loop Bode diagram, the frequency ranges with gains above 0 dB are concerned. In these ranges, a −180° crossing in the direction of phase rising is defined as positive crossing, and a −180° crossing in the direction of phase falling is defined as negative crossing. The numbers of positive and negative crossings are denoted by N+ and N−, respectively. The Nyquist stability criterion tells that the value of 2(N+−N−) must equal to the number of the open-loop unstable poles to ensure system stability. Otherwise, the system goes unstable [16].
(6b) Case I: fr < fs /6, and fr′ ≤ fs /6. For fr < fs /6, if 0 < Hi1 ≤ From (6a), it can be seen that the phase plots always cross Hi1c, then fr′ ≤ fs /6, and no open-loop unstable pole exists. over −180° at fr for Hi1 > 0. fr < fs /2 is required to ensure Hence, the value of 2(N+−N−) must equal zero to ensure system controllability [15], thus 0< ωrTs < π and sinωrTs > 0. system stability. Note that the phase plot crosses over −180° In (6b), letting f(ωrTs)= sinωrTs+ωrTs(1−2cosωrTs), it is easy only at fr in the direction of phase falling, which means N+ is to get that f′(ωrTs) > 0. That means f(ωrTs) is an increasing zero unconditionally. Therefore, as long as the gain margin function, and f(ωrTs) > f(0) = 0. And as seen in (5), Hi1c > 0 at fr is greater than 0 dB, i.e., N− = 0, the system will be for fr < fs /6 and Hi1c ≤ 0 for fr ≥ fs /6. Thus, if fr < fs /6, the stable. From (3), the gain margin at fr can be obtained as phase plots cross over −180° one more time at fs /6 for Hi1 > Hi1c; and if fr ≥ fs /6, the phase plots certainly cross over H i1 ( L1 + L2 + Lg ) −180° at fs /6 for Hi1 > 0. GM 1 = −20 lg T e jωr Ts ,1 = 20 lg Gi ( z ) = K p H i 2 K p L1 3) Open-Loop Unstable Poles: Since the resonance (7) actually arises at fr′ rather than fr, the characteristics that Req where the unit of GM1 is dB, and Kp represents the proporexhibits at fr′ will be essential for the resonance damping. tional gain of Gi(z) above the crossover frequency (the lowSpecially, for fr′ = fs /6, i.e., Hi1 = Hi1c when fr < fs /6, since est frequency where unity gain occurs). Req is infinite at fr′ (fs /6), it has no contribution to the resonance damping. Thus, the magnitude plot exhibits an Case II: fr < fs /6, and fr′ > fs /6. For fr < fs /6, if Hi1 >Hi1c, infinite resonance gain, and the phase plot steps by −180° at L1 + L2 + Lg H i1 K PWM sin ωr Ts + ωr L1 (1 − 2 cos ωr Ts ) = 20 lg ⋅ GM 2 = −20 lg T ( e jπ / 3 ,1) . (8) Gi ( z ) = K p H i 2 K PWM K p L1 sin ωr Ts + ωr Ts (1 − 2 cos ωr Ts )
(
731
)
decreases in Case II, thus the stability margin gets larger, which indicates high robustness against the grid-impedance variation; 3) If fr = fs /6, GM1 = GM2, the requirements of GM1 < 0 dB and GM2 > 0 dB are contradictory, which means the system can hardly be stable irrespective of Hi1. To improve system robustness for fr > fs /6, and address the stability challenge for fr = fs /6, the open-loop unstable poles need to be removed. In doing so, the system with fr ≥ fs /6 will behave in the same way as the case of fr′ ≤ fs /6, where the gain margin requirement is much easier to be satisfied. Based on the previous analysis, a positive Req in a wider frequency range would be desirable to get rid of the open-loop unstable poles. This can be achieved by reducing λ, i.e., reducing the computation delay in the capacitorcurrent-feedback active damping.
Figure 7. The curves of GM1 and GM2 with the increase of Lg.
then fr′ > fs /6, a pair of open-loop unstable poles arises, and the phase plot crosses over −180° at fr in the direction of phase falling, and at fs /6 in the direction of phase rising, respectively. Hence, to ensure system stability, the value of 2(N+−N−) must equal two, which means that the gain margin at fr must be greater than 0 dB, i.e., N− = 0, and the gain margin at fs /6 must be smaller than 0 dB, i.e., N+ = 1. From (3), the gain margin at fs /6 can be obtained as (8), shown at the bottom of the last page. According to (7) and (8), GM2 will be equal to GM1 if fr = fs /6.
IV. CAPACITOR-CURRENT-FEEDBACK ACTIVE DAMPING WITH REDUCED COMPUTATION DELAY As seen in Fig. 2, the computation delay in the capacitor -current-feedback active damping can be reduced by shifting the capacitor current sampling instant towards the PWM reference update instant. And, for a smaller λ, Zeq exhibits more like the virtual resistor Rd. The previous analysis shows that, fRb should be higher than fr to get rid of the open -loop unstable poles. Since fRb increases with the decrease of λ, a smaller λ would be desirable for a higher LCL-filter resonance frequency. To obtain a more explicit knowledge, a well-designed LCL filter given in Table I is taken as an instance to show how the damping performance is improved by reducing the computation delay.
Case III: fr ≥ fs /6, and fr′ > fs /6. If fr ≥ fs /6, then fr′ > fs /6 for Hi1 > 0, and the phase plot crosses over −180° at fs /6 in the direction of phase falling, and at fr in the direction of phase rising, respectively. Similarly, due to the existence of a pair of open-loop unstable poles, GM1 < 0 dB and GM2 > 0 dB are both required for system stability.
A. Damping Performance with Reduced Computation Delay As seen in Table I, the consequent resonance frequency is fr = 4.6 kHz, which is much closer to fs /4 (5 kHz). Thus, a positive Req in the range (0, fs /4) is expected. As seen in (2), this can be achieved by choosing λ ≤ 0.5. For simplicity, the case of λ = 0.5 is illustrated here. Recalling (1) and (2), for λ=0.5, Zeq can be rewritten as RdesTs, and fRb = fs /4, fXb = fs /2. The curves of Req and Xeq as the function of frequency are shown with the dashed lines in Fig. 5. Due to the inductive Xeq, a higher fr′ is yielded. And fr′ might step over fs /4 if Hi1 is sufficiently large. Similar to the derivation of Hi1c, in this case, the value of Hi1 yielding fr′ =fs /4 can be obtained as ωr L1 cos ωr Ts . H i1m = (9) K PWM sin 0.5ωr Ts
C. Robustness against the Grid-Impedance Variation As seen, if a pair of open-loop unstable poles is generated, stringent gain margin requirements have to be satisfied to ensure system stability, and these requirements vary with fr. Therefore, it is necessary to evaluate the system robustness against the variation of fr, which is commonly caused by the variation of the grid impedance Lg [12]. According to (7) and (8), the curves of GM1 and GM2 with the increase of Lg are depicted in Fig. 7, where fr > fs /6 is chosen for Lg = 0 in order to cover all the three cases discussed above. With the increase of Lg, both fr and fr′ decreases. Since fr′ > fr for fr < fs /6, the system first steps from Case III into Case II, and then into Case I. And for fr′ = fs /6, since T(z,1) exhibits an infinite resonance gain at fs /6, a notch is produced in the curve of GM2 consequently. Based on Fig. 7 and the gain margin requirements discussed above, we can conclude that: 1) If fr > fs /6, GM1 < 0 dB and GM2 > 0 dB are required for Hi1 > 0 (Case III). With the increase of Lg, GM1 increases, and GM2 decreases in Case III, thus the stability margin gets smaller, which indicates poor robustness against the grid-impedance variation; 2) If fr < fs /6, GM1 > 0 dB is required for 0 < Hi1 ≤ Hi1c (Case I), and GM1 > 0 dB and GM2 < 0 dB are required for Hi1 > Hi1c (Case II). With the increase of Lg, GM1 increases in Case I and Case II, and GM2
Therefore, for fr < fs /4, if 0 < Hi1 < Hi1m, then fr′ < fs /4, Req is positive at fr′, no open-loop unstable pole exists (the derivation of the open-loop unstable poles is similar to the case of λ = 1), and the phase plot crosses over −180° only once. According to the Nyquist stability criterion, as long as the gain margin at the −180° crossover frequency is greater than 0 dB, the system will be stable. Apparently, these features are exactly the same as the case of fr′ < fs /6 for λ =1. Thus, it can be foreseen that a robust damping performance will be acquired in the case of fr′ < fs /4 for λ = 0.5. To be rigorous, a design example will be given in the following.
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TABLE I. PARAMETERS OF THE PROTOTYPE Parameter
Symbol
Value
Parameter
Symbol
Value
Input voltage
Vin
360 V
Inverter-side inductor
L1
600 μH
Grid voltage (RMS)
Vg
220 V
Grid-side inductor
L2
150 μH
Output power
Po
6 kW
Filter capacitor
C
10 μF
fo
50 Hz
Resonance frequency
fr
4.6 kHz
fsw
10 kHz
fs
20 kHz
Vtri
4.58 V
Hi2
0.15
Fundamental frequency Switching frequency Amplitude of the triangular carrier
Sampling frequency Grid current feedback coefficient
B. Design Example Table I gives the parameters of a 6-kW single-phase LCL-type grid-connected inverter, where the sine-triangle, asymmetrical regular sampled PWM is implemented, and a proportional-resonant (PR) regulator is employed. To obtain a satisfactory transient performance, a phase margin (PM) of 45° at a crossover frequency fc ≈ 0.3fr is desired [5], [10]. In the s-domain, PR regulator is expressed as [17] 2 K r ωi s Gi ( s ) = K p + 2 (10) s + 2ωi s + ωo2 where ωo = 2πfo is the fundamental angular frequency, and ωi is the resonant cut-off frequency. To deal with a typical ±1% variation of the grid fundamental frequency [18], ωi = 1%·2πfo = π rad/s is set. Kp = 0.48 is chosen for a target fc = 1.3 kHz, and then Kr = 65 is designed to achieve PM = 45°.
Figure 8. Bode diagrams of the compensated loop gain T(z,λ).
V. EXPERIMENTAL VERIFICATION A 6-kW prototype is built and tested in the lab. The controller is implemented in a TI TMS320F2812 DSP. Since the real grid contains uncertain grid impedance, a programmable ac source (Chroma 6590) is used to simulate the grid voltage in the experiments, and the grid impedance Lg is emulated by an external inductor. Fig. 9 shows the steady-state experimental results under full load condition with Lg = 0. As seen, rare differences can be observed in the grid currents for different λ. To provide a more explicit comparison, the measured results are further presented here. And the measured fundamental amplitude error of the grid current is 0.4% in both cases. This is thanks to the PR regulator which has sufficiently high fundamental gain and thus ensures the tracking accuracy. Fig. 10 shows the transient experimental waveforms when the grid current reference steps between half and full load with Lg = 0. And the measured percentage overshoots of the grid current is 40% in both cases.
Hi1 is designed to achieve proper resonance damping with reasonable gain margins, typically 3 dB [9]. For the capacitor-current-feedback active damping with one-sample computation delay (λ = 1), according to Section III, GM1 < −3 dB and GM2 > 3 dB are both required. From (7) and (8), the corresponding satisfactory range of Hi1 can be obtained as (0.004, 0.041). Thus, the middle value of Hi1=0.025 is chosen. For the capacitor-current-feedback active damping with reduced computation delay, λ = 0.5 is evaluated here, and Hi1m = 0.042 can be calculated out from (14). To get rid of the open-loop unstable poles, Hi1 < 0.042 is required. In this case, the phase plot crosses over −180° near fs /6, thus a 3-dB gain margin at fs /6 is required. According to (3), solving −20lg|T(ejπ/3,0.5)| > 3, yields Hi1 > 0.004. Therefore, Hi1 = 0.025 is also appropriate for λ = 0.5. The Bode diagrams of compensated loop gain for λ = 1 and λ = 0.5 are shown in Fig. 8. For λ = 1, the gain above 0 dB is required to yield a positive crossing at fr, the phase plot crosses over −180° both at fr and fs /6, and the corresponding gain margins are GM1 = −7.52 dB and GM2 = 4.25 dB; and for λ = 0.5, there is no constraint on the gain at fr since the open-loop unstable poles have been removed and the phase at fr is already well below −180°, the phase plot crosses over −180° near fs /6, and the corresponding gain margin is 4.41 dB. As seen, the 3-dB gain margin requirements are well satisfied in both cases. 733
As discussed in Section III, system instability may arise when fr comes closer to fs /6. To draw the worst case, fr=fs /6, which corresponds to Lg = 220 μH, is chosen and tested, and the experimental waveforms for different λ are given in Fig. 11. For λ = 1, as shown in Fig. 11(a), significant steady-state oscillation arises in the grid current, and the oscillation frequency is exactly fr = 3.3 kHz. This indicates instability and is in good agreement with the theoretical analysis. And for λ = 0.5, the steady-state oscillation is absent, and a stable operation is retained. The experimental results show that, using the capacitor-current-feedback active damping with reduced computation delay, the digital controlled LCL-type grid-connected inverter remains satisfactory steady-state and transient performances, and exhibits high robustness against the grid-impedance variation at the same time.
(a) (b) Figure 9. Steady-state experimental results under full load condition with Lg = 0. (a) λ = 1. (b) λ = 0.5.
(a) (b) Figure 10. Transient experimental results when the grid current reference steps between half and full load with Lg = 0. (a) λ = 1. (b) λ = 0.5.
(a)
(b) Figure 11. Experimental results with Lg=220 μH. (a) λ = 1. (b) λ = 0.5.
ing frequency (fs /6), where the virtual resistor is negative, a pair of open-loop unstable poles will be generated. The open-loop unstable poles make the LCL-type grid-connected inverter much easier to be unstable if the resonance frequency is moved closer to fs /6 due to the variation of the grid impedance. This paper addresses this issue by shifting the capacitor current sampling instant towards the PWM reference update instant. In doing so, the LCL-type gridconnected inverter remains satisfactory steady-state and transient performances, and exhibits high robustness against the grid-impedance variation at the same time.
VI. CONCLUSION This paper identifies the role that the computation and PWM delays play in the effectiveness of capacitor-currentfeedback active damping for the LCL-type grid-connected inverter. A virtual impedance model is proposed to describe the damping performance. This virtual impedance consists of a resistor paralleled with a reactor. The virtual resistor damps the resonance peak of the LCL filter, and the virtual reactor changes the resonance frequency. If the actual resonance frequency is higher than one-sixth of the sampl-
734
APPENDIX First, the value of Hi1 yielding fr′ = fs /6, Hi1c, is derived. Extracting the partial factor from the denominator of T(z,1): H K Den ( z ) = z ( z 2 − 2 z cos ωr Ts + 1) + i1 PWM ( z − 1) sin ωr Ts . ωr L1 (A.1) At the actual resonance frequency fr′, a pair of resonant ± j 2π f r′Ts poles exists, which is z1,2 = e . For fr′ = fs /6, z1,2 are z1,2 =
1 3 ± j . 2 2
REFERENCES [1]
[2]
[3]
[4]
(A.2)
Apparently, z1,2 are the roots of Den(z) =0. Substituting (A.2) into (A.1), and solving Den(z1,2) = 0, Hi1c is obtained as ω L ( 2 cos ωr Ts − 1) H i1c = r 1 . (A.3) K PWM sin ωr Ts Second, the existence conditions of open-loop unstable poles are derived. Apparently, the open-loop unstable poles of T(z,1) can only exist in the roots of Den(z) = 0. To check the root location, we take the w transform z = (1+w)/(1−w) to map the area outside the unit circle in the z-plane into the right-half plane in the w-plane. In this way, Den(w) can be expressed as 2 ( a3 w3 + a2 w2 + a1 w + a0 ) Den ( w ) = Den ( z ) z =1+ w = (A.4) 3 1− w (1 − w ) where K PWM H i1 sin ωr Ts ⎧ ⎪a3 = 1 + cos ωr Ts + ωr L1 ⎪ ⎪a = 1 + cos ω T − 2 K PWM H i1 sin ωr Ts ⎪ 2 r s . ωr L1 (A.5) ⎨ ⎪ K PWM H i1 sin ωr Ts ⎪a1 = 1 − cos ωr Ts + ωr L1 ⎪ ⎪⎩a0 = 1 − cos ωr Ts For 0 < fr < fs /2 and Hi1 > 0, a3 > 0 and a1 > a0 > 0 are obtained. According to Routh’s Method, the Routh array of the characteristic equation a3w3+a2w2+a1w+a0 = 0 is w3 : a3 a1 w2 : a2 a0 w1 : b1 0
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[6]
[7] [8]
[9]
[10]
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(A.6) [15]
w0 : a0 where b1 = (a1a2−a0a3)/a2. To avoid the right-half-plane roots for Den(w) = 0, which are also the open-loop unstable poles of T(z,1), the conditions of a2 ≥ 0 and b1 ≥ 0 must be satisfied. From (A.5), we can get 0 < H i1 ≤ H i1c . (A.7) Note that Hi1c > 0 for fr < fs /6 and Hi1c ≤ 0 for fr ≥ fs /6. Therefore, if fr < fs /6, no open-loop unstable poles exist for 0 < Hi1 ≤ Hi1c; and for Hi1 > Hi1c, there is at least one negative value between a2 and b1, thus a pair of open-loop unstable poles is produced. And if fr ≥ fs /6, there is certainly a pair of open-loop unstable poles for Hi1 > 0.
[16]
[17]
[18]
735
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