Room-temperature fabricated, fully transparent ...

Solid State Communications 202 (2015) 28–34

Contents lists available at ScienceDirect

Solid State Communications journal homepage: www.elsevier.com/locate/ssc

Room-temperature fabricated, fully transparent resistive memory based on ITO/CeO2/ITO structure for RRAM applications Muhammad Ismail a,b,n, Anwar Manzoor Rana a, Ijaz Talib a, Tsung-Ling Tsai b, Umesh Chand b, Ejaz Ahmed a, Muhammad Younus Nadeem a, Abdul Aziz a, Nazar Abbas Shah c, Muhammad Hussain d a

Department of Physics, Bahauddin Zakariya University, Multan-60800, Pakistan Department of Electronics Engineering and Institute of Electronics, National Chiao Tung University, Hsinchu-30010, Taiwan c Thin Films Technology Research Laboratory, Department of Physics, COMSATS Institute of Information Technology, Islamabad-45320, Pakistan d Centre for High Energy Physics, University of The Punjab, Lahore-54590, Pakistan b

art ic l e i nf o

a b s t r a c t

Article history: Received 25 August 2014 Received in revised form 25 September 2014 Accepted 14 October 2014 Available online 12 November 2014

Fully transparent resistive random access memory (TRRAM) device based on CeO2 as active layer using indium-tin-oxide (ITO) electrodes was fabricated on glass substrate. The ITO/CeO2/ITO memory device shows 81% transmission of visible light, optical band gap energy of 4.05 eV, and exhibits reliable bipolar resistive switching behavior. X-ray diffraction of CeO2 thin films demonstrated a weak polycrystalline phase. The low field conduction is dominated by Ohmic type while Poole–Frenkel effect is responsible for conduction in the high field region. The device reliability investigations, such as data retention (over 104 s) under applied stress and endurance tests conducted at room temperature and 85 1C show potential of our TRRAM devices for future non-volatile memory applications. & 2014 Elsevier Ltd. All rights reserved.

Keywords: Resistive switching Thin films Sandwich Metal Poole–Frenkel conduction

1. Introduction Transparent electronics is an emerging technological field which employs “invisible” electronic circuitry [1]. One of its principal components is transparent non-volatile memory (NVM). In this regard, transparent resistive random access memory (TRRAM), owing to its non-volatility, is a potential candidate for application in transparent electronics. TRRAM demonstrates excellent memory characteristics like high storage capacity, long retention time and low power consumption [2–6]. Now-a-days, many researchers are studying the transparent resistive random access memory (TRRAM) devices using some rare-earth oxide materials, e.g. Yb2O3, Gd2O3, Ce2O3, Eu2O3, Lu2O3 and Tm2O3 [4,7–10]. Rare-earth oxides (REOs) have shown promising characteristics for high-k gate insulators in advance CMOS technology [11]. Recently, CeO2 have attracted considerable interest of researchers as a transparent resistive switching material [9], due to its high transparency in UV–visible region [12], large band gap ( 6 eV) [13], high dielectric constant ( 26) [14], high refractive index (2.2 to 2.3) and good thermal stability [15]. CeO2 is known to exhibit both Ce3 þ and Ce4 þ ionic states. A reversible transition of n Corresponding author at: Department of Physics, Bahauddin Zakariya University, Multan-60800, Pakistan. Tel.: þ 92619210091; fax: þ 92619210098. E-mail address: [email protected] (M. Ismail).

http://dx.doi.org/10.1016/j.ssc.2014.10.019 0038-1098/& 2014 Elsevier Ltd. All rights reserved.

these valance states leads to the rapid formation and annihilation of oxygen vacancies [16]. Although, the resistance switching characteristics of CeO2 films [9] and nanocubes [16] have been studied, the current conduction mechanisms in TRRAM devices based on CeO2 have not been addressed yet. Various researchers have studied TRRAM devices based on rare earth oxides (REOs), transition metal oxides and nitrides using ITO as top and bottom electrodes, such as Gd2O3 [10], AlN [17], IGZO [18], ZnO [19], TiO2 [20], SiOx [21]. In spite of the fact that both electrodes were of the same material, in most cases, a bipolar resistive switching behavior was observed except for the SiOx-based device which also showed unipolar behavior. In most of the above mentioned TRRAM devices, mechanism of resistive switching has been explained by the formation and rupture of conducting filaments at the top electrode-oxide interface formed by oxygen vacancies [19,20], and/or migration of oxygen ions [10]. However, Kim [17] suggested the switching mechanism to be based upon trapping and detrapping of electrons in nitride related electron traps in the ITO/AlN/ITO device. In addition, variations in critical switching parameters, namely initiation voltages and set/reset currents are still challenges which have to be addressed for potential TRRAM applications. In this study, we have investigated the resistive switching characteristics of TRRAM devices based on a transparent ITO/CeO2/ITO capacitor structure. After forming process, bipolar switching behavior

M. Ismail et al. / Solid State Communications 202 (2015) 28–34

was observed in our ITO/CeO2/ITO TRRAM device. The possible switching mechanism of our TRRAM device has been proposed to be based on the formation and rupture of conducting filaments. The observed bipolar RS properties of our ITO/CeO2/ITO TRRAM device demonstrate reliable and stable switching characteristics.

2. Experimental procedure Ceria (CeO2) thin films of 15 to 25 nm thickness were deposited by radio-frequency (RF) magnetron sputtering using a CeO2 ceramic target on a commercial ITO coated glass substrate (with ITO thickness of 200 nm) in argon–oxygen (20:10) medium at room temperature. Base pressure of the chamber was kept below 1.2 10 6 Torr by a turbomolecular pump. The working pressure was maintained at 10 mTorr, while RF power during deposition was 75 W. For resistance switching measurements, 75 nm thick ITO top electrodes of 150 μm in diameter were deposited by RF magnetron sputtering with a metal shadow mask. During ITO deposition, chamber pressure was maintained at 10 mTorr in Ar environment with sputter power of 100 W. Crystal structure of the devices was examined by X-ray diffractometer (Bede D1, Bede PLC London, UK) using Cu Kα (λ ¼ 1.542 Å) radiations for 2θ ranging from 201 to 801. Optical transmittance of the device was measured with a Hitachi U2800 UV/VIS spectrophotometer in the wavelength range from 200 to 800 nm. The B1500A semiconductor parameter analyzer was used to perform

Fig. 1. (Color online) (a) XRD pattern of ITO/CeO2/ITO/glass device, having CeO2 layer of 15 nm thickness.

29

electrical measurements. A bias voltage was applied to the top electrode while the bottom electrode was grounded.

3. Results and discussion X-ray diffraction (XRD) pattern for the ITO/CeO2/ITO device is presented in Fig. 1. The observed diffraction lines indexed as (1 1 1), (2 0 0), (2 2 0), (3 1 1), (4 0 0) and (3 3 1) are an indication of the formation of “fluorite cubic structure of CeO2” just in accordance with the standard data (JCPDS #: 34-0394). The low intensity and broadness of CeO2 reflections can be attributed to the weak polycrystalline nature of the CeO2 layer. The weak polycrystalline structure may be associated with very small thickness ( 15 nm) of the film. Moreover, ITO electrode also exhibits a polycrystalline structure, as indicated by various diffraction lines related to In2O3 [20]. For quantitative evaluation of optical transparency of the ITO/ CeO2/ITO/glass device, Fig. 2(a) illustrating variations in the optical transmittance as a function of wavelength can be used. It is noticed that our TRRAM device on glass substrate is 8173% transparent in the visible region of electromagnetic spectrum from 400 to 700 nm. Since thickness of the CeO2 layer is very small (15 nm) as compared to those of top (75 nm) and bottom electrodes (200 nm), the principal optical absorption can be attributed to the top and bottom ITO electrodes. This fact also suggests that transparency of the device can be improved by using even more transparent top and bottom electrodes. Moreover, a noticeable decrease in transmittance in the ultraviolet region can be associated with strong optical absorption by the ITO electrodes. Due to strong transmission properties, our ITO/CeO2/ITO device can find its immediate applications in fully transparent resistive switching memory devices. Optical transparency of a material can also be understood in terms of its band gap energy. As visible region of electromagnetic spectrum corresponds to photon energy of 1.56–3.26 eV so a material whose band gap energy is greater than 3.26 eV, is incapable to absorb the visible energy and therefore can behave optically transparent in this region of electromagnetic spectrum. Considering the direct allowed transition, optical band gap energy can be determined by extrapolating the linear portion of (α h υ)2 vs. hυ plot to (α h υ)2 ¼0 drawn in Fig. 2(b). The optical band gap energy of CeO2 obtained from Fig. 2(b) turns out to be 4.05 eV. This value indicates that the CeO2 layer is completely transparent to the human eye. This value of optical band gap energy of CeO2 is considerably smaller than its bulk band gap energy (6 eV) but it is in

Fig. 2. (Color online) (a) Optical transmittance spectrum of the ITO/CeO2/ITO device in the visible wavelength region. Inset shows schematic configuration of the capacitor structure. (b) The direct band gap energy of CeO2 films. Inset shows the transparency picture of the fabricated TRRAM device.

30


close agreement with that of ITO (3.6 eV) [22,23]. It appears that ITO layers in the TRRAM device manifest themselves predominantly as direct band gap materials. Band gap energy of thin films is known to depend on various factors such as film thickness [24], deposition technique [25], annealing [26], defect states etc. and is associated with the formation of nano-particles [24], nano-porosity [27], an oxide network causing quantum confinement effects associated with nanostructures [24–28]. Therefore, reduction in band gap energy of CeO2 thin film can be associated with the dominant role of ITO layers and the quantum confinement effects associated with nanostructures. Inset of Fig. 2(a) is a schematic diagram of our TRRAM capacitor structure, which is printed/deposited on the glass substrate. In addition, one can clearly see our university logo placed on the bottom of TRRAM device, which appears without any distortion and reflection with the printed marks covered showing its transparency (inset of Fig. 2(b)) Fig. 3(a–c) displays I–V characteristics of ITO/CeO2/ITO memory devices with varying thickness in pristine state; each device requires an electroforming step (a ramped voltage sweep). All other devices, except the one with 15 nm thick CeO2 layer, do not show welldefined and repeatable resistive switching after the initial electroforming step. That’s why resistive switching parameters described in this report are only due to TRRAM devices with 15 nm thick CeO2 layer. Such a 15 nm thick CeO2-based device shows well-defined stability of bipolar resistive switching behavior resulting from the formation and rupture of conducting filaments in its active (CeO2)

layer (after the forming step under an appropriate current compliance). It is clear from Fig. 3(d) that forming voltages needed to activate resistive switching between LRS and HRS in all the devices are not the same because each device has different thickness of CeO2 layer. Higher forming voltages were observed for TRRAM devices with thicker CeO2 layer. Such behavior might have originated from nano-morphological variations in the CeO2 layer caused by high oxygen vacancy density [9,29]. Following the electroforming step, subsequent RESET transition (switching from LRS to HRS) of the 15 nm CeO2 TRRAM device occurs during negative bias sweeping while SET transition by applying a positive bias. Such positive SET and negative RESET transformations are typical indicative of bipolar resistive switching behavior [30]. It is believed that conducting filaments are formed during the initial forming step under the influence of the applied biasing voltage, which attracts oxygen ions towards top ITO electrode leaving oxygen vacancy behind. These conductive paths consisting of oxygen vacancies are created in the CeO2 layer during the forming step, or partly contributed by the top ITO electrode [20]. Particularly, the requirement of relatively large forming voltage to initiate the resistive switching behavior indicates that it is the forming step that creates oxygen vacancies as described above and large enough in number to produce filamentary conductive path(s). If the CeO2 layer had enough number of oxygen vacancies before the application of the forming voltage, it would have been found in ON state in its pristine status without requiring a forming step. Thus the applied biasing field induced formation and

Fig. 3. (Color online) Typical I–V curves show the initial forming process and first sweep of the bipolar resistive switching behavior of ITO/CeO2/ITO devices having CeO2 layer thickness of (a) 15 nm, (b) 20 nm (c) 25 nm, (d) Forming and switching voltage variations with CeO2 film thickness.


rupture of these conductive filaments may be imagined to be the cause of SET and RESET transitions in the device. During RESET transitions the top ITO electrode may be imagined to act as an oxygen reservoir which provides oxygen ions back to the positively charged vacancies when biased negatively and thus ruptures the filament near the top. Also, a positive voltage applied to the top electrode attracts oxygen ions back creating the oxygen vacancies into the CeO2 layer and thus completing the conductive paths (SET). A high density of oxygen ions in ITO layer and/or ITO/CeO2 interface may thus be expected to affect the forming, SET and RESET transition voltages [21]. It is noted that an increase in CeO2 film thickness imparts only slight changes in Vreset, but a significant rise in Vf and Vset (Fig. 3(d)). As Vf and Vset are responsible for the formation of conducting filaments, so a thicker CeO2 layer requires higher voltage to create oxygen vacancies and form conductive filaments. Good endurance is among the fundamental challenges for a transparent nonvolatile memory (NVM) device. During endurance test, the device is subjected to repetitive electric-pulse-induced write/read/erase/read cycles of resistive switching. In this regard, read/erase memory performance of our TRRAM device has been evaluated at 0.2 V and measuring the resistance offered by the device in its LRS and HRS as shown in Fig. 4. It is observed that our TRRAM device successfully attained the stable LRS and HRS for more than 100 switching cycles without any noticeable degradation. Resistance ratio of HRS to LRS though greater than one order of magnitude, the LRS and HRS resistance levels, however, are clearly distinguishable and well maintained for more than 100 dc voltage sweeps (Fig. 4).

Fig. 4. (Color online) Endurance performance of the ITO/CeO2/ITO device.

31

This behavior can also be verified by plotting the cumulative probability of the ON and OFF state resistances of the ITO/CeO2/ITO devices determined at a read voltage of 0.2 V as illustrated in Fig. 5 (a). As dispersion in LRS and HRS is significantly small, so device shows high uniformity in its resistive switching behavior. Furthermore, the cumulative probability distribution of the SET and RESET voltages (Vset and Vreset) for cycle-to-cycle (C2C) testing in 100 dc cycles has also been presented in Fig. 5(b). The voltage difference between VSET (1.3–1.4 V) and VRESET (0.9 V) is 2.2 V. The almost zero dispersion in the switching voltages signifies that the formation and rupture processes of conducting filaments are well-controlled. Reports [31,32] have shown that such stability and control of switching voltages often stems from the conduction of charge carriers through oxide defects/vacancies in the active oxide layer. To elucidate the performance of nonvolatile memory in both HRS and LRS, destructive and non-destructive characteristics of the devices are performed. Fig. 6 is an illustration of both the stress and the retention times of LRS and HRS at room temperature as well as at 85 1C. The data was obtained at read voltage of 0.2 V for the TRRAM device with 15 nm CeO2 layer. The device demonstrated both tests in a well-behaved manner for more than 104 s at room temperature as well as at 85 1C. A simple extrapolation of the stress and retention plots (not shown) can be used to reveal that the device can sustain biasing stress and retain stored data over several years even at elevated temperature (85 1C) without any significant degradation in ON/OFF resistance ratio. A slight increase in the HRS resistance values is noticed after about 100s of stress at both temperatures (Fig. 6(a)). Probably, under the action of small reading voltage and/or high temperature, with the passage of time O2 vacancies may diffuse away from the ruptured filaments thereby decreasing their number and increasing resistance to the flow of current and in turn increasing the OFF state resistance of the device. It is known that resistance in the ON state is associated with the size of conductive filaments while OFF state resistance depends upon the remaining part of the ruptured filaments [33]. Hence with a reduction in the remaining/unruptured part of the conduction path, OFF state resistance is expected to increase. Such rise of resistance in the HRS is favorable to have clear distinction between the two resistance states. This fact is useful to increase the reliability of the device for its practical applications as nonvolatile memory. To understand the current conduction mechanisms in the ON and OFF states of the TRRAM devices, curve fitting is performed for both positive and negative bias regions of the initial I–V characteristics. Fig. 7(a, c) shows the double-logarithmic I–V plots for both states. At low voltage (o0.4 V), the conduction mechanism in HRS of the ITO/CeO2/ITO device is of Ohmic nature (slope

Fig. 5. (Color online) Cumulative distributions of the values of (a) Ron and Roff (b) Vset and Vreset for the ITO/CeO2/ITO/glass devices.

32


Fig. 6. (Color online) (a) Stress data characteristics of ITO/CeO2/ITO memory device at RT and at 85 1C showing long term stability. (b) Retention data of HRS and LRS at room temperature and at 85 1C.

Fig. 7. (Color online) The log–log plot of I–V in (a) the Set process and (c) the Reset process of CeO2-based TRRAM device. Figs (b) and (d) show Poole–Frenkel emission characteristics at high voltage region in the HRS.

E1.17–1.18) which indicates that at low biasing voltage thermallygenerated charge carriers inside the CeO2 thin film dominate the carriers injected by ITO electrode [34]. In the high voltage region (4 0.4 V), conduction is governed by Poole–Frenkel emission caused by the trapping centers (electron traps or defects) as ln (J/E) Vs. E1/2 plots drawn in Fig. 7(b and d) portray straight lines

confirming the existence of Poole–Frenkel effect [17,35–37]. In fact, probability of Poole–Frenkel conduction becomes quite high in CeO2 layer as a high concentration of defects such as oxygenvacancies, dislocations, grain-boundaries is expected because of its weak polycrystalline nature (Fig. 1). Due to high electric field, charges trapped in such defects/ trapping sites can attain sufficient


33

Fig. 8. (Color online) Physical model of resistive switching mechanism of the ITO/CeO2/ITO device.

energy to overcome the energy barrier of the traps/interface and take part in conduction. Similar type of behavior has been observed by other researchers [37,38]. As the field attains a particular value, conductive filaments are formed throughout the active CeO2 layer resulting in a large flow of current. This explains why current conduction in LRS is Ohmic (slope ¼0.95–0.99). The above cited facts support our assumption that switching process is associated with electric field induced formation or dissolution of the conducting filaments. Bipolar resistive switching generally depends on the formation and rupture of conductive filaments in the oxide layer. Conduction mechanism in the present TRRAM devices can be associated with filamentary paths composed of oxygen vacancies. In addition, high defect density including grain boundaries and dislocations in CeO2 films might contribute to the conduction and stable resistive switching of our TRRAM devices [37,38]. Various reports demonstrate the capability of ITO polycrystalline films to act as defects reservoir and/ or source of O2 ions [20,16]. Based on the polarity of the applied bias, O2 ions can diffuse towards the ITO electrode or be repelled back. Thus ITO electrodes are expected to play vital role in the resistive switching process. The formation of conductive filaments during the initial forming step can be understood in terms of migration of O2 ions from the bottom electrode towards the top anode (Fig. 8(a)). This migration of O2 ions is capable of generating O2 vacancies in the bulk of CeO2 layer which can arrange themselves and connect under the applied bias to form conducting filaments and hence provide easy path for the flow of electrons [21]. As a result of negative bias during RESET step, oxygen vacancies close to the ITO/CeO2 interface may become electron depleted and the oxygen ions repelled back to CeO2 layer cause oxidation of these electron-depleted vacancies rupturing the conducting filaments and switching the device back to HRS as depicted in Fig. 8(b). When positive bias is applied again to the top ITO electrode, oxygen ions are once again attracted towards it creating oxygen vacancies behind which involve themselves to complete the ruptured filaments under the applied bias during SET step as displayed in Fig. 8(c), and provide easy path for the flow of electron leading to low resistance ON-state. A failure or draw back of TRRAM devices with thicker CeO2 films (20 or 25 nm) might be associated with relatively higher forming voltages, which means that a higher energy is required to form the conducting filaments. That’s why current compliance higher than 1 mA as well as higher set voltages are needed which lead to higher power consumption. Moreover, ITO electrodes can’t provide sufficient number of electrons

to fill the large number of traps/defects in the active CeO2 layer and take part in the conduction mechanism.

4. Conclusions Resistive switching characteristics have been successfully demonstrated from a fully transparent ITO/CeO2/ITO structure deposited by RF magnetron sputtering technique at room temperature. The fabricated TRRAM device exhibits excellent transparency in the visible region. XRD analysis reveals that the CeO2 film is weak polycrystalline in nature. Our TRRAM devices demonstrate reliable RS behavior with moderate power consumption, good control of switching voltage, excellent endurance (100 cycles) and reliable data retention (4105 s). The resistive switching occurs through conducting filaments made up of O2 vacancies. The switching mechanism of the device might be described as the formation and rupture of filamentary paths formed by oxygen vacancies in the CeO2 layer due to the migration of oxygen ions and filling the traps by electrons. Acknowledgments Authors acknowledge the financial support by Higher Education Commission (HEC), Islamabad Pakistan under the International research support Initiative program (IRSIP). Authors are also grateful to Prof. Dr. T.Y. Tseng, Department of Electronics Engineering and Institute of Electronics, National Chiao Tung University, Hsinchu, Taiwan for providing experimental facilities and useful suggestions. References [1] P.K. Yang, W.Y. Chang, P.Y. Teng, S.F. Jen, S.J. Lin, P.W. Chiu, J.H. He, Proc. IEEE 101 (2013) 1732–1739. [2] T.Y. Tseng, S.M. Sze, An introduction to nonvolatile memories, in: T.Y. Tseng, S.M. Sze (Eds.), Nonvolatile Memories: Materials, Devices, and Applications, vol. 1, Amer. Scientific Publ, CA. USA, 2012, pp. 1–9. [3] D. Panda, T.Y. Tseng, Thin Solid Film 9 (2013) 1–20. [4] S. Mondal, C.H. Chueh, T.M. Pan, J. Appl. Phys. 115 (2014) 014501. [5] G. Khurana, P. Misra, R.S. Katiyar, J. Appl. Phys. 11 (2013) 4124508. [6] J.W. Seo, J.W. Park, K.S. Lim, J.H. Yang, S.J. Kang, Appl. Phys. Lett. 93 (2008) 223505–223507. [7] T. Zhang, X. Ou, W. Zhang, J. Yin, Y. Xia, Z. Liu, J. Phys. D: Appl. Phys 47 (2014) 065302. [8] S. Mondal, J.L. Her, K. Koyama, T.M. Pan, Nanoscale Res. Lett. 9 (2014) 3.

34


[9] M. Ismail, C.Y. Huang, D. Panda, C.J. Hung, T.L. Tsai, J.H. Jeing, C.A. Lin, U. Chand, A.M. Rana, E. Ahmed, I. Talib, M.Y. Nadeem, T.Y. Tseng, Nanoscale Res. Lett. 9 (2014) 45. [10] K.C. Liu, W.H. Tzeng, K.M. Chang, Y.C. Chan, C.C. Kuo, Microelectron. Eng. 88 (2011) 1586. [11] R. Waser, M. Aono, Nat. Mater. 6 (2007) 833–840. [12] S. Debnath, M.R. Islam, M.S.R. Khan, Bull. Mater. Sci. 4 (2007) 315–319. [13] M.Y. Li, Z.L. Wang, S.S. Fan, Q.T. Zhao, G.C. Xiong, Nucl. Instrum. Methods Phys. Res. B 135 (1998) 535–539. [14] M.F. Al-Kuhaili, S.M.A. Durrani, I.A. Bakhtiari, Appl. Surf. Sci. 255 (2008) 3033–3039. [15] V.K. Ivanov, O.S. Polezhaeva, A.E. Baranchikov, A.B. Shcherbakov, A.V. Usatenko, Russ. J. Inorg. Chem. 55 (2010) 328–332. [16] A. Younis, D. Chu, I. Mihail, S. Li, ACS Appl. Mater. Interfaces 5 (2013) 9429–9434. [17] H.D. Kim, H.M. An, S. Seo, T.G. Kim, IEEE Electron Device Lett. 32 (2011) 1125–1127. [18] M.C. Chen, T.C. Chang, S.Y. Huang, S.C. Chen, C.W. Hu, C.T. Tsai, S.Z. Sze, Electrochem. Solid-State Lett 13 (2010) H191–H193. [19] P.K. Yang, W.Y. Chang, P.Y. Teng, S.F. Jeng, S.J. Lin, P.W. Chiu, J.H. He, Proc. IEEE 101 (2013) 1732–1738. [20] M. Yang, P.J. Zhang, Z.Y. Liu, Z.L. Liao, X.Y. Pan, X.J. Liang, H.W. Zhao, D.M. Chen, Chin. Phys. B 19 (2010) 037304–037305. [21] C.Y. Liu, Y.R. Shih, S.J. Huang, Solid State Commun. 159 (2013) 13–17. [22] O.N. Mryasov, A.J. Freeman, Phys. Rev. B: Condens. Matter 64 (2001) 233111. [23] H. Kim, C.M. Gilmore, A. Piqué, J.S. Horwitz, H. Mattoussi, H. Murata, Z.H. Kafafi, D.B. Chrisey, J. Appl. Phys. 86 (1999) 6451.

[24] S. Tripathi, R. Brajpuriya, A. Sharma, A. Soni, G.S. Okram, S.M. Chaudhari, T. Shripathi, J. Nanosci. Nanotechnol. 8 (2008) 2955. [25] N.M. Park, C.J. Choi, T.Y. Seong, S.J. Park, Phys. Rev. Lett. 86 (2001) 1355. [26] A.F. Khan, M. Mehmood, A.M. Rana, T. Muhammad, Appl. Surf. Sci. (2009). [27] P.A. Calderon, M.C. Irisson, C.W. Chen, Nanoscale Res. Lett. 3 (2008) 55. [28] E.B. Gorokhov, V.A. Volodin, D.V. Marin, D.A. Orekhov, A.G. Cherkov, A.K. Gutakovskii, V.A. Shvets, A.G. Borisov, M.D. Efremov, Semiconductors 39 (2005) 1168. [29] C. Walczyk, D. Walczyk, T. Schroeder, T. Bertaud, M. Sowinska, M. Luksius, M. Fraschke, D. Wolansky, B. Tillack, E. Mirand, C. Wenger, IEEE Electron Device Lett. 58 (2011) 3124. [30] H. Yu, K. Kim, J. Lee, K.K. Kim, S.J. Choi, S. Cho, Electron. Mater. Lett. 10 (2014) 321–324. [31] J. Woo, S. Kim, W. Lee, D. lee, S. Park, G. Choi, E. Cha, H. hawang, Appl. Phys. Lett. 102 (2013) 122115. [32] C.H. Cheng, F.S. Yeh, A. Chin, Adv. Mater. 23 (2011) 902–905. [33] D. Ielmini, F. Nardi, C. Cagli, A.L. Lacaita, IEEE Electron Device Lett. 31 (2010) 353–355. [34] M.C. Wu, W.Y. Jang, C.H. Lin, T.Y. Tseng, Semicond. Sci. Technol. 27 (2012) 065010. [35] C. Chen, Y.C. Yang, F. Zeng, F. Pan, Appl. Phys. Lett. 97 (2013) 083502–083503. [36] S. Jung, J. Kong., S. Song, K. Lee, T. Lee, H. Hwang, S. Jeon, J. Electrochem. Soc. 157 (2010)H1o42-H1045 157 (2010). [37] K. Szot, W. Speier, G. Bihlmayer, R. Waser, Nat. Mater. 5 (2006) 312–320. [38] J. Woo, D. lee, G. Choi, E. Cha, S. Kim, W. Lee, S. Park, H. Yang, Microelectron. Eng. 109 (2013) 360–363.