VLSI Design Conference. Hyderabad, January 1997. Decision Diagrams in
Synthesis. - Algorithms, Applications and Extensions -. Bernd Becker. Rolf
Drechsler.
VLSI Design Conference Hyderabad, January 1997
Decision Diagrams in Synthesis - Algorithms, Applications and Extensions Bernd Becker
Rolf Drechsler
Institute of Computer Science Albert-Ludwigs-University 79110 Freiburg im Breisgau, Germany email: @informatik.uni-freiburg.de Abstract
An overview on Decision Diagrams (DDs), the stateof-the-art data structure in computer aided design of integrated circuits, is given. The overview is not complete in the sense that all DDs are considered, but we mention the most important with practical relevance. DDs are widely used and in the meantime have also been integrated in commercial tools. In the following special interest is devoted to the use of DDs in the area of synthesis. We also discuss the in uence of DDs in other elds and outline future trends.
1 Introduction
Decision Diagrams (DDs) are the most frequently used data structure for representation and manipulation of Boolean functions in in the area of computed aided design of integrated circuits. Originally, they have been introduced for testing and veri cation problems [1, 10], but in the meantime are also used for several problems in the area of logic synthesis. The most popular type of DDs are Binary Decision Diagrams (BDDs) [10]. They often allow compact function representation and ecient manipulation, i.e. synthesis operation have polynomial worst case behaviour in the size of the input BDDs. Nevertheless, it may happen that BDDs become inadequate for the problems considered, e.g. they have exponential size also for practically relevant functions like multipliers. Therefore, several extensions of BDDs have been proposed in the last few years and have also been applied in logic synthesis, like Functional Decision Diagrams (FDDs) [28, 20] and Kronecker Functional Decision Diagrams (KFDDs) [19]. For set representation Zero-suppressed Binary Decision Diagrams (ZBDDs) [30] have been introduced. In this paper we review the most important types of DDs and discuss their application in the eld of logic synthesis. We consider some successful applications of DDs in the area of 2-level and multi-level synthesis, design for testability and set representation. Based on
these applications we show current trends how \specialized" DD types can be used and in which way the needs di er from other areas. We focus on recent developments for DDs, e.g. ef cient synthesis operations and better use of memory hierarchy. Finally, we discuss extensions of DDs aiming at a more compact representation, e.g. by relaxing the ordering restriction or by representing word-level functions. These DDs have often been successfully applied in the area of veri cation. Using these DDs functions could be represented that do not have an easy bit-level description, like multipliers. The paper is structured as follows: In Section 2 we give some preliminary notations and de nitions for DDs. Some typical problems occuring in logic synthesis are discussed in Section 3. Section 4 describes several applications where DDs have been successfully used. Section 5 gives an impression on current trends in the area of DDs that help to reduce the described problems. In Section 6 extensions of DDs are discussed. Finally, the results are summarized.
2 Decision Diagrams In this section basic notations and de nitions are given that are important for the understanding of the paper. Rather than giving the mathematically exact and complete formalisms we want to cover the main points in an informal way that helps the reader to get a quick impression of the di erences between the data structures. Let : Bn ! B be a Boolean function over the variable set n = f 1 n g. All DDs are graph-based representations, where at each (non-terminal) node labeled with a variable i a decomposition of the function represented by this node into two subfunctions (the low-function and the high function) is performed. Furthermore, the underlying graph is ordered, i.e. the variables occur in the same order on all paths of the DD. f
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For DDs the following three decompositions are considered: = low(v) high(v) ( ) = low(v) high(v) ( ) = low(v) high(v) ( )
decompositions and reductions of type and . Zero-suppressed BDD (ZBDD) [30]: Apply decompositions and reductions of type and . Positive Functional Decision Diagram (pFDD) [28]: Apply decompositions and reductions of type and . Functional Decision Diagram (FDD) [20]: Apply and decompositions and reductions of type and . Kronecker FDD (KFDD) [19]: Apply , and decompositions and reductions of type , , and . ( ( ) reductions are applied to nodes of type ( and ).) In the following (if not stated otherwise) all DDs are assumed to be ordered and reduced. In this reduced and ordered form all DDs presented so far are a canonical representation.
( is the function represented at node , low(v) ( high(v) ) denotes the function represented by the low edge (high -edge) of . is the Boolean Exclusive OR operation.) The recursion stops at terminal nodes labeled with 0 or 1. Based on a precise de nition of the notion decomposition type, it can be proven for the Boolean case that the three decompositions above are the only ones of interest for DDs [5]. Decomposition types are associated to the Boolean variables 1 2 n with the help of a Decomposition Type List (DTL) := ( 1 n ) where i 2 f g, i.e. i provides the decomposition type for variable i ( = 1 ). Thus, there exists only one xed decomposition type per variable. Since small representations are a main focus when dealing with DDs, the following reductions are de ned: Type I: Delete a node whose label is identical to the label of a node and whose successors are identical to the successors of and redirect the edges pointing to to point to . Type S: Delete a node whose two outgoing edges point to the same node and connect the incoming edges of to . Type D: Delete a node whose successor () points to the terminal 0 and connect the incoming edges of the deleted node to ( ). In Figure 1, graphical representations of reductions of type and are shown. While each node in a DD is a candidate for the application of reduction type I, the di erent DD-types vary from by the decomposition types and reduction rules:
In this section we brie y describe main problems in logic synthesis. We do not focus on a speci c application, we only outline the general diculties that often occur during logic optimization: 1. Representation: Boolean functions are the basic objects that have to be represented (and manipulated). In most applications these functions directly correspond to the functional behaviour of the circuit. For sequential circuits the behaviour of the FSM has to be represented. Additionally, properties of circuits often have to be handled, e.g. by implications. For most applications \all" algorithms are ef cient, as long as the representation remains \small". 2. Manipulation: Synthesis algorithms are needed for the construction of the chosen data structure, e.g. Boolean operations, like the AND of two function representations, have to be implemented \within the data structure". In many applications specialized operators are introduced that use some problem speci c knowledge. Finally, we study the occuring problems in a more DD related context: Size: DDs in principle can represent all Boolean functions, One of the main problems when using DDs is that the size of the DD largely depends on the chosen variable ordering. Thus, there is a need for minimization algorithms. Since the problem
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3 Logic Synthesis
of nding the optimal variable ordering is NPcomplete [8] one cannot expext to determine the optimal ordering (within resonable time bounds). The exact algorithm introduced in [21] has runtime ( 2 3n ) and thus can only be applied to small problem instances. Several heuristics to determine a good variable ordering have been proposed in the past. We distinguish between two main ideas: 1. Topology based heuristics, like e.g. [29, 22, 17] 2. Dynamic variable ordering heuristics, like e.g. [23, 35, 16, 33] Dynamic variable ordering in general gives much better results, but often also has large runtimes. Operations: The typical implementation of synthesis operations is based on recursive algorithms, as proposed in [10] for BDDs. This can be formulated in a closed form by the If-Then-Else (ITE) operator [9]. For (K)FDDs the synthesis turns out to be more complicated, e.g. for some operations, like existential quanti cation, it can be proven that no polynomial algorithm exists [7]. O n
4 Applications
In this section we discuss some typical applications where DDs have successfully been used. The list is not complete in the sense that \all" applications are covered and not all applications have equal importance. But the di erent subsection outline various perspectives what should be considered when using DDs.
4.1 2-Level Minimization
The classical 2-level minimizers used an enumeration of the terms in an array structure for representing the prime implicants. Using DDs, i.e. a graph based representation, tremendously improved the performance of the algorithms. For more details [14]. 4.2 Functional Decomposition
A very promising approach for FPGA design is based on decompositions of functions as proposed in [3]. The corresponding decomposition can easily be expressed by BDDs and several researchers studied the corresponding algorithms intensively (see e.g. [38, 40]). The interesting property from the DD point of view is that a cut through the BDD has to be found that crosses a minimal number of edges. Thus, minimization algorithms for BDDs, e.g. based on sifting, are obviously not directly applicable and should be tailored to this context.
4.3 Synthesis for Testability
The construction of circuits resulting from a direct mapping of DDs has gained large interest [32]. One argument is that the mapping process can be simpli ed
due to the simple structure of the DD. Additionally, the resulting circuits have good testability properties [4, 2, 6]. In this area especially more general types than BDDs, like OKFDDs, have several advantages, since in the area of circuit design also a small reduction in the graph size may have a large in uence on the size of the resulting circuit [25]. 4.4 Set Representation
In many tasks during logic synthesis sets of elements have to be represented. In [30] ZBDDs have been introduced especially for this problem. Even though from the theoretical point of view they only di er by a linear factor from BDDs with respect to size [7] they are frequently used in applications, like 2-level minimization [14]. Also for multi-level synthesis they can be used, e.g. for factorization [31].
5 Implication for Algorithms for Decision Diagrams
Since problem speci c algorithms can not be discussed in an overview, we present some recent developments in the area of DDs with respect to representation and manipulation. Use of memory hierarchy: If large DDs are considered the graph size often extends the main memory of the computer. Thus, some parts are put to the secondary storage devices. How the paging of the computer can be optimized has been considered in a rst study in [34]. Unfortunately, this rst approach is not directly \compatible" with dynamic variable ordering. Reordering based synthesis: As an alternative to the classical recursive synthesis algorithms for DDs a synthesis method based on changing the variable ordering has been presented in [26] for BDDs. First experiments show that the approach has several advantages with respect to memory usage. Furthermore, the dynamic minimization can easily be integrated in the synthesis procedures. Whether this approach can be extended to other DDs, like FDDs and KFDDs, without loosing the positive aspects discussed above, is focus of current work. Compilation of algorithms: In [27] an idea is proposed how the synthesis operations for BDDs can be speeded up by pre-compilation. Also here the extension to other DD-types has not been studied.
6 Extensions of Decision Diagrams
Even though several \clever" methods for DD minimization have been developed (as described above) there exist functions that can not be represented ef ciently, like multipliers [11, 7]. Thus, several extensions have been proposed for DDs. In the following we present some main ideas and brie y discuss the advantages and disadvantages.
6.1 Relaxing the Ordering Restriction
One reason that some functions can not be represented eciently is due to the ordering restriction, e.g. the hidden weighted bit function has only exponential sized OBDDs [11] and OFDDs [7], but there exist free BDDs (i.e. BDDs where each variable appears only once along each path (but in di erent orders)), which represent this function in polynomial size. In [24, 39] a method has been discussed that the resulting graphs remain canonical. The main problem with \unrestricted" DDs is that the search space becomes huge and it is very dicult to identify good solutions that result in small DDs.
6.2 Different Decompositions per Variable
Up to now we only focused on DDs, where a xed DTL was chosen, i.e. to each variable one xed decomposition was associated. Obviously (at least in principle), smaller representations can be obtained by allowing di erent decompositions, as has been studied in the area of synthesis for 2-level AND/EXOR expressions, like Pseudo Kronecker Expressions [36, 15]. First multi-level synthesis results have been reported in [37]. 6.3 Word-Level Decision Diagrams
In the area of veri cation recently DDs for representing word-level functions (from the Boolean domain to the integers) have been introduced. Thus, it was for the rst time possible to represent multipliers eciently by DDs [12]. For word-level DDs (analogously to the DDs presented in Section 2) di erent decompositions can be considered, e.g. functions of the form : Bn ! Z: = (1 ? ) low(v) + high(v) = low(v) + high(v) = low(v) + (1 ? ) high(v) (Analogously to the bit-level, the notation , and is used for the rst, second and third equation, repsectively.) Analogously to OKFDDs the idea of using di erent decomposition types can also be used for wordlevel DDs [13, 18]. (Notice that for attributed edges and edge-values as they are used for Kronecker Multiplicative Binary Moment Diagrams (K*BMDs) [18] additional reduction and normalization rules have to be used.) Up to now these DD-types have mainly been used in the area of veri cation, but this was also the rst area were BDDs have intensively been studied. Currently, it is an open question whether and how word-level DDs can be used for logic synthesis. f
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7 Conclusions
In this paper we gave an overview on Decision Diagrams in the area of synthesis. We brie y reviewed
some applications and described the main problems occuring from the use of DDs. We discussed recent developments in the area of DDs and pointed out some open problems.
References
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