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Abstract: This study proposes a resonant switched capacitor voltage multiplier with a novel switching strategy. The proposed implementation provides a high ...

IET Power Electronics Research Article

Single-inductor resonant switched capacitor voltage multiplier with safe commutation

ISSN 1755-4535 Received on 4th October 2013 Accepted on 11th November 2014 doi: 10.1049/iet-pel.2014.0387 www.ietdl.org

Julio C. Rosas-Caro 1 ✉, Jonathan C. Mayo-Maldonado 2, Fernando Mancilla-David 3, Antonio Valderrabano-Gonzalez 1, Francisco Beltran Carbajal 4 1

Academia de Electrica, Electronica y Control, Universidad Panamericana Guadalajara, Calzada Circunvalacion Poniente #49 Ciudad Granja CP 45010 Zapopan, Jalisco, Mexico 2 CSPC group, Faculty of Physical and Applied Sciences, University of Southampton, SO17 1BJ, Southampton, UK 3 Department of Electrical Engineering, University of Colorado-Denver, North Classroom, RM 2522B, Campus Box 110, P.O. Box 173364, Denver, CO 80217, USA 4 Departamento de Energia, Universidad Autonoma Metropolitana, Unidad Azcapotzalco, Avenida. San Pablo No. 180, Col. Reynosa Tamaulipas, C.P. 02200, México, D.F., Mexico ✉ E-mail: [email protected]

Abstract: This study proposes a resonant switched capacitor voltage multiplier with a novel switching strategy. The proposed implementation provides a high voltage gain in comparison with other traditional approaches, this is achieved by charging every capacitor with the voltage of all previous charged capacitors. A safe commutation procedure is also presented in which switching errors are avoided regardless of variations in the resonant frequency, variations in the resonance frequency may be caused by tolerance in passive components. The converter offers the capability to drain resonant current through all switching devices using a single small inductor, the input current is continuous. A design-oriented analysis of steady-state waveforms is discussed through the study. To validate the proposed approach, experimental results are shown.

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Introduction

Switched capacitor (SC) circuits have been successfully utilised for energy conversion in low power on-chip applications [1], they have two main benefits: (i) they can operate without inductors, which represents an advantage since inductors are usually large and heavy compared with other components in the circuit; and (ii) they can achieve a very high voltage gain. However, for higher power levels, drawbacks such as the spike current waveform among capacitors make other converters such as the boost converter preferred over pure SC circuits. Renewable energy sources such as PV panels and fuel cells provide a low DC voltage, and then a high voltage-gain converter is required to link those sources to an inverter, the latter and other applications make high voltage-gain converters an important research topic [2–20]. The duty cycle of the boost converter is restricted since the current stress of the input inductor and the main switch become extreme as the duty cycle increases. Therefore the practically feasible voltage gain is not higher than four (see [2]). Several solutions have being proposed to this limitation achieving good results, but increasing the number of energy storage inductors [2–6]. This situation turns SC circuits into a compelling alternative as long as certain drawbacks can be overcome. A SC voltage multiplier (SCVM) is a special type of SC circuit in which the voltage is not regulated but multiplied by a constant number [1, 7], they exhibit high efficiency and they can be combined with inductor-based converters to achieve voltage regulation, for example a boost converter can be followed by a SC multiplier [8–13] or a voltage multiplier can be followed by a boost converter [19]. In these converters, SCVMs are used as a solid-state DC–DC transformer, whereas the inductor-based stage permits the regulation of the output voltage. This feature allows the operation of the converter with high efficiency and high voltage gains [7–19]. Fig. 1a illustrates different types of charge interchange that can be achieved with a pure SC circuit [1]; they follow an RC-type charge

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interchange process. The spike current is only limited by the parasitic resistance, which is the main drawback of these circuits. If a resonant inductor is added to the SC circuit, one very small whose size is negligible when compared with that of energy storage inductor, the charge interchange current becomes of resonant-type (sine-wave) [13–18], see Fig. 1b. Resonant SC circuits achieve the high voltage gain characteristic of pure SC switching avoiding the drawback of the spike current, leading to a new generation of high voltage gain converters feasible for high power ratings [13–18]. Furthermore they can achieve zero current soft switching with a low electromagnetic interference (EMI) noise. Nevertheless, resonant SC converters present also a drawback that is illustrated in Fig. 1b. The resonant behaviour begins when a transistor closes. The transistor should open when the current reaches zero, and then resonant frequency must be known, however inductors and capacitors have an inherent variation on their value depending on their tolerance, for example ±10%. This issue made resonant switching difficult to implement in mass-produced commercial converters. This is one of the challenges that we propose to overcome in this paper. As suggested in Fig. 1b, an imprecise switching function leads to opening the inductor when it is still draining current. This may cause an increment on power losses and EMI. In spite of this drawback, resonant switching in SCVM is still considered as a promising approach in transformer-less applications, because it yields high efficiency, and large voltage gain and power density [13–18]. This paper proposes a single-inductor resonant SCVM which features (i) a large voltage gain because of a novel switching sequence; (ii) a safe commutation procedure regardless on variations of the resonant frequency; and (iii) resonant switching in all devices with only one inductor. The paper is organised as follows. Section 2 describes the converter topology along with its novel switching strategy. Section 3 presents a design-oriented steady-state analysis of important waveforms, followed by

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Fig. 1 Schematic illustrating SC circuits according to the charge interchange a RC switching b RLC resonant switching

experimental verification in Section 4. Finally, the conclusions of Section 5 close the paper.

is smaller than the nominal voltage, this initial condition last during some switching cycles.

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2.2

Converter and switching strategies

The proposed converter is shown in Fig. 2a, which corresponds to an 8 × multiplier. Components include 10 MOSFETS, four capacitors, and one inductor. Four external fast-switching diodes are also included for the safe commutation procedure, Fig. 2b shows the switching stages of the converter and Fig. 2c shows input (current throw the input resonant inductor). For comparison purposes the 5x Fibonacci SC circuit [20] is shown in Fig. 3a, it does not contain fast-switching diodes, but the main differences are, the input resonant inductor and the new switching sequence. 2.1

Fibonacci switching sequence

It has only two switching stages shown in Fig. 3b and described as (1) Stage {1}: all pair switches are open while all odd switches are closed, c1x is charged to Vin and c3x is charged to 3 Vin by the series connection of c1x and c2x. (2) Stage {2}: all odd switches are open while all pair switches are closed, c2x is charged to 2 Vin by the series connection of c1x and the input voltage, and c5x is charged to 5 Vin by the series connection of c2x and c5x. After the switching stage {2}, the first is repeated and so on, there is evidently an initial condition in which the voltage across capacitor

Proposed switching sequence

The proposed switching sequence is divided into four switching stages; see Fig. 2b that can be described as (1) Stage {1}: the switching sequence starts by closing s1 and s3 (other switches remain open) and the capacitor c1x is charged with Vin plus the initial difference between Vin and Vc1x which may be approached to Vin in steady state, s1 and s3 open at the end of this stage. (2) Stage {2}: switches s2, s4 and s6 are closed; c1x and Vin are connected in series to charge c2x with 2 Vin; s4 and s6 open at the end of this stage but s2 remain closed. (3) Stage {3}: switches s2, s5, s7 and s9 are closed; capacitors c1x and c2x are connected in series with the input voltage Vin to charge c4x with 4 Vin; at the end of this stage s7 and s9 open, s2 and s5 keep closed. (4) Stage {4}: switches s2, s5, s8 and s10 are closed; c1x, c2x, c4x and Vin are series-connected to charge c8x with 8 Vin; all switches open at the end of this stage. The average voltage of c1x reaches Vin at steady-state. Through stage {1} c1x recovers energy lost through the previous stage {2}–{4}. After the switching stage 4, the switching sequence starts again with the switching first stage. In both switching sequence capacitors are subject to a voltage drop after being discharged, they can be selected to feature an acceptable voltage-ripple [21] which is known as the small ripple approximation.

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Fig. 2 Proposed converter a Topology b Switching stages c Input current d Possible extension of the converter

The proposed switching sequence increases the voltage gain of the circuit, from 5 to 8, and makes possible to do resonant switching in all devices with only one inductor, whereas it would take at least two inductors doing resonant switching with the traditional switching sequence, see Fig. 3.

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Moreover, additional multiplier stages may be added in any of both SC circuit [20] if desired, see Fig. 2d. As it may be observed from Fig. 2, each switching mode consists of a series inductor connected to one or more capacitors. Consequently, there exist different resonant frequencies that

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Fig. 3 5X Fibonacci SC circuit a Topology b Switching stages c Possible combination of the proposed converter with a boost converter

depend on the active mode. The resonant frequency may be expressed as fx =

vx 1 =  2p 2p LCx

(1)

where x takes the values 1–4, according to the equivalent circuit or switching stage. The resonant inductor L lumps the input inductance plus the parasitic inductance. The capacitance Cx is the equivalent capacitor which depends on the switching stage. Specifically, Cx takes the following values according to the switching stages: C1 equals c1x in stage {1}; C2 equals the series connection of c1x and c2x in stage {2}; C3 equals the series connection of c1x, c2x and c4x in stage {3}; and C4 equals the series connection of c1x, c2x, c4x and c8x in stage {4}, see Fig. 2b. The current at each switching stage tends to have a sinusoidal shape, but only half a cycle is allowed before opening the transistors. 2.3

Applications

The proposed circuit can be used in renewable energy applications, for example to boost the voltage generated by fuel cells. Fig. 3c illustrates a 4x resonant SC circuit cascaded with a traditional boost converter. A boost converter typically yields a maximum voltage gain of 4 [2], the maximum voltage gain range of the combined converter is 16. 2.4

charged to the sum of the previous two capacitors, featuring the Fibonacci sequence expressed as: fn = fn−1 + fn−2, (1, 2, 3, 5, 8, 13, 21, …) [20], the voltage in each capacitor is shown in Table 1, for both the Fibonacci and the proposed sequence, for example the circuit in Fig. 2a has four capacitors and provide 8 Vin in the last capacitor, see Table 1. The proposed switching sequence charge the c1x capacitor to Vin, the second capacitor to 2 Vin, and all capacitors after that are charged to the summation of all previous capacitors plus the input voltage, (1, 2, 4, 8, 16, 32, 64, …) which can be also expressed as 2(1 − 1), 2(2 − 1), 2(3 − 1), 2(4 − 1), 2(5 − 1), 2(6 − 1), … or 2(n − 1), being n the number of capacitors, providing a significant larger voltage gain as compared with that of its Fibonacci counterpart, see Table 1, the voltage across the nth capacitor is twice the voltage across the (n − 1)th capacitor. A proof by induction can be applied assuming that n = k, then 2(k − 1) = Vck, consequently for any consecutive capacitor with n = k + 1 it must hold that 2k = Vck+1, which is true since 2(k − 1) = (1/2)Vck+1 = Vck.

Voltage gain

From Fig. 3 and the defined switching sequences, the traditional Fibonacci sequence charge the first capacitor to Vin, the second capacitor to 2 Vin, and all capacitors after the second one, are

Table 1 Voltage gain of switching sequences No. of Cap = n 1 2 3 4 5 6 7 8 … n

Fibonacci sequence, FN

Proposed sequence

1 2 3=2+1 5=3+2 8=5+3 13 = 8 + 5 21 = 13 + 8 34 = 21 + 13 … fn−1 + fn−2

1 = 2(1 − 1) 2 = 2(2 − 1) 4 = 2(3 − 1) 8 = 2(4 − 1) 16 = 2(5 − 1) 32 = 2(6 − 1) 64 = 2(7 − 1) 128 = 2(8 − 1) … 2(n − 1)

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For instance, both the topologies in Figs. 2a and 3a have four capacitors. As a result, a Fibonacci topology has voltage gain of f4 = 5, whereas the proposed sequence has a voltage gain 2(4 − 1) = 8. Furthermore, several inductors would be needed to perform resonant switching in the Fibonacci sequence (at least two for Fig. 3a) whereas the RSCVM requires only one. It is important to mention that this circuit is design to multiply the input voltage by a constant number, as in other SCVMs [7, 14–18]. Voltage regulation can be easily achieved by combining SC circuits with inductor-based converters [8–13, 19].

2.5

Safe commutation procedure

Body diodes are not shown for MOSFETs in Fig. 2. The four diodes shown in Fig. 2a are externally connected and utilised for the safe commutation procedure. As an introduction to the safe commutation procedure, recall Fig. 1b and extend the concept to the topology proposed in this paper. Without loss of generality, consider the case when commuting from stage {1} to stage {2}. At the end of stage {1} s1 and s3 will open, with all MOSFETS in off state before closing s2, s4 and s6. If s1 and s3 open before the current reaches zero, the charge in the inductor would force the diodes installed in s3, s6, s9 and s10 to turn on, discharging its stored energy through c8x. This is the only possible path for the current during the dead-time in this case, since all MOSFETS are open. If MOSFETs may open too early or too late current would be discontinuous in some branches of the circuit leading to extra losses and EMI. A similar effect would be in place if s1 and s3 open too late. External diodes across s3, s6, s9 and s10 are installed for safe commutation because body diodes in MOSFETs are usually not suitable for high speed commutation. MOSFETS may open early or late because of the uncertainty in the resonant frequency, the resonant frequency (1) may vary because of natural tolerance in the nominal value of inductors and capacitors. Both inductance and capacitance may be around the nominal value ±10%. Extreme cases are: (i) both components are 10% higher than their nominal value, which gives a frequency 9.09% smaller than the nominal resonant frequency; (ii) both components are 10% lower than their nominal value, this would

lead to a frequency 11.11% larger than the nominal resonant frequency. The converter must be designed to handle this variation in a mass production setting. High speed feedback may be used to overcome this problem including more components. However, the safe commutation procedure proposed in this paper is seen by the authors as more convenient. The procedure is explained using Fig. 4. Again without loss of generality, consider the commutation from stage {1} to stage {2}. The resonant current iL begins to rise once s1 and s3 are closed. After t1 seconds, s1 opens. If the inductor has remaining energy, the current will flow through the external diode until it reaches zero. After t2 seconds, s3 opens. Both t1 and t2 should be calculated to yield a frequency-tolerance in which the converter can operate safely. Fig. 4 shows waveforms for a tolerance of ±16% in the frequency. Although diodes are used during the safe commutation procedure, they do not add significant power losses since they conduct only during a short period of time.

Fig. 5 Steady-state voltage and current waveforms for Fig. 4 Schematic explaining the safe commutation procedure proposed in this paper

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a Capacitor C8X b Capacitor c4x c Capacitor C2X d Capacitor c1x

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3

Steady state analysis

This is evident analysing that all the current charging c8x comes throw s10.

A steady-state analysis oriented to the design and selection of reactive components is presented in this section. The 8x RSCVM of Fig. 2a is selected as a case study. In traditional buck, boost, and buck-boost converters, the current through capacitors features a rectangular shape and the analysis of ripple may be performed using basic equations [21]. However, the current in the topology proposed in this paper is non-rectangular and therefore requires further analysis. Figures in this subsection illustrate a magnification of the voltage ripple across capacitors in order to better understand the design process. Waveforms are plotted considering all capacitors have the same capacitance for the sake simplicity.

3.2

Selection of c4x

Fig. 5b illustrates the typical voltage and current waveforms for c4x. The voltage across c4x remains constant until the beginning of switching stage {3}. During this period, c4x receives a charge ΔQ. During stage {4} it gets discharged with the same amount of charge. Again this is more evident by invoking the equilibrium of charge in capacitors. In this case both the charge and discharge processes feature a sine-like slope. The voltage ripple across c4x can be expressed using either charge, which amplitude may be expressed as DvC4X =

3.1

Selection of c8x

Fig. 5a illustrates the voltage and current for c8x during two switching cycles, see also Fig. 2. The capacitor is discharged with the output current during all the switching period while it is charged during the fourth stage. The voltage in c8x decreases with a constant slope equal to –iout/c8X during the discharge process. As suggested in Fig. 5a, during the charging time the voltage features a sine-like waveform. The voltage ripple across c8X can be expressed using the discharge time as DvC8X =

iout c8X



1 1 − fS 2f4



8Vin RfS

(4)

The charge Δq4 may be computed from (3) and the selection of c4x readily follows. 3.3

Selection of c2x

Fig. 5c shows typical voltage and current waveforms for c2x. Similarly to c4x, c2x gets charged during stage {2}. During this stage it receives a charge 2ΔQ and discharges through stages {3} and {4} by ΔQ, respectively. Hence the voltage ripple across c3x may be computed as in (5) and the sizing of c2x immediately follows

(2) DvC2X =

where fS is the switching frequency and f4 is the resonant for stage {4} as defined in (1). From (2) the value of c8x is readily computed for a given admissible ripple. A more interesting fact is that invoking the equilibrium of charge principle in capacitors we may define the charge interchanged ΔQ as DQ = iout TS =

DQ c4X

(3)

3.4

2DQ c2X

(5)

Selection of c1x

Fig. 5d illustrates typical voltage and current waveforms for c1x. The voltage across c1x increases during switching stage {1} because of a charge 4ΔQ, during the remaining stages c1x discharges by 2ΔQ (stage {2}), and by ΔQ (during stages {3} and {4}, the voltage ripple across c1x can be expressed by (6), and the

Fig. 6 Current waveform a With different possibilities for the resonant current waveform of the same ‘area under the curve’ b Two switching periods

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sizing of c1x follows as (6) DvC1X =

3.5

4DQ c1X

(6)

Selection of L and rms current calculation

The inductance selection is important in applications where the resonant frequency should be controlled, for example, in high power converters where the switching frequency needs to be reduced, once capacitors and the switching frequency have being selected, the resonant frequency of the multiplier stage may be selected to fill the full time of each switching stage or it may be shorter, see Fig. 6a, but this is not recommended since the losses in capacitors and MOSFETs are proportional to the RMS current, Fig. 6a shows different current waveforms with the same charge interchange (same area under the curve). The RMS value of a periodic current equal to several segments can be calculated as  n  Dk u k rms = k=1

(7)

See Appendix 2 of [21], where Dk is the duty cycle of the signal and uk is the rms current of each segment, in the particular case where the segments are half-sine waveforms, their uk is expressed as the square of the peak value over two. The rms current must be calculated to quantify the power losses in capacitors and mosfets, for example in Fig. 6a the number besides the half-sine represents the square rms value normalised to the lower curve, which is proportional to the losses in capacitors and mosfets, since they have the same area under the curve, selecting a resonant frequency which represents half of the period produces twice of losses in mosfets and capacitors, for the same output power. The RMS value of the waveform shown in Fig. 6b can be calculated as rms =

 t t t t i21pk 1 + i22pk 2 + i23pk 3 + i24pk 4 TS TS TS TS

(8)

And this procedure can be used to compute the rms current in all capacitors, for example, from Fig. 5d, the rms current in capacitor c1x is equal to  i21pk i22pk i23pk i24pk rms = + + + 2f1 TS 2f2 TS 2f3 TS 2f4 TS

(9)

Fig. 7 Experimental prototype a Circuit photo b Transistors gate signals c Important waveforms d Efficiency and real voltage gain

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Table 2 Commercial Components utilised in the prototype Component

From Fig. 5a, the rms current in capacitor c8x is equal to  i24pk rms = + i2out 2f4 TS

Part number

MOSFETS s1, s2, s3 MOSFETS s4, s5, s6 MOSFETS s7, s8, s9 MOSFET s10 Diode 1 Diode 2 Diodes 3, 4 Capacitors c1x, c2x, c4x, c8x Inductor L

PSMN1R5-40PS PSMN3R3-80PS IPx072,75N15N3 G IPP200N25N3 G STPS20M60D MBR10100-E3/4 W MBR40250G B32674D4335 K FP0805R1-R20-R

The rms current through mosfets may be computed with the same procedure by observing Figs. 2 and 5. 3.6

Where resonant frequencies can be calculated from (1) and the peak amplitude can be computed from (3). From Fig. 5c, the rms current in capacitor c2x is equal to  i22pk i23pk i24pk + + rms = 2f2 TS 2f3 TS 2f4 TS

(10)

From Fig. 5b, the rms current in capacitor c4x is equal to  i23pk i24pk + rms = 2f3 TS 2f4 TS

(11)

(12)

Comments and discussion about the inductance

In small power on-chip converters, inductors are undesired and then pure SC circuits are more attractive. As mentioned in the introduction, as power level increases the current spike among capacitors need to be limited in SC circuits and then resonant switching become attractive, in some applications a small resonant inductor is added [13, 15, 16], in some others, the use of film capacitors allows the inherent parasitic inductance present in the circuit to produce the resonant behaviour [17, 18], the nano-henries parasitic inductance is capable to produce a resonant frequency of several hundred kilohertz. As the power level increases, applications may need a lower switching frequency in the order of several tens of kilohertz. In this case, external inductors are relatively inexpensive and can be used for resonant switching. It is noteworthy that resonant inductors do not represent a problem in terms of size and cost, as they are much smaller and cheaper than their energy storage counterparts [13, 15, 16].

Fig. 8 Experimental waveforms gate voltages and inductor current during a Stage {1} b Stage {2} c Stage {3} d stage {4}

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Fig. 9 Inductor current and zoom in the capacitors voltage ripples (ac component), consistent with the theoretical waveforms shown in Fig. 5 for capacitors a C8x b C4x c C2x d C1x

3.7

Voltage rating of transistors

Once the rms current of each transistor can be determined, from Fig. 2, the voltage each transistors block can be observed when they are open, the first three switches block Vin, next three switches block 2 Vin, and so forth, more multiplication stages can be added to the circuit, and they will block the voltage of its respective capacitor, finally the last switch will block a half of the output voltage.

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Experimental results

The RSCVM topology proposed herein was simulated in the Synopsys Saber simulation platform. Results yielded waveforms as predicted by the theory, and as a result a laboratory prototype constructed. For the sake of brevity, the simulated results are omitted and the focus herein is on experimental waveforms. Fig. 7a illustrates a photograph of the circuit which is the schematic in Fig. 2a, followed by the switching function of all transistors in Fig. 7b. The same switching sequence was utilised in the laboratory to drive the prototype. Table 2 summarises the commercial components utilised, since transistors block different amount of voltage, they were selected according to their voltage rating. The input voltage is 20 V, the output voltage is 160 V and the switching frequency was selected at 45 kHz. All capacitors are of film type with 3.3 μF capacitance. The external inductor features a ferrite core with 200 nF inductance, the inductor is placed under

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the PCB, but another (non-connected) inductor is placed over the PCB in Fig. 7a to compare the size. A TI microcontroller is utilised to generate the firing signals for MOSFETs with an Avago gate driver, model HCPL3120. Fig. 7c shows the inductor current and the gate signals of s1, s2 and s3. The inductor current has the expected wafeforms shown in Fig. 2f, and it is also consistent with the theoretical considerations of Section 2 in Fig. 5. Those half-sine waveforms can be used to calculate the RMS current in all components, as explained in Section 2.5. The inductor current is composed of sine-like half-cycles, and never becomes negative which indicates the switching functions are correct. Fig. 7d shows the efficiency curve against output power along with the ‘real/target’ voltage gain, in this case the output voltage divided by 8 times the input voltage (160 V in this case). The converter’s efficiency was experimentally measured and yielded values between 90 and 93% within the full range of operation, this result is pretty consistent with the prediction of [22] made for pure SC circuits, in which the efficiency is approximately the ratio of the real voltage gain over the target voltage gain. Fig. 8 shows the resonant switching process, Fig. 8a shows a zoom in the time when the converter is operating in the switching stage {1} (see Fig. 2b), the charge interchange (area under curve) is 4ΔQ, and it can be seen that the switch s1 opens before the current reaches zero, and the switch s3 opens after the current reaches zero, hence after the transistor s1 opens, the current is drained by the fast switching diode places over s1, see Fig. 2a. After that, the converter passes from the switching stage {1} to the switching stage {2} (Fig. 2b).

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The inductor current in Fig. 7c is basically divided in four periods and they are shown in Figs. 8a–d along with their respecting firing signals. Fig. 9 illustrates the inductor current among with the capacitors voltage ripple, basically Fig. 9a is the experimental equivalent to Fig. 5a which was based on simulation and analysis, Fig. 9b is the experimental equivalent to Figs. 5b, 9c and d are the experimental equivalent to Figs. 5c and d, respectively, they were collected with the oscilloscope probe in AC coupling. They are consistent with the analysis in Section 3, It is noteworthy that in the prototyped film capacitors − usually utilised in snubber circuits − rated at 300 V were used in the realisation. This oversizing is not necessary. Indeed, it is expected that the use of SC converters in low power applications will increase the need of lower-voltage film capacitors and they will be introduced to the market, this will reduce the volume of converters.

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Conclusions

This paper has proposed a single-inductor RSCVM with a novel switching strategy. Key advantages of the proposed topology are a high-voltage gain, resonant switching in all devices with a single inductor and a safe commutation process. There are applications in which the parasitic inductance is used to achieve resonant switching. However, in some cases it is convenient to add external inductance in order to reduce the resonant frequency. Therefore having resonant switching in all switching devices with only one inductor is highly desirable. It is also shown the converter achieves safe commutation regardless of variations on the resonant frequency because of a novel switching strategy, which is of significant importance for mass production. An experimental prototype was designed to validate the approach, obtaining a good agreement between theoretical analysis.

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Acknowledgment

This paper was supported by Universidad Panamericana Campus Guadalajara’ under project UP-CI-2014-FING-02, Dr. Julio Cesar Rosas-Caro.

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References

1 Ben-Yaakov, S.: ‘Behavioral average modeling and equivalent circuit simulation of switched capacitors converters’, IEEE Trans Power Electron., 2013, 27, (2), pp. 632–636 2 Choi, S., Agelidis, V.G., Yang, J., Coutellier, D., Marabeas, P.: ‘Analysis, design and experimental results of a floating-output interleaved-input boost-derived

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