JOURNAL OF APPLIED PHYSICS 108, 074501 共2010兲
Structural and electrical characteristics of high-k Tb2O3 and Tb2TiO5 charge trapping layers for nonvolatile memory applications Tung-Ming Pan,a兲 Fa-Hsyang Chen, and Ji-Shing Jung Department of Electronics Engineering, Chang Gung University, Taoyuan, 333 Taiwan, Republic of China
共Received 11 May 2010; accepted 16 August 2010; published online 4 October 2010兲 In this study, we investigated the structural properties and electrical characteristics of metal/oxide/high-k material/oxide/silicon 共MOHOS兲-type memory devices incorporating Tb2O3 and Tb2TiO5 films as charge storage layers for nonvolatile memory applications. X-ray diffraction and x-ray photoelectron spectroscopy revealed the structural and chemical features of these films after they had been subjected to annealing at various temperatures. From capacitance-voltage measurements, we found that the MOHOS-type memory devices incorporating the Tb2TiO5 film and that had been annealed at 800 ° C exhibited a larger flatband voltage shift of 2.94 V 共Vg = 9 V for 0.1 s兲 and lower charge loss of 8.5% 共at room temperature兲, relative to those of the systems that had been subjected to other annealing conditions. This result suggests that Tb2TiO5 films featuring a thinner silicate layer and a higher dielectric constant provide a higher probability for trapping of the charge carrier and deeper electron trapping levels. © 2010 American Institute of Physics. 关doi:10.1063/1.3490179兴 I. INTRODUCTION
The downscaling of NAND 共one of the two basic logic gates兲-type flash memory devices has been pursued aggressively in recent years,1 with their low power consumption, low cost, and high memory capacity finding applications in many consumer products. Nevertheless, the state-of-the-art floating-gate NAND flash memory is faced with a critical scaling challenge beyond the 45 nm technology node, due to the coupling problem of the interfloating gate.2 Because the floating gate is immune to coupling interference, polysilicon/ oxide/nitride/oxide/silicon 共SONOS兲-type memory has been explored as a potential alternative, although it too faces the scaling issue because of the nonscalability of the gate dielectric stack. A thin tunnel oxide 共approximately 2 nm兲, which is preferred for Fowler–Nordheim tunneling, does not prohibit direct tunneling of stored carriers, leading to retention problems in such devices.3 Additionally, a SONOS device featuring a thick tunnel oxide 共approximately 5 nm兲 undergoes slow programming and erasing 共P/E兲, with particularly slow erasing speeds. To tackle these problems, high dielectric constant 共high-k兲 dielectric materials, such as Al2O3,4 ZrO2,5 HfO2,6 and Y2O3,7 are being studied extensively for use as charge trapping layers in metal/oxide/high-k material/ oxide/silicon 共MOHOS兲-type structures for high-speed flash memory applications. Such MOHOS-type structures might, therefore, improve P/E efficiencies while maintaining sufficient charge retention. Recently, rare-earth oxide materials have been considered for potential use as high-k charge trapping layers because of their high dielectric constants, wide band gaps, high conduction band offsets, and thermodynamic stability when contacting Si substrates.8,9 For example, Kitai10 demonstrated that terbium oxide 共Tb4O7兲 possesses desirable propa兲
Electronic mail:
[email protected]. Tel.: 886-3-211-8800 Ext.: 3349. FAX: 886-3-211-8507.
0021-8979/2010/108共7兲/074501/5/$30.00
erties for use in flash memory devices, including a high dielectric constant and a low leakage current. Exposure to air, however, causes hygroscopic lanthanide oxides to react with moisture to form hydroxides,11 resulting in lower values of k. The incorporation of TiO2 films into lanthanide oxides increases their stability toward moisture.12 van Dover13 reported that the addition of TiO2 or Ti to lanthanide oxide dielectrics can also lead to excellent electrical properties: high dielectric constants, large breakdown voltages, and low leakage currents. In this present study, we compared the effects of Tb2O3 and Tb2TiO5 films as charge storage layers in MOHOS-type flash memory devices. We used x-ray diffraction 共XRD兲 and x-ray photoelectron spectroscopy 共XPS兲 to characterize the film structures and compositions, respectively, of the Tb2O3 and Tb2TiO5 dielectrics after annealing at various temperatures. Furthermore, we investigated the electrical characteristics of the high-k Tb2O3 and Tb2TiO5 MOHOS-type memory devices. II. EXPERIMENTAL
MOHOS devices were fabricated using 5 – 10 ⍀ cm 共100兲 p-type Si wafers. Wafers were cleaned using a standard Radio Corporation of America 共RCA兲 process and then they were dipped in dilute hydrofluoric acid 共HF兲 for 30 s to remove the native oxide from the surface. After RCA cleaning, a thin 共approximately 3 nm兲 SiO2 film was thermally grown through O2 dry oxidation in a furnace at 950 ° C. An 8 nm Tb2O3 film was deposited on the SiO2 through reactive sputtering from a Tb target in diluted O2, while a approximately 8 nm Tb2TiO5 film was deposited through cosputtering from a Tb and Ti target in diluted O2. Samples were subjected to rapid thermal annealing 共RTA兲 in an O2 ambient for 30 s at temperatures ranging from 700 to 900 ° C to form Tb2O3 and Tb2TiO5 structures. A 15-nm-thick blocking oxide was deposited on the Tb2O3 and Tb2TiO5 through plasma-enhanced chemical vapor deposition using tetraethoxysilane 共TEOS兲 as
108, 074501-1
© 2010 American Institute of Physics
074501-2
Pan, Chen, and Jung
J. Appl. Phys. 108, 074501 共2010兲
FIG. 1. 共Color online兲 XRD patterns of 共a兲 Tb2O3 and 共b兲 Tb2TiO5 films annealed at various temperatures.
the precursor at a substrate temperature of 300 ° C. Prior to deposition of 4000 Å Al film as the gate electrode, the TEOS oxide was densified through annealing at 700 ° C in a N2 ambient for 30 s to repair the number of defects. The area of the MOHOS device was defined through wet etching. Finally, a 4000-Å-thick Al film was deposited on the backside contact of the Si wafer. The film structure and composition of the Tb2O3 and Tb2TiO5 films were examined using XRD and XPS, respectively. XRD analyses were performed using the grazing incidence of Cu K␣ 共 = 1.542 Å兲 radiation. The bonding structures of the films were analyzed using a monochromatic Al K␣ 共1486.7 eV兲 source. High frequency capacitancevoltage 共C-V兲 measurements were recorded at 0.1 MHz using an Agilent 4285A LCR meter. The dielectric constants of the films 共before and after RTA treatment兲 were determined from the capacitances measured in the accumulation regions of the C-V curves. III. RESULTS AND DISCUSSION A. Structural properties
We used XRD to investigate the crystalline structures of the Tb2O3 and Tb2TiO5 films before and after RTA at various temperatures. For the as-deposited film 共without, W/O兲, no diffraction peaks were visible 共Fig. 1兲; thus, the film was
amorphous. The crystal structures of Tb2O3 and Tb2TiO5 are body-centered cubic and hexagonal, respectively. We followed the temperature-induced crystallization of these films through XRD analysis. After annealing at 700 ° C, the Tb2O3 共541兲 diffraction peak appeared for the Tb2O3 sample. In addition, relatively weak 共400兲, 共440兲, and 共611兲 diffraction peaks were present, but at lower intensity than that of the 共541兲 peak. Moreover, the Tb2O3 共400兲 peak became stronger than the 共541兲 peak in the spectrum of the sample annealed at 800 ° C. The intensity of the 共400兲 peak of the film annealed at 900 ° C was smaller than that of the film annealed at 800 ° C, suggesting the formation of a silicate layer. For the Tb2TiO5 film, the 共004兲 peak became more intense after annealing at 800 ° C, as indicated in Fig. 1共b兲. The intensity of the Tb2TiO5 共004兲 diffraction peak for the film annealed at 900 ° C was smaller than that of the film annealed at 800 ° C, presumably because of the formation of a silicate layer at the Tb2TiO5-oxide interface. Figure 2 presents the Tb 4d and O 1s XPS spectra of the Tb2O3 films before and after RTA treatment. The Tb 4d peak of the Tb2O3 reference appeared at 149.1 eV.14 A shift in the Tb 4d peak position toward higher binding energy, from 149.3 to 149.8 eV, occurred upon increasing the annealing temperature from 800 to 900 ° C 关Fig. 2共a兲兴, indicating the formation of a thicker Tb silicate layer.8 Figure 2共b兲 presents the O 1s spectra for the as-deposited and annealed
FIG. 2. 共Color online兲 XPS spectra displaying the 共a兲 Tb 4d and 共b兲 O 1s energy levels in Tb2O3 films annealed at various temperatures.
074501-3
Pan, Chen, and Jung
J. Appl. Phys. 108, 074501 共2010兲
FIG. 3. 共Color online兲 XPS spectra displaying the 共a兲 Tb 4d, 共b兲 Ti 2p, and 共c兲 O 1s energy levels in Tb2TiO5 films annealed at various temperatures.
films with appropriate peak curve-fitting lines. In the three sets of spectra, each fitting peak is assumed to follow the general shape of the Lorentzian–Gaussian function: one peak represents the Tb–O bonds 共located at 529.3 eV兲, the second the Tb–O–Si bonds 共located at 531.8 eV兲, and the third the Si–O bonds 共located at 533 eV兲.14 The O 1s peak of the as-deposited film features three components: a weakintensity peak corresponding to amorphous silica and two strong-intensity peaks assigned to poorly crystallized Tb2O3 and Tb-silicate, respectively. Furthermore, the O 1s peak intensities provided by Tb2O3 and Tb-silicate remained rather constant for annealing temperatures up to 800 ° C, but suddenly decreased and increased, respectively, after annealing at 900 ° C. This phenomenon is consistent with the reaction of O and Si atoms with Tb atoms, forming a thicker Tbsilicate layer. Figure 3 presents the Tb 4d, Ti 2p, and O 1s XPS spectra of the Tb2TiO5 films annealed at various temperatures. The chemical shift in the Tb 4d peak to higher binding energy 关Fig. 3共a兲兴 reveals a difference in Tb–O bonding between Tb2O3 and Tb2TiO5. We assign the Tb 4d peak at 151.2 eV to the Tb atoms in Tb2TiO5. The position of the Tb 4d peak of the sample annealed at 700 ° C shifted to a higher binding energy by approximately 1 eV compared with that of the Tb2O3 sample, suggesting a lower degree of reaction between the Tb and Si atoms leading to less of a Tb silicate layer. After RTA at 800 ° C, the Tb 4d peak appears at 151.2 eV, revealing the presence of Tb2TiO5 bonds in the film. The Ti 2p double peaks 共Ti 2p1/2 and Ti 2p3/2 at 465.4 eV and 459.6 eV, respectively兲 were shifted 关Fig. 3共b兲兴 to higher binding energies relative to those of the TiO2 reference 共464.3 eV and 458.7 eV, respectively兲,15 presumably because of the presence of Ti atoms in the Tb2TiO5 compound structure. We observed no evidence for Ti–Si bonds from silicides in the Ti 2p spectra. The O 1s spectra in Fig. 3共c兲 can be deconvoluted to three chemical states: the low binding energy state at 529.3 eV can be related to O atoms in Tb2O3, the median binding energy state at 531 eV to O atoms in Tb2TiO5, and the high binding energy state at 532.4 eV to
O atoms in the nonstoichiometric Tb silicate. In comparison with the XPS spectrum of the Tb2O3 film annealed at 800 ° C, the O 1s signal corresponding to silicate was smaller in the spectrum of the Tb2TiO5 film, suggesting that incorporation of Ti atoms in the Tb2O3 film suppressed the formation of a silicate layer at the Tb2TiO5-oxide interface. The intensity of the O 1s peak corresponding to Tb2O3 decreased upon increasing the RTA temperature, whereas that corresponding to Tb2TiO5 increased upon increasing the RTA temperature, but suddenly decreased at 900 ° C. Moreover, the area and intensity of the O 1s peak at 532.4 eV corresponding to silicate increased after increasing the annealing temperature, consistent with the formation of a thicker silicate layer at the Tb2TiO5 oxide interface. B. Electrical characteristics
Figure 4 displays normalized C-V curves of the Tb2O3 and Tb2TiO5 MOHOS-type memory devices that had been subjected to annealing at various temperatures and prepared under a gate voltage of 9 V for 0.1 s. The dielectric constants of the Tb2O3 films before and after RTA at 700 ° C, 800 ° C, and 900 ° C were 9, 10.5, 11.7, and 9.5, respectively; those of the corresponding Tb2TiO5 films were 12, 17.1, 24.3, and 15.9, respectively. When the memory device was programmed, the electrons tunneled directly from the Si substrate to the conduction band of the storage Tb2O3 and
FIG. 4. 共Color online兲 C-V plots of 共a兲 Tb2O3 and 共b兲 Tb2TiO5 MOHOStype memory devices that had been annealed at various temperatures.
074501-4
J. Appl. Phys. 108, 074501 共2010兲
Pan, Chen, and Jung
FIG. 5. 共Color online兲 ⌬VFB curves plotted as a function of the programming time for 共a兲 Tb2O3 and 共b兲 Tb2TiO5 MOHOS-type memory devices that had been annealed at various temperatures.
Tb2TiO5 layer. The MOHOS-type devices incorporating high-k Tb2TiO5 charge-trapping layers exhibited larger memory windows than did those containing Tb2O3 chargetrapping layers. This result presumably arose from the high charge-trapping efficiency of the Tb2TiO5 layer, due to the Ti-incorporated Tb2O3 film possessing a high dielectric constant, and the formation of a thin low-k interfacial layer, which increased the effective electric field across the tunneling oxide, thereby enhancing electron trapping in the film. In addition, the increased barrier height between the Tb2TiO5 and oxide layers reduced the probability of back-tunneling, also helping to promote the charge-trapping efficiency of the Tb2TiO5 layer.16 The Tb2TiO5 MOHOS-type device annealed at 800 ° C exhibited a memory window of 2.94 V, larger than those of the devises prepared at other RTA temperatures 关Fig. 4共b兲兴, presumably because of its largerdielectric-constant, well-crystallized Tb2TiO5 structure resulted in a higher charge-trapping efficiency. Moreover, the high-k Tb2TiO5 charge-trapping memory device that had been prepared through RTA at 900 ° C exhibited a smaller flatband voltage shift in its C-V curves relative to those of the devices prepared using other RTA temperatures. We attribute the formation of such a small memory window to the presence of a low-k interfacial layer at the Tb2TiO5-oxide interface, reducing the effective electric field for electron tunneling. Figure 5 presents the values of ⌬VFB the change in flatband voltage of a device between its virginal and programmed states of the Tb2O3 and Tb2TiO5 MOHOS-type devices annealed at various temperatures with respect to the programming time under a gate voltage of 9 V. The shifts in flatband voltage were due to electron trapping in the Tb2O3 and Tb2TiO5 layers. The MOHOS-type memory devices incorporating high-k Tb2TiO5 charge-trapping layers exhibited higher values of ⌬VFB relative to those of the devices incorporating Tb2O3 charge-trapping layers. The Tb2TiO5 chargetrapping layers in the MOHOS memory devices captured a high density of injected electrons from the Si channel and exhibited a large storage capability, resulting in the large flatband voltage shifts. In contrast, we attribute the small flatband voltage shifts of the low-dielectric-constant Tb2O3 films to their decreased charge-trapping efficiency caused by decreasing tunneling efficiency. At a value of Vg of 9 V at 0.1 s, the Tb2O3 film annealed at 800 ° C exhibited a larger value of ⌬VFB relative to those of the films annealed at other temperatures, suggesting that a higher dielectric constant increased the electron tunneling efficiency. Furthermore, the
Tb2TiO5 sample that had been annealed at 800 ° C featured a larger memory window 共2.94 V兲 than those of the samples annealed at other temperatures 关Fig. 5共b兲兴, suggesting that its charge-trapping layer possessed a higher trap density because of its higher dielectric constant and because the wellcrystallized Tb2TiO5 structure enhanced the effective electric field for electron tunneling. The value of ⌬VFB is proportional to the spatial trapped charge density NT共cm−3兲:17 ⌬VFB =
冉
冊
qNTXT OBXT XOB + , OB 2T
共1兲
where XT is the thickness of the trapping layer 共Tb2O3 or Tb2TiO5兲, XOB is the thickness of the blocking oxide 共SiO2兲, and T and OB are the dielectric constants of the trapping layer and blocking oxide, respectively. For programming conditions in which Vg is equal to 9 V at 0.1 s, Eq. 共1兲 provided values of NT for the Tb2O3 MOHOS-type devices before and after RTA at 700 ° C, 800 ° C, and 900 ° C of 7.26⫻ 1017 cm−3, 1.26⫻ 1018 cm−3, 2.33⫻ 1018 cm−3, and 4.56⫻ 1017 cm−3, respectively; the corresponding values for the Tb2TiO5 MOHOS-type devices were 2.26⫻ 1018 cm−3, 3.86⫻ 1018 cm−3, 5.06⫻ 1018 cm−3, and 2.91⫻ 1018 cm−3, respectively. Thus, a greater number of physical trapping sites were available for the Tb2TiO5 MOHOS-type memory device structure that had been annealed at 800 ° C. Figure 6 displays the retention characteristics, measured at room temperature, of the Tb2O3 and Tb2TiO5 MOHOStype memory devices that had been annealed at various temperatures. The retention measurements were made after subjecting the devices to the programmed conditions. The MOHOS-type memory devices incorporating the Tb2TiO5 charge-trapping layers exhibited longer retention times than did those featuring the Tb2O3 charge-trapping layers, presumably because the presence of Ti atoms in the Tb2O3 film changed the bandgap energy8,18 and, hence, created more accessible charge-trapping levels for the electrons injected from the substrate. The electrons that became trapped in shallow levels could be transferred readily to adjacent deeper levels through lateral hopping.16 In contrast, the high charge losses in the Tb2O3 films arose due to shallow trap levels.8 The Tb2O3 MOHOS-type memory device that had been annealed at 900 ° C displayed a worst retention time in comparison with those of the devices annealed at other temperatures, consistent with the formation of a thick silicate layer at the Tb2O3 – SiO2 interface. A large number of electrons will leak from the shallow trap sites of the silicate layer,19 pre-
074501-5
J. Appl. Phys. 108, 074501 共2010兲
Pan, Chen, and Jung
FIG. 6. 共Color online兲 Retention curves plotted as a function of the waiting time for 共a兲 Tb2O3 and 共b兲 Tb2TiO5 MOHOS-type devices that had been annealed at various temperatures.
sumably due to trap-assisted tunneling. For the programmed state at room temperature, we observed a approximately 8.5% charge loss after 104 s for the high-k Tb2TiO5 MOHOS-type memory device that had been subjected to RTA at 800 ° C 关Fig. 6共b兲兴. We suspect that this superior degree of charge retention arose from sufficiently deep trapping energy levels. IV. CONCLUSION
We have prepared MOHOS-type memory devices featuring Tb2O3 and Tb2TiO5 films as charge trapping layers, deposited on the tunneling oxide through reactive sputtering. The Tb2TiO5 MOHOS-type memory device after annealing at 800 ° C possessed a thin silicate layer and a high dielectric constant; it exhibited a large VFB shift 共2.94 V兲 and a low charge loss 共8.5%兲 at room temperature, presumably due to the higher charge-trapping efficiency and the deeper electron trap levels of the Tb2TiO5 film. This film appears to be a very promising charge trapping layer for use in high-density nonvolatile memory applications. ACKNOWLEDGMENT
This project was supported by the National Science Council 共NSC兲 of China under Contract No. NSC-98-2221E-182-056-MY3. 1
Y. Shin, J. Choi, C. Kang, C. Lee, K. T. Park, J. S. Lee, J. Sel, V. Kim, B. Choi, J. Sim, D. Kim, H. J. Cho, and K. Kim, Tech. Dig. - Int. Electron Devices Meet. 2005, 327. 2 J. D. Lee, S. H. Hur, and J. D. Choi, IEEE Electron Device Lett. 23, 264
共2002兲. M. H. White, D. A. Adams, and J. Bu, IEEE Circuits Devices Mag. 16, 22 共2000兲. 4 T. Sugizaki, M. Kobayashi, M. Ishidao, H. Minakata, M. Yamaguchi, Y. Tamura, Y. Sugiyama, T. Nakanishi, and H. Tanaka, Dig. Tech. Pap. Symp. VLSI Technol. 2003, 27. 5 T. H. Hsu, H. C. You, F. H. Ko, and T. F. Lei, J. Electrochem. Soc. 153, G934 共2006兲. 6 H. C. You, T. H. Hsu, F. H. Ko, J. W. Huang, W. L. Yang, and T. F. Lei, IEEE Electron Device Lett. 27, 653 共2006兲. 7 T. M. Pan and W. W. Yeh, IEEE Trans. Electron Devices 55, 2354 共2008兲. 8 M. Fanciulli and G. Scarel, Rare Earth Oxide Thin Film: Growth, Characterization, and Applications 共Springer, Berlin, 2007兲. 9 H. Iwai, S. Ohmi, S. Akama, C. Ohshima, A. Kikuchi, I. Kashiwagi, J. Taguchi, H. Yamamoto, J. Tonotani, Y. Kim, I. Ueda, A. Kuriyama, and Y. Yoshihara, Tech. Dig. - Int. Electron Devices Meet. 2002, 625. 10 S. Kitai, O. Maida, T. Kanashima, and M. Okuyama, Jpn. J. Appl. Phys., Part 1 42, 247 共2003兲. 11 S. Jeon and H. Hwang, J. Appl. Phys. 93, 6393 共2003兲. 12 A. U. Mane, Ch. Wenger, T. Schroeder, P. Zaumseil, G. Lippert, G. Weidner, and H. J. Mussig, J. Electrochem. Soc. 152, C399 共2005兲. 13 R. B. van Dover, Appl. Phys. Lett. 74, 3041 共1999兲. 14 J. F. Moulder, W. F. Stickle, P. E. Sobol, and K. D. Bomben, Handbook of X-Ray Photoelectron Spectroscopy: A Reference Book of Standard Spectra for Identification and Interpretation of XPS Data 共Physical Electronics, Chanhassen, MN, 1995兲. 15 T. Schroeder, G. Lupina, J. Dabrowski, A. Mane, Ch. Wenger, G. Lippert, and H. J. Mussig, Appl. Phys. Lett. 87, 022902 共2005兲. 16 T. S. Chen, K. H. Wu, H. Chung, and C. H. Kao, IEEE Electron Device Lett. 25, 205 共2004兲. 17 T. H. Kim, I. H. Park, J. D. Lee, H. C. Shin, and B. G. Park, Appl. Phys. Lett. 89, 063508 共2006兲. 18 S. Maikap, T. Y. Wang, P. J. Tzeng, C. H. Lin, T. C. Tien, L. S. Lee, J. R. Yang, and M. J. Tsai, Appl. Phys. Lett. 90, 262901 共2007兲. 19 Defects in High-k Gate Dielectric Stacks, edited by E. Gusev 共Springer, New York, 2006兲. 3
