Study of Voltage Source Converter-Based HVDC ...

Study of Voltage Source Converter-Based HVDC System During DC Side Faults H. Khader, student member, IEEE, A. Massoud, senior member, IEEE, A. Gastli, senior member, IEEE Abstract— Recently voltage source converter-based HVDC technology has witnessed a remarkable development due to the several advantages it exhibits over the conventional HVDC systems. However, one of the main remaining challenges is the behavior of the system under DC side faults where the VSC protection is a priority. In this paper, the effect of changing the inductance in the AC side and the capacitance in the DC side of the voltage source converter on the converter DC current during fault is investigated. A 500MW/400kV HVDC system is simulated using Matlab/Simulink. Results showed that both capacitance and inductance values have a significant effect on the intensity and timing of the DC current flowing from the AC side to the DC side through the converter freewheeling diodes. Increasing the capacitance increases the blocking time of this current while high inductances decrease its amplitude. However, it is not possible to increase indefinitely the values of the capacitance and inductance where an appropriate compromise must be attained during the design of the system. Index Terms— Voltage source converter, High voltage DC transmission, DC side faults.

I. INTRODUCTION

D

C technology has been developed and increased rapidly in its utilization due to its efficiency in transmission and distribution in term of losses over long distances compared to AC transmission systems. Moreover, it does not have stable operation and synchronous problems [1,2].Voltage Source Converter (VSC)-based High Voltage Direct Current (HVDC) transmission system has several advantages over the conventional HVDC system such that a passive load or dead grid can be energized, the active and reactive power can be controlled independently, and the voltage polarity of the DC side is always the same where the power flow direction can be reversed without changing the DC side polarity; which is an important feature in multi-terminal HVDC systems [2-10]. Multi-terminal HVDC consists of three or more VSC-HVDC systems. VSC-HVDC systems are either connected through underground cable or back-to-back converters [5]. In a VSC-HVDC system, there are three control modes [9]: a) Constant AC voltage control. b) Constant DC voltage control. c) Constant DC current or active power. Mode a) is usually used when the VSC-HVDC system feeds power to a passive network. In mode b) and c), the VSC can also control the reactive power sent to the AC system. Mode a) is suitable for connecting a passive AC network while mode

b) and c) are adopted for connecting an active one [9]. In this paper the constant DC current control will be used since the network supplied is active. DC side fault in a VSC-HVDC system leads the semiconductor switches to lose their control; such that the freewheeling diodes act as a bridge rectifier and keep feeding the fault [5,11-13]. The high current passing through the VSC under DC fault may damage it [5,11-13]. Thus, several researches have addressed and discussed the protection problem under DC faults such as in [5], [12], [13] and [14]. In this paper the effect of the inductance in the AC side and the capacitance in the DC side on the VSC-HVDC will be investigated under ground DC fault in order to have an embedded protection for the VSC. This paper is organized as follows: Section II describes the different DC faults. Section III is devoted to the model of the VSC-HVDC system. In Section IV, the simulation results obtained using MATLAB/SIMULINK are discussed. Finally, Section V draws some conclusions. II. TYPES OF DC FAULTS Line-to-ground fault In overhead lines a ground fault occurs when the line is connected to ground. This may occur when an object falls on the line providing a path to ground or when a lightning strikes the line [5]. When the fault is due to lightning, the fault is always permanent, while when it is due to falling objects the fault is usually permanent; however in some cases the system can be restored if the falling object falls away from the line [5,15]. The primary fault consequence is the direct discharging of the capacitor [15,16]. Line-to-line fault The line-to-line fault means a failure between the two DC conductors insulation. Due to this fault the capacitor will be rapidly discharged, simultaneously through the fault point the ac system will be three phases short-circuited [15,16]. III. VSC-HVDC SYSTEM MODEL The typical VSC-HVDC system model is shown in Fig. 1 next page.

RDC

the dc capacitance and the interfering ac inductance are presented. From these results it is concluded that the effect of increasing the inductance results in reducing the current passing through the VSC. On the other hand, increasing the capacitance results in blocking and delaying this current till the voltage across the capacitor becomes less than the grid side voltage. For example, by having a 10mF capacitance, the current is blocked for almost 30ms, as shown in Fig. 4. By using appropriate circuit breakers this time is enough to activate it and protect the VSC [10,17]. The protection devices for DC faults are discussed in [5,10,13].

IIGBT

+ IDC Ia

L

R

Va

Ib

L

R

Vb

R

Vc

AC

C

VDC

AC

Ic

L

AC

Filter Filter

Grid Grid

400

VSC VSC (a)

θ Va Vb Vc

Vd

200 100

0.25

θ

.

/.

.

L=1mH L=10mH L=100mH

300

0 0.2

Id

+ -

PI abc/dq

/.

Iq

+ -

PWM

VSC GATES

PI

(b)

Fig. 1. Typical VSC-HVDC block diagram.

TABLE I SYSTEM PARAMETERS

Units 132 [kV]

Grid resistance

Filter Filter inductance

0.35

0.4

0.3

0.35

0.4

2 [Ω]

Units 1,10 and 100 [mH]

Inverter Rated power DC capacitance Switching frequency DC link Rated voltage Line resistance

Units

(c)

-60

L=1mH L=10mH L=100mH 0.25

Time (sec)


0 -10 -20

0.25

0.3

0.35

0.4

0.3

0.35

0.4

Time (sec)

30

1 [kHz]

In our case study, a DC line-to-ground fault is introduced to the system at 0.3 seconds (after reaching steady state) in the mid of the DC link line resistance. In Figs. 2-4 the effect of

-40

-30 0.2

1, 10 and 100 [mF]

IV. SIMULATIONS & DISCUSSION

-20

10

500 [MW]

Units 400 [kV] 10 [Ω]

0

-80 0.2

The system parameters are given in TABLE-I. All parameters are fixed during all tests except for the DC capacitance and the AC interfering inductance which will have different values of (1mF, 10mF, 100mF) and (1mH, 10mH, 100mH), respectively.

Grid Rated RMS voltage

0.3

Time (sec)

20

Current (kA)

Q*

Id Iq

Current (kA)

Vd

abc/dq

20

(d)

Current (kA)

P*

Ia Ib Ic

θ Vd

PLL

Voltage (kV)

-

10 0 -10 -20 -30 0.2

L=1mH L=10mH L=100mH 0.25

Time (sec)

Fig. 2. Responses when C = 1mF for (a) Vcap, (b) Idc, (c) I_igbt and (d) Ia.

20

1mH 10mH 100mH

300 200

(b)

100 0 0.2

0.25

0.3

0.35

0.4

Time (sec)

0.45

Current (kA)

(a)

Voltage (kV)

400


-60 0.25

0.3

0.4

0.35

Time (sec)

Current (kA)

Current (kA)

1.2

(d)

0.25

0.3

0.35

0.4

Time (sec)

0.45

1.4


-10 -20

0.4

0.6

L=1mH L=10mH L=100mH 0.4

0.6

0.8

1

1.2

1.4

0.8

1

1.2

1.4

Time (sec)

10 0 -10

0.5

-30 0.2

Time (sec)

30

Fig. 4. Responses when C = 100mF for (a) Vcap, (b) Idc, (c) I_igbt and (d) Ia.

20

Parts (a) of Figs. 2-4 represent the effect of the inductance on the capacitance voltage such that increasing the interfering ac inductance has no effect on this voltage under normal operation. On the other hand, under DC faults the inductance value has no effect on the capacitance voltage till it becomes less than the grid voltage; where in this case high inductances result in more voltage discharge.

10 0 -10

-30 0.2

L=1mH L=10mH L=100mH 0.25

0.3

0.35

0.4

Time (sec)

0.45

0.5

Fig. 3. Responses when C = 10mF for (a) Vcap, (b) Idc, (c) I_igbt and (d) Ia. 400

Voltage (kV)

1

0.8

Time (sec)

20

-20

-20

(a)

0.6

0

-20

(d)

0.4

30


-10

-30 0.2


-60

-30 0.2

0.5

0.45

0

Current (kA)

(c)

-40

Current (kA)

Current (kA)

-20

10

(c)

-40

10

0

-80 0.2

-20

-80 0.2

0.5

20

(b)

0


300 200 100 0 0.2

0.4

0.6

0.8

1

Time (sec)

1.2

1.4

Fig. 5, presented next page, signifies clearly the effect of increasing the capacitance on the blocking time of the dc current passing through the converter freewheeling diodes from the ac side to the dc side under the fault. The blocking time is defined as the time interval from fault occurrence till the capacitance voltage becomes equal to the grid voltage. As the capacitance increases the blocking time significantly increases.

Voltage (kV)

400

C=1mF C=10mF C=100mF Grid Voltage

300 200

[11]

[12]

100 0 0.2

[13] 0.4

0.6

0.8

1

Time (sec)

1.2

1.4

Fig. 5. Capacitance Discharging Responses for L = 10mH.

[14]

V. CONCLUSION The effect of the ac side inductance and the dc side capacitance on the blocking time of the VSC current under DC fault has been investigated. It is concluded that increasing the capacitance can increase the blocking time of the VSC current allowing the circuit breakers to trip and protect the VSC. Moreover, in case that the blocking time is not enough for opening the circuit breaker because of low capacitance, increasing the inductance decreases the VSC current magnitude providing more margin of time for activating the circuit breaker and tripping. It should be pointed that increasing the capacitance and inductance may not be practical and can be very costly. Further research should be done to come up with the optimum combination. REFERENCES [1]

Taoxi Zhu, Chao Wang and Jing Zhang, “Influence of the AC system faults on HVDC system and recommendations for improvement,” in Proc. IEEE Power & Energy Society General Meeting (PES 2009), pp. 1-6, 26-30 July 2009. [2] Craciun, B.-I.; da Silva, R.; Teodorescu, R.; Rodriguez, P., "Multilink DC transmission for offshore Wind Power integration," Industrial Electronics (ISIE), 2012 IEEE International Symposium on , vol., no., pp.1894,1899, 28-31 May 2012. [3] Wang Gang, Li Zhikeng, Li Haifeng, Xiaolin Li, Chuang Fu. “HVDC Converter Modeling and Harmonic Calculation under Asymmetric Faults in the AC System” 2009 IEEE Power and Energy Society General Meeting: Calgary, AB, Canada, July 2009. [4] Yan Wang, Shu-zhen Zhao, Cheng Huang-fu, Jiang-jun Ruan, Qing-da Meng, Jia-qi Zhao. “A Dynamic Model and Control Strategy for the Voltage Source Converter Based HVDC Transmission System under Fault AC Conditions.”2009 IEEE Power and Energy Society General Meeting: Calgary, AB, Canada, July 2009. [5] J. Candelaria, J. Park, “VSC-HVDC system protection: a review of current methods,” IEEE/PES Power Systems Conference and Exposition (PSCE), 2011, pp. 1- 7. [6] Xiao-Ping Zhang, "Multiterminal voltage-sourced converter-based HVDC models for power flow analysis," Power Systems, IEEE Transactions on , vol.19, no.4, pp.1877,1884, Nov. 2004. [7] Guangkai Li; Gengyin Li; Haifeng Liang; Chengyong Zhao; Ming Yin, "Research on dynamic characteristics of VSC-HVDC system," Power Engineering Society General Meeting, 2006. IEEE , vol., no., pp.5 pp.,, 0-0 0. [8] Chengyong Zhao; Ying Sun, "Study on Control Strategies to Improve the Stability of Multi-Infeed HVDC Systems Applying VSC-HVDC," Electrical and Computer Engineering, 2006. CCECE '06. Canadian Conference on , vol., no., pp.2253,2257, May 2006. [9] Chunyi Guo; Chengyong Zhao, "A new technology for HVDC start-up and operation using VSC-HVDC system," Power & Energy Society General Meeting, 2009. PES '09. IEEE , vol., no., pp.1,5, 26-30 July 2009. [10] Flourentzou, N.; Agelidis, V.G.; Demetriades, G.D., "VSC-Based HVDC Power Transmission Systems: An Overview," Power

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