Sulfur passivation of GaAs metal-semiconductor field-effect transistor

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Y. Dong, X. M. Ding, and X. Y. Houa). Surface Physics ..... 7 X. A. Cao, H. T. Hu, X. M. Ding, Z. L. Yuan, Y. Dong, X. Y. Chen, B. Lai, and X. Y. Hou, J. Vac. Sci.
APPLIED PHYSICS LETTERS

VOLUME 77, NUMBER 23

4 DECEMBER 2000

Sulfur passivation of GaAs metal-semiconductor field-effect transistor Y. Dong, X. M. Ding, and X. Y. Houa) Surface Physics Laboratory, Fudan University, Shanghai 200433, China

Y. Li and X. B. Li The Electronics 13th Research Institute, The Ministry of Information Industry, Shijiazhuang 050002, China

共Received 24 July 2000; accepted for publication 11 October 2000兲 A passivation technique consisting of a 共NH4兲2S dip followed by GaS deposition has been applied to a GaAs microwave-power metal–semiconductor field-effect transistor 共MESFET兲. The breakdown characteristic of the MESFET is greatly improved upon the 共NH4兲2S treatment, and a stable passivation effect can be achieved by GaS film deposition. It is found that the FET current– voltage characteristics are closely related to variations in the pinning position of the GaAs surface Fermi level. With the surface passivated, a depletion layer can be properly formed and protected, which is of benefit to the control of the device parameters. © 2000 American Institute of Physics. 关S0003-6951共00兲04150-4兴

Surface passivation of III–V compound semiconductors, especially of GaAs, is an important yet unsolved problem in the device technology. Since Sandroff et al.1 proposed the sulfur passivation of GaAs by using Na2S•9H2O solution dipping, a variety of S-passivation techniques2–7 have been reported. Compared with the development of the techniques in laboratory, however, not much progress has been achieved on passivation of practical GaAs devices until recently.8–13 For instance, using a sulfur passivation technique, Beister et al.9 have passivated InGaAs/AlGaAs laser diode successfully. And MacInnes and co-workers13 have fabricated a GaAs metal-insulator-semiconductor field-effect transistor 共MISFET兲 using GaS as its insulating gate. However, to the authors’ knowledge, there is no published report on applying any sulfur passivation technique to GaAs metal– semiconductor field-effect transistors 共MESFETs兲 though they are widely used in microwave and digital circuits. In this letter, we report a stable sulfur passivation technique applicable to GaAs power MESFETs. GaS is used to replace SiNx as an insulating medium. This method may take the place of traditional SiNx passivation for GaAs power MESFETs. To achieve high power and good stability is considered important in developing the GaAs power MESFET. The improvement of breakdown characteristics between gate and drain is a prerequisite to those aims. Low breakdown voltage leads to low gain, low efficiency, and low output power. Although the mechanism of gate breakdown in a microwave MESFET is complex, it is generally agreed that gate breakdown results mainly from surface breakdown. Deposition of a thin SiNx film may passivate the device, but the breakdown voltage between gate and drain reduces significantly,14 which is obviously a big drawback for a GaAs MESFET. In the present study, a combination of 共NH4兲2S dip and GaS deposition is used to passivate the GaAs power MESFET. Here a dip in 共NH4兲2S solution plays a twofold role: to remove native oxides and to prepassivate the device. It is found that the treatment can raise the breakdown voltage a兲

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by 6.4 V in average. The subsequent deposition of a GaS film on the 共NH4兲2S-treated FET can further lead to a stable passivation effect. It is also found that, besides the depletion layer induced by the Schottky gate contact, the depletion layer formed due to pinning of GaAs surface Fermi level E F may affect the current–voltage behaviors of the FET to a certain extent. And the formation and protection of the latter depletion layer can be greatly influenced by surface treatment and passivation. The FET samples used were provided by a pilot production line. The cross section of the device is schematically shown in Fig. 1. The FET was grown by molecular beam epitaxy 共MBE兲 on a semi-insulating GaAs substrate. Ohmic contacts were made to the N⫹ source and drain regions while the gate was formed via Schottky contact. The remaining GaAs surfaces between source and gate and between drain and gate were naked. The gate length and width were 0.8 and 125 ␮m, respectively. The gate–source and gate–drain separations were 2.5 ␮m. Details of the two-step passivation process are as follows. The wet passivation of 共NH4兲2S dip was carried out at 60 °C for 10 min after the sample was slightly ultrasonically cleaned by acetone, ethanol, and deionized water sequentially and then blown dry by nitrogen gas. After the wet treatment, the wafer was loaded into a MBE chamber with a base pressure of 1.0⫻10⫺7 Pa. A rela-

FIG. 1. Cross section of the GaAs MESFET.

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FIG. 2. Gate–drain breakdown voltage upon different treatments.

tively thick 共500 nm兲 GaS film was then deposited on the FET wafer kept at room temperature 共RT兲 to ensure a stable passivation. Detailed procedures can be found in Ref. 7. No effort was made in the present work to study the effect of film thickness on passivation. All the electric measurements were performed by pinning the testing probes on the contact pads of the GaScovered GaAs wafer. For a real device where contact windows are needed, the GaS overlayer can be selectively etched by diluted (NH4兲2S solution. Three dc parameters of the GaAs power MESFET were measured. The first was breakdown voltage V BR , defined as the voltage across the drain and gate when the current between them reached 1 mA, in the condition of source open. The second was saturated drain–source current I DSS , defined as the current between the source and drain when the voltage across them was 3 V, in the condition of gate and source short. The last was transconductance G M (G 0 ), defined as the ratio of variation of the current between the drain and source (I DS) to the voltage across the gate and source (V GS) when V GS varied from 0 to ⫺1 V, in the condition of the voltage between the drain and source (V DS) fixed, say, at 3 V. Figure 2 shows variation of V BR following different treatments. Upon the (NH4兲2S treatment, the breakdown characteristics is greatly improved and V BR increases from 18.8 to 25.2 V, measured at a leakage current of 1 mA. Contrarily, for the reference sample passivated by a SiNx layer, V BR decreases from 18.8 to 10.0 V. It is thus evident that the (NH4兲2S treatment is effective to modify the device surface, as will be discussed below, but the treated surface is not highly stable against environmental impacts. One can see from Fig. 2, there appears a 5 V drop in the breakdown voltage after 100 h illumination of the (NH4兲2S-treated device in the atmosphere. As is also shown in Fig. 2, upon deposition of a GaS layer on the (NH4兲2S-treated device, V BR increases by a value of 5.0 V. This value is lower than 6.4 V of the mere (NH4兲2S treatment, but it remains unchanged after 100 h illumination in atmosphere. In other words, the presence of the GaS layer greatly enhances the resistance of the device against illumination. As is generally recognized, there exist native oxides, along with plenty of various recombination centers, on a naked GaAs FET surface. The presence of these recombination centers will result in high surface recombination rates and a

Dong et al.

large number of bound surface charges. Upon the (NH4兲2S treatment, the native oxide layer can be removed and a sulfur terminated surface can be created. The formation of Ga–S and As–S bonds on the GaAs surface greatly reduces both the recombination rate and the number of bound surface charges.15 Thus, the increase of breakdown voltage upon the (NH4兲2S treatment is likely due to 共a兲 reduce the number of surface recombination centers and hence the surface leakage current and 共b兲 reduce the number of surface bound charges and hence the corresponding capacitance. Distribution of the electric field may change accordingly, too. As a result, with the same voltage applied, electric-field intensity becomes small in comparison. So the (NH4兲2S-treated surfaces are more difficult to be punctured than as-received ones. The significant reduction of breakdown voltage upon the deposition of SiNx may then result from increased recombination centers as the native oxide layer has not been removed from the GaAs surface. In order to obtain a good breakdown characteristic, removal of the oxide layer is extremely important. We expect that deposition of a GaS layer on a sulfur-free FET surface would give a bad breakdown characteristic, too. The sulfide layer formed by the (NH4兲2S treatment is not very stable because of its small thickness 共several angstroms only兲. At the presence of light and oxygen, it will be converted to an oxide layer.16 In order to obtain stable passivation, a thicker cap layer is needed to protect the (NH4兲2S-treated FET. The cap should be chosen so that additional recombination centers cannot be induced at the interface. The GaS film seems to meet such a requirement: the (NH4兲2S⫹GaS treatment results in an increase of 5.0 V in V BR , comparable to the 6.4 V increase by the single (NH4兲2S treatment. The slight drop in the breakdown voltage upon the deposition of GaS may result from residual oxygen and water on the (NH4兲2S-treated FET surface. They cannot be removed by preannealing the sample at around 600 °C as is usually adopted for GaAs MBE, because the GaAs FET cannot bear temperatures above 250 °C. Thus, after the GaS deposition at RT, the residual water existing at the GaS– GaAs interface may induce some interface states, resulting in a lowered breakdown characteristic. Were there no water, there should emerge a low density of interface states at an ideal GaS/GaAs interface. By measuring capacitance– voltage characteristics of the MIS structure, it is known that the interface state density of GaS/GaAs is on the order of 1010 eV⫺1 cm⫺2. Another possible reason for the slight drop in the breakdown voltage upon the deposition of GaS is that GaS absorbs water easily. There may exist some water on the surface of the GaS-capped FET, resulting in a path for conduction. The problem may be solved by depositing an extra protecting medium, such as SiNx , on the GaS-capped FET. The I DSS and G M (G 0 ) following different treatments are shown in Fig. 3. After the (NH4兲2S treatment, both I DSS and G M 共G0兲 decrease by about 10% from their initial values. It is unlikely that the decreases are due to over etch of the GaAs active layer in the (NH4兲2S solution, as is confirmed by the measured (NH4兲2S etching rate17 and saturated channel current of the FET. And after the subsequent deposition of the GaS film, I DSS and G M (G 0 ) do not change significantly. But after annealing at 225 °C in atmosphere for 24 h, there ap-

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Dong et al.

Appl. Phys. Lett., Vol. 77, No. 23, 4 December 2000

FIG. 3. Saturated drain–source current I DSS(䊏) and transconductance, G M (G 0 ), 共⽧兲 upon different treatments.

pears a 15% increase in I DSS and G M (G 0 ) in comparison with the original values. The variations in I DSS and G M (G 0 ) observed may result from the change in GaAs surface band bending. Two different depletion layers may coexist in the GaAs active zone. One comes from the Schottky barrier gate, labeled A in Fig. 1, and the other comes from E F pinning and surface band bending, labeled B in Fig. 1. Usually, the former receives much more attention. However, the importance of the latter manifests in the present experiment. The sulfur treatment and annealing has a minor effect on the first kind of depletion layer, but the second depletion layer is remarkably influenced by the treatments. It is well known that there exists E F pinning at normal GaAs surfaces. Upon the (NH4兲2S treatment, the surface band bending is increased.18,19 That means the surface layer has been further carrier depleted. So both I DSS and G M (G 0 ) reduced to the levels comparable with those measured from the bare GaAs surface. In the case that the GaAs film is deposited on the (NH4兲2S-pretreated surface, the surface band bending receives less influence. Having been annealed at 225 °C, however, the As–S bonds at the interface are converted to Ga–S bonds.20 It is deduced that the Ga–S bond does not induce gap state while the As–S bond does. So the conversion of As–S bonds to Ga-S bonds will lead to a less bent surface band even comparable with that of a bare GaAs surface. As a result, the carrier depletion will be released to a certain extent, giving rise to the increase of I DSS and G M (G 0 ). Adjustable I DSS and G M (G 0 ) may be utilized to meet various requirements in different application fields. For example, on the one hand, a decrease of I DSS and G M (G 0 )

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means a wider base voltage range; on the other hand, an increase of I DSS and G M (G 0 ) is good for reaching a higher power at the same working voltage. So, proper passivation of the FET surface not only gives chemical protection to the device, but also regulates its electrical parameters. In conclusion, the (NH4兲2S treatment can greatly improve the breakdown characteristics between the drain and gate of the GaAs FET. Subsequent deposition of the GaS film ensures the stability of the passivation effect. Shift of the E F pinning position is found to have a profound effect on the FET characteristics. By applying the combined (NH4兲2S⫹GaS treatments to the GaAs FET surface, adjustable current–voltage characteristics can be achieved, demonstrating that GaS may become a new passivation material for GaAs-based devices. 1

C. J. Sandroff, R. N. Nottenburg, J. C. Bischoff, and R. Bhat, Appl. Phys. Lett. 51, 33 共1987兲. 2 M. S. Carpenter, M. R. Melloch, and T. E. Dungan, Appl. Phys. Lett. 53, 66 共1988兲. 3 E. Yablonovitch, T. J. Gmitter, and B. G. Bagley, Appl. Phys. Lett. 57, 2241 共1990兲. 4 Z. S. Li, W. Z. Cai, R. Z. Su, G. S. Dong, D. M. Huang, X. M. Ding, X. Y. Hou, and X. Wang, Appl. Phys. Lett. 64, 3425 共1994兲. 5 A. N. MacInnes, M. B. Power, A. R. Barron, P. P. Jenkins, and A. F. Hepp, Appl. Phys. Lett. 62, 711 共1993兲. 6 X. Y. Hou, X. Y. Chen, Z. S. Li, X. M. Ding, and X. Wang, Appl. Phys. Lett. 69, 1429 共1996兲. 7 X. A. Cao, H. T. Hu, X. M. Ding, Z. L. Yuan, Y. Dong, X. Y. Chen, B. Lai, and X. Y. Hou, J. Vac. Sci. Technol. B 16, 2656 共1998兲. 8 X. A. Cao, X. Y. Hou, X. Y. Chen, Z. S. Li, R. Z. Su, X. M. Ding, and X. Wang, Appl. Phys. Lett. 70, 1 共1997兲. 9 R. S. Beister, J. Maege, D. Gutsche, G. Erbert, J. Sebastian, K. Vogel, M. Weyers, J. Wurfl, and O. P. Daga, Appl. Phys. Lett. 68, 2467 共1996兲. 10 S. Kamiyama, Y. Mori, Y. Takahashi, and K. Ohnaka, Appl. Phys. Lett. 58, 2595 共1991兲. 11 U. Schede, St. Kollakowski, E. H. Bottcher, and D. Bimberg, Appl. Phys. Lett. 64, 1389 共1994兲. 12 Y.-H. Jeong, K.-H. Choi, S.-K. Jo, and B. Kang, Jpn. J. Appl. Phys., Part 1 34, 1176 共1995兲. 13 P. P. Jenkins, A. N. MacInnes, M. Tabib-Azar, and A. R. Barron, Science 263, 1751 共1994兲. 14 E. Y. Chang, G. T. Cibuzar, J. M. Vanhove, R. M. Nagarajan, and K. P. Pande, Appl. Phys. Lett. 53, 1638 共1988兲. 15 N. Yashida, M. Totsuka, J. Ino, and S. Matsumoto, Jpn. J. Appl. Phys., Part 1 33, 1248 共1994兲. 16 B. A. Cowans, Z. Dardas, W. N. Delgass, M. S. Carpenter, and M. R. Melloch, Appl. Phys. Lett. 54, 365 共1989兲. 17 Z. L. Yuan, X. M. Ding, B. Lai, and X. Y. Hou, E. D. Lu, P. S. Xu, and X. Y. Zhang, Appl. Phys. Lett. 73, 2977 共1998兲. 18 C. J. Spindt, R. S. Besser, R. Cao, K. Miyano, C. R. Helms, and W. E. Spicer, Appl. Phys. Lett. 54, 1148 共1989兲. 19 C. J. Spindt and W. E. Spicer, Appl. Phys. Lett. 55, 1653 共1989兲. 20 C. J. Spindt, D. Liu, K. Miyano, P. L. Meissner, T. T. Chiang, T. Kendelewicz, I. Lindau, and W. E. Spicer, Appl. Phys. Lett. 55, 861 共1989兲.

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