SURFACE PASSIVATION OF CRYSTALLINE

32nd European Photovoltaic Solar Energy Conference and Exhibition

SURFACE PASSIVATION OF CRYSTALLINE SILICON BY HYDROGENATED AMORPHOUS SILICON\SUB-NM AL2O3 STACK a

Asmaa S. A. Ali a, Osama Tobail* a,b Center of Nanotechnology (CNT), Zewail City of Science and Technology, Sheikh Zayed District, 12588 Giza, EGYPT b Egypt Nanotechnology Center, Cairo University, Shaikh Zayed Campus, 12588 Giza, EGYPT, Email: [email protected] Email: [email protected]

ABSTRACT: Atomic layer deposited aluminum oxide has been widely used as a low deposition temperature alternative material for surface passivation in the area of high efficiency silicon solar cells. Al2O3 thin films provide an excellent passivation quality due to chemical and field effect passivation. Fabrication of back side passivated silicon solar cells requires a complex patterning for metal contact, however, ultra-thin Al2O3 enables tunneling and hence avoid the complexity of metal contacts. Reducing the thickness of Al2O3 results in deterioration of the passivation quality. Thus, in this work, we develop doped hydrogenated amorphous silicon (a-Si:H)/sub-nm Al2O3 stack which compensates the passivation quality deterioration and maintains the tunneling to achieve back side passivated contact. The improvement of the surface passivation and tunneling has been observed, since the lifetime of the stack of doped a-Si:H/Al2O3 is from three to four times higher than Al2O3 reference samples. To investigate the impact of the developed stack, we incorporated the measured surface recombination velocity and contact resistance into PC-1D simulation to compare passivated contact to point contact solar cell. The simulation shows that our passivated contact has a potential to improve the solar cell performance without the need to complicated patterning. Keywords: passivated tunneling contact, ALD, simulation

1

INTRODUCTION

hydrogenated amorphous silicon (a-Si:H) to compensate the degraded passivation quality of the ultrathin layers. We investigate the passivation quality of both n-type and p-type a-Si:H on top of Al2O3 layer for both n- and p-type silicon wafers. This stack achieved high surface passivation quality which leads to measured minority carrier lifetime up to 2.4 ms for n-type wafer. PC-1D simulation was performed in order to investigate the influence of inserting the developed passivated contact stack in the solar cell compared to using local point contacts. The simulation expects an improvement of the solar cell performance in terms of efficiency and open circuit voltage (Voc). The simulation results promises the fabrication of the passivated back contact cells without the complicated patterning of local point contacts.

High efficiency silicon solar cells (< 20 %) [1, 2] require surface passivation for silicon to suppress carrier recombination caused by the dangling bonds as a result of surface termination [3, 4]. Recently, Al2O3 has attracted a great interest as surface passivation material for silicon solar cells [2, 4, 5]. Al2O3 shows an excellent surface passivation [6] owing to the combination of both i) chemical passivation through the saturation of the dangling bonds resulting in low interface defect density (Dit) and ii) field-effect passivation (via repelling charges far from the interface) despite of the high negative charge density (Qf) contained in the Al2O3 layer introduced by Al vacancies and O interstitials [1, 2]. For passivated back side solar cells, the local metal contact limits the cell efficiency due to the resistive losses. Thus the metal contact area needs to be minimized through complex patterning of thousands of point contacts. Resistive losses emerge owing to the limited point contact area. Therefore, the TOPCon [7] passivation scheme suggests covering the full back side area with highly doped nanocrystalline silicon on top of thin tunnel oxide. Also, thinner Al2O3 layer that enables tunneling of the carriers can be used as passivated tunnel contact [8]. On the other hand, the passivation quality of the Al2O3 layers is deteriorated by decreasing the thickness less than 5 nm [9]. Therefore, a passivation layer or stack of layers is needed to be developed for both n-type and p-type silicon, since the solar cell industry tends to use front and back side passivated solar cell concepts [10]. In addition, the passivating stack should enable tunneling to facilitate contacting the solar cell without complicated patterning of the passivating stack.

2

EXPERIMENTAL DETAILS

Both n-type and p-type float zone (FZ) c-Si double sided polished (DSP) wafers were used to investigate the surface passivation quality of aSi:H\Al2O3 stack. To maximize the effect of the surface passivation on the measured effective minority carrier lifetime measurement, wafers with small thickness of 280 µm and light doping between 7 and 20 Ω.cm were selected. Prior to the deposition, the wafers were treated with diluted HF solution (5%) for 10 min. to remove the native oxide layer and achieve H-terminated surface. Fig. 1 schematically represents the samples prepared for the lifetime measurement. Al2O3 ultrathin films were deposited on both sides by thermal atomic layer deposition (ALD) at 300 °C using Oxford FlexAlTM reactor. Each Al2O3 mono-layer were deposited by performing a cycle of a trimethyl aluminum Al(CH3)3 (TMA) and H2O pulses with Ar purge after each pulse. In this study, we compare samples with 8 ALD cycles (~0.8 nm) and samples with 14 ALD cycles (~1.7 nm)

In this work, we proposed using sub-nm Al2O3 layers deposited by atomic layer deposition (ALD) to passivate the silicon surface followed by a layer of doped

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with respect to lifetime and tunneling quality. Then 10 to 12 nm doped hydrogenated amorphous silicon (a-Si:H) was deposited on top of the Al2O3 films by Oxford Plasma Pro System 100 Plasma Enhanced Chemical Vapor Deposition (PECVD). For lifetime measurements, symmetrically a-Si:H/Al2O3/c-Si/Al2O3/a-Si:H samples were prepared. The a-Si:H were deposited at plasma power of 200 Watt and substrate temperature 250 ℃. The n-type doped layers a-Si:H(n/n+) and p-type doped a-Si:H(p/p+) are deposited using the gas flows in table 1. The thicknesses of all deposited thin films were determined by Woollam spectroscopic ellipsometer.

passivation. This improvement in passivation might be ascribed to the enhanced chemical passivation due to hydrogen diffusion from the a-Si:H layer to the interface during the annealing process as a-Si:H could be considered as a hydrogen source [11]. In addition, the enhanced field effect passivation due to the increase of the negative charges from the n-type a-Si could contribute to the improvement of the measured lifetime. It is clear from Fig. 2 that n-type a-Si:H is more preferable than p-type a-Si:H for passivating p-type wafers probably due to the enhanced field-effect passivation part, as also reported in ref [12]. Beside the advantage of decreasing the needed annealing temperature from 450 ℃ to 250 ℃ for n-type a-Si:H compared to reference, also, the measured lifetime is three times higher for the n-type a-Si:H. Also, it is observed that increasing the doping of both n- and p-type a-Si:H layer deteriorates the passivation to values less than the reference sample. Fig. 3. illustrates that the samples deposited on p-type c-Si wafers show the same behaviour as n-type c-Si substrates.

Figure 1: Schematic representation of the experimental procedures for fabrication of the passivating a-Si:H (n\p)\Al2O3 stack for lifetime measurements. The effective minority carrier lifetime was measured by Quasi-Steady-State-Photoconductance (QSSPC) method using Sinton instrument (WCT-120) for as-deposited and annealed samples. The annealing was performed on a hot plate in air for 10 min at a temperature ranging from 50 ℃ to 540 ℃. For current/voltage (I/V) measurements, only front side passivated samples with front and rear metallization were prepared. I/V characteristics were measured by Keithely 4200 parameter analyzer as a function of annealing temperature as well as asdeposited. Annealing was performed using a hot plate in air from 100 ℃ − 400 ℃ for 10 min. 1 µm aluminum contacts were deposited using Oxford Plasma Pro 400 sputtering system.

Figure 2: Measured effective minority carrier lifetime as a function of annealing temperature of n-type c-Si wafers passivated with a-Si:H (n\n+ and p\p+)\sub-nm Al2O3 compared with reference (only Al2O3).

Table I: PECVD gas flows in sccm. The dopant gases are 1% diluted in H2. SiH4 H2 PH3/H2(1%) B2H4/H2(1%) a-Si:H (n) 25 180 90 a-Si:H (n+) 5 180 90 a-Si:H (p) 25 180 90 a-Si:H (p+) 5 180 90

3

RESULTS AND DISCUSSION

Fig. 2 shows the effective minority carrier lifetime measured at minority carrier density (MCD) of 1015 cm-3 as a function of the annealing temperature for p-type wafers with symmetrical structure of a-Si:H/Al2O3/cSi/Al2O3/a-Si:H. The Al2O3 thickness of those samples is ~0.8 nm. The samples with both n- and p-type a-Si:H showed an enhancement of the surface passivation compared to the reference. In addition, the a-Si:H/Al2O3 showed an optimum annealing temperature of 200 ℃ for p-type a-Si:H and 250 ℃ for n-type a-Si:H compared to the 450 ℃ for reference sample with only Al2O3

Figure 3: Measured effective minority carrier lifetime as a function of annealing temperature of p-type c-Si wafers passivated with a-Si:H (n\n+ and p\p+)\sub-nm Al2O3 compared with the reference (only Al2O3).

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Fig. 4 and Fig. 5 depict the results of the effective lifetime measurements for thicker Al2O3 layer with a thickness of ~1.7 nm for n-type and p-type c-Si wafers respectively. Thicker Al2O3 films resulted in four times higher lifetimes than that of sub-nm Al2O3 layer (Fig. 2 and Fig. 3). Deposition of n-type a-Si:H on n-type c-Si wafer resulted in a lifetime of ~2.4 ms at 250 ℃ while gave a lifetime of ~2 ms at 300 ℃ when it deposited on p-type c-Si wafer. This could be attributed to increasing field effect passivation introduced by thicker Al2O3 film. The same results were shown for increasing the doping concentrations of n- and p-type a-Si:H.

as a function of the annealing temperature. The contact of the devices on n-type (Fig. 6) was enhanced at annealing temperature of 200 ℃, which coincides with the optimum annealing temperature range for lifetime; however, it does not show an ohmic contact. An ohmic contact is achieved for devices on p-type (Fig. 7) wafers only at an annealing temperature starting from 300 ℃, which coincides with the optimum annealing temperature range for minority carrier lifetime shown in Fig. 3. Therefore, we conclude that the optimum configuration for best passivation and tunneling is a-Si:H(n)/Al2O3 on p-type wafers when annealed at 300 ℃.

Figure 4: Measured effective minority carrier lifetime as a function of annealing temperature of n-type c-Si wafers passivated with a-Si:H (n\n+ and p\p+)\double of Al2O3 thickness compared with reference (only Al2O3).

Figure 6: I\V curve of n-type c-Si wafer passivated with a-Si:H (n)\sub-nm Al2O3 at different annealing temperatures. The behavior of I\V curve shows nonohmic contact with decreased barrier at 200 0C.

Figure 5: Measured effective minority carrier lifetime as a function of annealing temperature of p-type c-Si wafers passivated with a-Si:H (n\n+ and p\p+)\double of Al2O3 thickness compared with reference (only Al2O3).

Figure 7: I\V curve of p-type c-Si wafer passivated with a-Si:H (n)\sub-nm Al2O3 at different annealing temperatures. The behavior of I\V curve changes with annealing temperature showing an ohmic behavior starting at 300 0C. The observed non-ohmic behavior could be due to the regrown native oxide after the HF dip and before transferring the sample to the ALD chamber. This grown native oxide adds to the insulator thickness and hence decreases the tunneling effect.

We observed that the best surface passivation is obtained on the case of n-type a-Si:H/Al2O3 stack on both n-type and p-type wafers. Therefore, we measured the tunneling effect of sub-nm Al2O3 (~0.8 nm) in terms of current / voltage (I/V) characteristics of asymmetrical sample structures of Al/ a-Si:H(n)/Al2O3 on top of both n-type and p-type wafers with Al back contact. The test devices have an area of 0.04 cm2 each. Fig. 6 and Fig. 7 represent the measured I/V curves of the tunnel devices on n-type and p-type wafers, respectively,

The best parameters using the sub-nm Al2O3 thickness regarding to the lifetime and tunnelling was obtained when depositing n-type a-Si:H on top of p-type wafer when annealed at 300 ℃. Therefore, these parameters

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were incorporated into PC-1D code [13] to simulate the solar cell performance with surface passivation quality and electrical contact resistance dictated by the developed stack. We compare our developed passivated contact with the conventional passivation layer with point contacts at variable metallization fraction (α). The contact resistance of the developed passivated contact cell was extracted from the I/V measurement in Fig. 7 to be 0.95 Ω.cm2. The corresponding maximum surface recombination velocity Seff-max = 35 cm/s is determined from the measured carrier lifetime in Fig. 3 according to the equation Seff-max = W/(2•eff), while W is the wafer thickness and eff is the measured minority carrier lifetime [14]. Regarding the solar cell with local point contact, the Al/Si contact resistance is taken as 3700 Ohm µm2 [15] and the surface recombination velocity was determined from minority carrier lifetime measurement for double sided 10 nm thick Al2O3 coated wafer to be Seff-max = 20 cm/s, while S = 105 cm/s for metallized area. The effective contact resistance and effective recombination velocity were calculated as a function of the metallization fraction and used in the PC-1D simulation.

Fig. 8 compares the efficiency of a cell with passivated contact and to a cell with local point contacts as a function of the metallization fraction as resulted from PC-1D. The simulation shows that efficiency increases with increasing the metallization fraction in the case of the passivated contact cell, while decreases for the local point contacts cells. Therefore, using our developed passivated contact could lead to solar cell with comparable performance of a cell with a complicated point contact with 1 to 5 % metallization fraction. Fig. 9 represents the open circuit voltage (Voc) results in case of passivated contact as a function of metalization fraction compared to local point contact cell. The simulation shows that passivated contact resulted in higher Voc than local point contact cells. Besides, passivated contact appears to be independent on the metalization fraction while drops in case of local point contacts cell. It is obvious from the Fig.8 and Fig. 9 that the effect of full metallization coverage on both efficiency and open circuit voltages becomes more effective with decreasing the cell thickness. 4

SUMMERY AND CONCLUSION

In this work, passivation quality of n/n+ and p/p+ type doped a-Si:H/Al2O3 stack was tested on both n and p-type c-Si wafers. We used two sets of Al2O3 thickness; ~0.8 nm and ~1.7 nm. We found that deposition of n-type aSi:H on top of the Al2O3 layer shows higher lifetimes than p-type a-Si:H. Thicker Al2O3 (~1.7 nm) also led to higher lifetime than sub-nm Al2O3 (~0.8 nm). Increasing the doping of both n- and p-type a-Si:H layer deteriorates the passivation to values close to or even less than the reference sample. Current/voltage (I/V) measurements were performed as an investigation of tunnelling effect of n-type a-Si:H/sub-nm Al2O3 on n-type and p-type c-Si wafers. An ohmic contact was observed for sample deposited on p-type c-Si substrate starting at 300 ℃ of annealing temperature which works in well with achieving high passivation. Sample deposited on n-type substrate did not show an ohmic contact while it showed an enhancement of I/V current at 200 ℃ annealing temperature which also coincides with the range of annealing temperatures for maximum lifetimes.

Figure 8: Efficiency comparison between cells with local point contact and passivated contact as a function of the metallization fraction. The results show that the best efficiency was obtained for the full coverage of the metal on top of the passivated contact cell.

In conclusion, deposition of doped a-Si:H on top of ultrathin Al2O3 improves the passivation quality, since the lifetime of the stack of doped a-Si:H/Al2O3 is from three to four times higher than Al2O3 reference samples. In addition, we found that n-type a-Si:H is preferable for passivating both n- and p-type Si wafers. Using the subnm Al2O3 improves the tunneling of the carriers which facilitates the contact of the solar cell. PC-1D simulation expects an improvement in cell performance in terms of Voc and efficiency by full coverage of the developed passivated contact stack. 5

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Figure 9: Simulated open circuit voltage Voc as a function of the metallization fraction for cells with passivated contact and point contacts. Passivated contact gives Voc independent of the metallization fraction and higher than that of the point contact cells.

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