The Overall Dynamics of Power-Factor-Correction Boost Converter Tamotsu Ninomiya Kyushu University Department of Electrical and Electronic System Engineering Fukuoka, 812-8581, Japan Email:
[email protected]
Haipeng Ren Xi’an University of Technology School of Automation and Information Engineering Xi’an , 710048, China Email:
[email protected]
so-called piecewise nonlinearity. The nonlinearity calls for the nonlinear method to be used for analysis and design of converters. Some typical bifurcation routes to chaos have been recognized, such as period-doubling bifurcation, border collision bifurcation, Neimark Cacker bifurcation. Most of these analyses are based on the discrete map, which describes the dynamics from one switching time to the next. Recently some nonlinear behaviors of the average-current-controlled PFC boost converter have been reported[11-13]. Compared with the DC-DC converters, the nonlinear dynamics in the PFC boost converter is a more interesting one because the switching signal is periodic with high frequency and the input voltage is periodic with low frequency. Moreover, it is a more challenging one because it has not only the piecewise nonlinearity but also the nonlinearity induced by multiplier/divider and square operation. It has been pointed out that both the fast scale-instability[11] and the low-frequency bifurcation [12,13] can occur in the PFC boost converter. Because the input voltage variation can be neglected in a switching period, the discrete map can be derived for the fast- scale bifurcation analysis. On the other hand, for the slow-frequency bifurcation, it is difficult to derive the discrete map, because of a large variation of the input voltage. A double averaging model[14] is proposed to estimate a low frequency period-doubling bifurcation point, but the following route to chaos remains unclear, and in addition, the fast-scale instability is not covered. The PFC boost converter is commonly designed in the CCM[4], therefore, it is intuitive to analyze the converter using CCM model for the slow-scale bifurcation[13]. But it has been found that the PFC boost converter may operate in DCM near the crossover point of the line voltage, in particular, the PFC converter may operate in DCM during the whole line cycle under the light load condition[15]. The low-frequency bifurcation generally happens in the light load condition, under which the converter may operate alternatively in CCM and DCM. It has been found that the transition from CCM to DCM can cause bifurcation and chaos [16]. Therefore, the CCM model analysis for PFC boost converter may miss some critical details of the bifurcation behaviors. In this paper, in order to better understand the full dynamics of PFC boost converter, the combined model is considered to analyze its behaviors. This model can cover all possible dynamics, including fast scale and slow scale. By this way, the route from period-doubling bifurcation to chaos is made clear. The dynamical behaviors derived from this model are verified
Abstract—The overall dynamics of Power-Factor-Correction (PFC) boost converter, including the fast-scale instability, the low-frequency stable periodic operation, the low-frequency bifurcation and chaos, are investigated by using the combined Continuous Conduction Mode (CCM) and Discontinuous Conduction Mode (DCM) model. It is conventionally assumed that the converter operates in CCM in the design and analysis process of a PFC boost converter, which prevents us to understand the overall dynamics of the converter. It has been pointed out that the DCM can occur in the PFC boost converter, especially, in the light load condition. Therefore, the DCM model has to be included to analyze this PFC converter to cover the possible DCM operation. The unified model for describing the overall dynamics of the PFC boost converter is derived, which can be used to analyze the overall dynamics uniformly. By using the proposed combined model, the fast-scale instability can be detected. At the same time, the low-frequency bifurcation diagram is derived by proposed model, which makes the route from period-double bifurcation to chaos clear. The overall dynamics derived from the proposed method is verified by the experimental results.
I.
INTRODUCTION
Power factor control is one of the most concerned issues in the field of the power engineering and power electronics. It has been recognized that the standard diode bridge rectifier followed by a large capacitor is not acceptable due the high harmonic distortion of the line current and the EMI problem. Therefore, the harmonic and power factor characteristics of switched-mode power supply have attracted more attentions in the power electronics community in the last decade or so. There are various researches on the topology and control method of the active PFC applications, which are found in [1-3] and the references therein. Among them, the average-current-controlled boost converter is a common one for PFC purpose due to its improved noise performance, less total harmonic distortion and easy implementation with commercial Integrated Circuits[4]. It is a common way to use the “linearized” model for analysis and design of a power converter system, which is profitably fit for frequency domain analysis and make the procedure simple. However the accuracy is traded off and the inherent nonlinearity remains unclear[5]. Bifurcation and chaotic phenomena have been reported in some types of low order DC-DC converters[6-8]. Nonlinear dynamics of some high order parallel-connected converters are studied in [9][10]. In these converters, the cyclic switching of the circuits topologies causes the nonlinearity, which is the
0-7803-9033-4/05/$20.00 ©2005 IEEE.
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by the experimental results using the commercial Integrated Circuits UC3854A. II.
given by 1 ª º 0 » « C R r L C A1 « » r « L» 0 «¬ L »¼
PFC BOOST CONVERTER AND ITS PROPOSED MATHEMATICAL MODEL
2.1 Topology of the PFC boost converter The circuit schematic of the PFC boost converter under average current control is shown in Fig.1. The power stage circuit consists of inductor L , capacitor C , diode D , switch S , and load resistance RL . The control circuits consist of an outer voltage loop and an inner current loop, which control both the input current and the output voltage. The voltage loop controls the output voltage by changing the average amplitude of the current programming signal. An analog multiplier and divider creates the current programming signal by multiplying the rectified line voltage with the output of the voltage controller so that the current programming signal has the shape of the input voltage and average amplitude which controls the output voltage. In order to keep the gain of voltage loop constant, the output of voltage controller is divided by the average value of the input rectified v voltage ff , which is derived from the extra second-order filter shown in Fig.1. iL
C
S
r
RL
Rci
iac
R ff 1
Rac C ff 1
R ff 2
C ff 2
R ff 3
Rcz
Vramp com
Ccp
Vref
vcf
IM
R ff 1C ff 1 R ff 2 C ff 2
Rvi
vvf 2
IM AB C
B C A v ff
Cvf
Rvf
iref
Rvd
2.2 Mathematical model for the power stage of the converter Considering the possible DCM operation, we give the model at switching frequency as follows according to the state of the switch and the inductor current iL . x x
A1x B1vin for S is on A2 x B2 vin for S is off and iL ! 0 A3 x B3 vin for S is off and iL 0
d 2 v ff dt
2
§ R ff 1 R ff 2 · ¸v ff ¨1 ¸ ¨ R ff 3 ¹ ©
vin
(10)
The model of the multiplier and divider is given as vvf 1.5 iac vvf 1.5 vin v ff
2
2
v ff Rac
(11) The state space model of the current sensor and current regulator is y Gy Hw vcf Cy Dw (12) T T y >vcp vcz @ w >iref iL @ v cp , . and vcz are the Where C i voltage cross the capacitor cp and Ccz respectively. ref is the output of the multiplier. iL is the inductor current.
Fig.1 Schematic diagram of the average-current-controlled PFC boost converter
x
(7)
(ESR) L to the output voltage can be omitted. Therefore the voltage regulator can be modeled as dvvf vvf v 1 §¨ 1 1 1 ·¸ Vref C dt Rvf C vf Cvf ¨© Rvi Rvd Rvf ¸¹ Rvi C vf (9) The dynamics of the average value of the input rectified voltage is given as ª R ff 1C ff 1 R ff 2 º dv ff « R ff 1C ff 1 R ff 2 C ff 2 R ff 1C ff 2 » R ff 3 «¬ »¼ dt
Gate Drive
C cz
1 L@
Compared with voltage cross the output capacitor C , the contribution of the voltage cross Equivalent Serial Resistance
Rs
Rmo
(6)
T
>0 >0 0@T B2
2.3 Mathematical model for the control circuits
rC
iref
A3
(8) The structure of this model can be changed automatically from CCM to DCM operation and vice versa according to the inductor current.
vC
(5)
1 ª º « C R r 0» L C « » 0 0¼ ¬
B3
D
vin
A2
RL 1 ª º « C R r » C R r L C L C « » ·» R 1 § RL rC « ¨ ¸ « L R r L ¨ R r rL ¸» L C © L C ¹¼ ¬
B1
rL
L
(4)
(1) (2)
G
(3)
Where vin is the rectified input voltage, x is the state T vector defined by x >vC iL @ , the Ai and Bi ( i 1,2,3 ) are
578
1 ª « R C « cz cp « 1 «¬ Rcz Ccz
1 º Rcz Ccp » » 1 » Rcz Ccz »¼
(13)
ª Rmo «R C « ci cp ¬« 0
H C
D
>1 0@ >Rmo
Rs º Rci Ccp » » 0 ¼»
3.2 Simulation for the expected stable period-1 operation In the normal case, the converter should work in stable period-1 state. The simulation result for one of this state is given in Fig.3. In this case the power factor of converter is nearly one. In order to remove the noise in switching frequency and derive more legible low frequency behavior, the simulation results given from Fig.3 to Fig.5 are filtered by a 6-order low pass filter.
(14) (15)
RL @
(16) The switch drive signal is derived by the comparison between the ramp signal and the output of the current v regulator cf . The ramp signal is given as t mod T v ramp VL VU VL T (17) V V Where L and U are the lower and upper voltage limits of
TABLE 1 THE NOMINAL VALUE OF PARAMETERS IN THE EXPERIMENT CONFIGURATION
the ramp, and T is the switching period. The switch is on v v when cf is greater than ramp , and is off otherwise. From the model derived in this section, it can be seen that the dynamics of average current control PFC boost converter is a high order system with piece-wise nonlinearity, which is common in other DC-DC converter, and the multiplier/divider and square operation, which is not included in general DC-DC converter. There are no theoretical methods that can be used directly for bifurcation analysis to such a complex AC-DC converter system. Fortunately, the computer program can be used to simulate the dynamic behaviors of this system. III.
Value
Parameters
T L rL rC Rs Rci Rmo Ccz
1.052e-5s
R ff 2 R ff 3 C ff 1 C ff 2
C cp Rcz R ff 1
100pF
0.585mH
: 0.8 : 0.22 : 3.6k : 3.6k : 0.3
680pF 18k
:
910k :
Rac Rvf Rvi Rvd VL VU Vref
Value 91k 20k
: :
0.1uF 0.47uF 620k : 240k
: : 4.2k :
510k
0.63V 6.56V 3V
3.3 Simulation for the period-2 operation When the parameters fall into certain area, the PFC converter will demonstrate bifurcation behaviors. Fig.4 gives the period-2 stable operation state of this converter.
DYNAMICAL BEHAVIORS OF PFC CONVERTER BY SIMULATIONS
The computer simulation is performed using the model derived in the last section. The simulation program is developed in MATLAB. The parameters used in simulation are derived from the experimental configuration in SectionĊ. The output voltage DC is fixed nominally at 370V. The line frequency is fixed at 60Hz. The nominal values of the parameters are given in Table 1.
3.4 Simulation for Chaos With certain parameter, the PFC converter can also demonstrate chaos, which can be shown in Fig.5 3.5 Bifurcation diagram The bifurcation diagram can be derived by sampling output voltage at the double of the line frequency, which make the route from period doubling bifurcation to chaos clear. The derived bifurcation diagram can be explained as follows: a single point in bifurcation diagram is corresponded to period 1 operation at the double of the line frequency, two points means period 2 operation, and so on. Bifurcation diagrams versus the load resistance and the output capacitor are given
3.1 Simulation for fast scale instability The fast scale instability can be detected by using the model proposed in last section. One of many simulation results is given in Fig.2 for illustrated this phenomena.
Fig.2 the inductor current waveform near the cusp point of the line voltage with the input RMS value is 80VAC, RL=600¡,C=130uF
Parameters
Fig.3 The phase plot(up) , time domain wave form of Fig.4 The phase plot(up) , time domain wave form of the inductor current (middle) and the output voltage the inductor current (middle) and the output voltage (down) for the stable period-1 operation with the (down) for the stable period-2 operation with the input RMS value is 80VAC, RL=670¡,C=130uF input RMS value is 80VAC, RL=550¡,C=65uF
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Fig.5 The phase plot(up) , time domain wave form of the inductor current (middle) and the output voltage (down) for chaotic operation with the input RMS value is 100VAC, RL=2500¡,C=65uF
Fig.6 Bifurcation diagram versus the load Fig.7 Bifurcation diagram versus the output resistance with C=65uF and the input RMS value capacitors with the input RMS value is 100VAC is 80VAC and RL=2500¡
in Fig.6 and Fig.7 respectively. From the bifurcation diagrams, it is clear that when some parameters change continuously the system will undergo a series of period doubling bifurcation and finally become chaotic. These bifurcation diagrams also clearly indicate the stable boundary of the stable operation with respect to the different parameter, which can be used for designer to understand and design the converter. IV.
EXPERIMENTAL VERIFICATIONS
The experimental circuit is built to verify the simulation results. The control circuit consists of UC3854A and some peripheral elements. The experiment configuration is given in Fig.8. iL
D rL
L F
vC vin
cin
C
Q
V.
CONCLUSION
Like many areas of engineering, the power electronics is mainly motivated by practical applications and it often turns out that a particular circuit topology of system implementation has found widespread applications before it has been thoroughly analyzed[5]. The average-currentcontrolled PFC boost convert is one of these examples. In this paper, we have proposed the combined DCM and CCM model to be used for the analysis of the full dynamics. By this way, we have detected all possible inherent dynamical behaviors of the PFC AC/DC converter, which were verified by the experiments. By the work in this paper, we attempt to better understand and better design the averagecurrent-controlled PFC boost converters.
RL
rC Lin Rs Rci Ccz
iref
iac
R ff 1
Rcz C cp
Rmo
15 : 5
4
3
Rac C ff 1
R ff 2
16
6
UC3854AN 11
Rvf
8
Vcc
15 14
1
12
15V
10
Rvd
22k
Rset
13
CT
9
C1
2
CS
R ff 3
C2
C ff 2
Rvi
Cvf
7
Fig.8 Experimental configuration of the PFC boost converter
Some selected experiment results corresponding simulation results are given in Fig.9 to Fig.12. The experimental waveforms from Fig.10 to Fig.12 are filtered to remove the switching frequency noise and obtain more legible graph. From these figures, it can be found that the simulation results are consistent with the experimental results. It is also clear that the proposed model can cover all possible dynamics of the PFC converter. It should be pointed out that the low frequency bifurcation has more serious effects on the power factor of the converter compared with the fast scale bifurcation behaviors. Therefore the more attention should be paid to it in the design process.
Fig.9 the experiment observation corresponding to Fig.2 (trace 3)
ACKNOWLEDGMENT Haipeng Ren would like to thank Chunfen Jin for his kindly help when he worked as a visiting researcher in Kyushu University. REFERENCES [1] [2]
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O. Garcia, et al., Power factor correction: A survey, Proceeding of 32th Annual IEEE Power Power Eletronics Specialists Conference, 2001, pp.8-12 Manjusha Dawande, Gopal K. Dubey, Bang–bang current control with predecided switching frequency for switch-mode rectifiers, IEEE trans. on Power Electronics, 1999, 46(1), pp.61-66
Fig.10 the experiment observation corresponding to
Fig.11 the experimental results corresponding to Fig.12 the experimental results corresponding to
Fig.3
Fig.4
Fig.5
[11] Herbert H. C. Iu, Yufei Zhou, Chi K. Tse, Fast Scale Instability in a PFC Boost Converter under average current-mode control, International Journal of Circuit Theory and Application, 2003, Vol.31, pp.611-624 [12] M. Orabi, T. Ninomiya, C. Jin, A Novel Modeling of Instability Phenomenon in PFC Converter, Proceeding of 24th IEEE Telecommunications Energy Conference, 2002, pp. 566-573 [13] M. Orabi, T. Ninomiya, Nonlinear Dynamics of Power-Factor-Correction Converter, IEEE Trans. on Industrial Electronics, 2003, Vol.50(6), pp.1117-1125 [14] S. C. Wong, C. K. Tse, M. Orabi, T. Ninomiya, Mehtod of Double Averaging for Modeling PFC Switching Converters, Proceeding of 35th Annual IEEE Power Eletronics Specialists Conference, 2004, Aachen, Germany, pp. 3202-3208 [15] Koen De Gussemé, David M. Van De Sype, Alex P. Van den Bossche and Jan A. Melkebeek, Digital Control of Boost PFC Converters Operating in both Continuous and Discontinuous Conduction Mode. Proceeding of 5th Annual IEEE Power Eletronics Specialists Conference, 2004, Aachen, Germany, pp. 2346-2352 [16] Sukanya Parui, Soumitro Banerjee, Bifurcation Due to Transition From Continuous Conduction Mode to Discontinuous Conduction Mode in Boost Converter, IEEE Trans. on Circuits and Systems Part 1, 2003, Vol.50(11), pp.1464-1469
[3]
Yu V. Kolokolov, S. L. Koschinsky, A. Hamzaoui, Comparative study of the dynamics and overall performance of boost converter with conventional and fuzzy control in application to PFC, Proceeding of 5th Annual IEEE Power Eletronics Specialists Conference, 2004, Aachen, Germany, pp.2165-2171 [4] L. H. Dixon, average current mode control of Switching Power Supplies, Unitrode Power Supply Design Seminar Manual, SEM700, 1990 [5] Chi K. Tse, Mario Di Bernardo, Complex behavior in switching power converter, Proceeding of IEEE, 2002, 90(5), pp.768-781 [6] Fossas E., Olivar G., Study of chaos in Buck Converter, IEEE Trans. on Circuits and Systems Part 1, 1996, Vol.43(1), pp.13-25 [7] Yuan G H, Banerjee S. Ott e., Yorke J A, Border-collision Bifurcation in the Buck Converter, IEEE Trans. on Circuits and Systems Part 1, 1998, Vol.45(7), pp.707-716 [8] Aroudi A E, Bernadero L, Toribio E., Olivar G., Holf Bifurcation and Chaos from torus breakdown in a PWM Voltage controlled DC-DC boost converter, IEEE Trans. on Circuits and Systems Part 1, 1999, Vol.46(11), pp.1374-1382 [9] H. H. C. Iu, C. K. Tse, V. Pjevalica and Y. M. Lai, Bifurcation Behaviour in Parallel-Connected Boost Converters, International Journal of Circuit Theory and Application, 2001, Vol.29, pp.281-298 [10] H. H. C. Iu, C. K. Tse, Bifurcation Behaviour in Parallel-Connected Buck Converters, IEEE Trans. on Circuits and Systems Part 1, 2001, Vol.48(2), pp.233-240
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