Transconductance enhancement method for operational transconductance amplifiers Y.L. Li, K.F. Han, X. Tan, N. Yan and H. Min An improved recycling structure for an operational transconductance amplifier is proposed. The proposed structure separates the AC path from the DC path, and achieves a significant boost in transconductance under the same power and area budget. A folded-cascode amplifier employing the improved recycling structure was implemented in SMIC standard 0.13 mm CMOS process. Simulation results show that the enhancement of transconductance leads to 230% improvement in gain-bandwidth product and 13 dB boost in gain compared with the conventional folded cascode.
Introduction: The operational transconductance amplifier (OTA) is a basic building block in analogue circuit systems, which can be a major source of power consuming. In an OTA, the ratio of transconductance to current consumption reflects the power efficiency of the amplifier [1]. To improve the power efficiency of an OTA, several methods have been presented [2, 3]. In this Letter, an improved recycling structure (IRS) is proposed to significantly enhance the transconductance of an OTA without increasing power or area consumption. VDD
VDD M5
M0 Vp M1b
M2b Vb2
M11
M3a
(1)
If we choose p ¼ 1/2 and a ¼ 1/6, then the transconductance is improved 250%. Moreover, since less current ( pIb instead of Ib) flows through M1a, M2a, M3a and M4a, the output resistance of those MOSFETs is increased; thus, as a result of enhanced transconductance and output impedance, the gain is also increased. Based on the analysis in [3], the maximum slew rate (SR) of the IRS is:
M3b
Ib /2
M4b
Vb3
M7
M2a
M12
M6 Ib
Ib
Vn
Ib /2
GmIRS = [ p + p/a]Gm
2Ib
Vb1
M1a
currents can flow through M3a, M3b, M3c, M4a, M4b and M4c, while almost no AC current flows through M3c, M11b and M4c, M12b since they show high impedance for AC signals. Thus, M3a:M3b and M4a:M4b form AC current mirrors, and M3c and M4c are DC paths. The separated DC and AC paths make it possible to increase more transconductance without extra DC current or area consumption. In order to keep DC current unchanged, the ratio of transistors are as follows: first, the input pair is split at the ratio of p:(1 2 p). Next, the ratio M3a:M3b:M3c and M4a:M4b:M4c is p:a(1 2 p):b(1 2 p), where a + b ¼ 1. The ratio M11a:M11b and M12a:M12b is a:b. M3b and M4b are driven by a cross-coupled input pair, while M3c and M4c are biased with a constant gate voltage, which makes the DC current ratio I1:I2 ¼ a:b. Thus, the ratio of current mirrors M3a:M3b and M4a:M4b is p:a(1 2 p). Suppose the transconductance of the unsplit input pair is Gm, then the transconductance of the IRS is:
M9
M8
Vb4
SRIRS = p(1 − a)Ib /(aCL )
Vout
where CL is the load capacitor. Thus, SR is also improved with proper p and a. Other different OTA structures can also be modified using the IRS with enhanced transconductance. For example, the improved recycling folded cascode (IRFC) is shown in Fig. 2b. The size ratio of the transistors is similar to the IRS, except the ratio M3a:M3b:M3c and M4a:M4b:M4c, which is now (1 + p):a(1 2 p):b(1 2 p), since the folded cascode has ‘folded’ DC current. Suppose the transconductance of the FC is Gm, then the transconductance of IRFC is:
M10
M4a
3:1
(2)
1:3 GND
Fig. 1 Recycling folded cascode VDD 2Ib
Vb1 p
:
(1-p)
(1-p)
M0
Vp
GmIRFC = [ p + (1 + p)/a]Gm
p
M1b
Voutn
M2b Vb2
M11a M11b I1
pIb M3a p
Voutp
M12b I2
I1
Vb3
M3b
If we choose p ¼ a ¼ 1/2, then the transconductance is improved 250% compared to the FC. The maximum slew rate of the IRFC is:
M2a
M12a
I2
M3c
pIb
M4b
CL
SRIRFC = (1 + p)[2 − (1 − a)(1 − p)]Ib /[a(1 − p)CL ]
M4c
: a(1-p): b(1-p)
b(1-p) : (1-p)a :
p
Theoretically, with proper p and a, the slew rate of the IRFC has a greater upper-bound. In practice, negative slew rate (SR2) is restricted by the size and biasing of M10, while positive slew rate (SR+) is limited by supply voltage, since M6 is likely to enter the linear region in the transient response.
a VDD
VDD 2Ib
Vb1 :
(1-p)
(1-p)
M0
:
M5 Ib
p
Vp
Vn
M1a
M1b
M2b
M11a
M3a
pIb
M11b M12b Vb3
M3b
M3c
M7
M6 Ib Vb5
M8
Vout
M2a
Vb2
pIb
M9
Vb4
M10
CL
M12a
M4b
M4a
M4c
(1+p) : a(1-p) : b(1-p)
(4)
M4a
GND
p
(3)
Vn
M1a
CL
:
b(1-p) : a(1-p) : (1+p) GND
b
Fig. 2 Improved recycling structure (IRS) and improved recycling folded cascode (IRFC) a IRS b IRFC
Improved recycling structure: Shown in Fig. 1, is the recycling folded cascode (RFC) structure, which is proposed in [3]. The input pair is split into half (M1a, M1b and M2a, M2b) and the ratio of the current mirror (M3a:M3b and M4a:M4b) is set to three to maintain the correct summation of DC currents without increasing current or area consumption. Actually, since DC and AC currents share the same path, the boost of transconductance in the RFC is limited by DC currents; however, it still forms the basis of this work. The proposed IRS is shown in Fig. 2a. In the IRS, DC and AC currents have different paths. DC
Implementation and results: Three amplifiers, including an FC, an RFC and an IRFC, were designed with the same power and area budget in SMIC standard 0.13 mm technology using a single 1.2 V supply voltage. For the IRFC, p and a were set to 1/2. The current budget of amplifiers is 260 mA and area is 16 × 67 mm2. As shown in Fig. 3, the three amplifiers were used as a unity gain amplifier, where C1 ¼ 1 pF, R1 ¼ 500 kV and CL ¼ 7 pF. The simulated open-loop AC response is shown in Fig. 4, and the simulated transient response to 5 MHz 600 mVpp step input is shown in Fig. 5. The simulation comparison results of key parameters of three OTAs are listed in Table 1. It can be seen that the IRFC achieves a 230% improvement in gain-bandwidth product (GBW) compared to the FC, and a 60% improvement compared to the RFC, owing to the enhancement of transconductance. The boost of transconductance is slightly less than the theoretical value of 250% because of the finite AC impedance of DC paths. Also, the DC gain of the IRFC is 13 dB higher than the FC and 4 dB higher than the RFC. The SR2 of the IRFC is better than the RFC, while the SR+ of the IRFC is limited by low supply voltage, so no SR+ improvement compared to the RFC is observed. The phase margin of the RFC and the FC at 83 MHz drop to 74.18 and 78.78, respectively, thus the IRFC shows a slight degradation of less than 108 as a result of decreased transconductance of M3b and M4b.
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Conclusion: An improved recycling structure is proposed to enhance transconductance of OTAs without increasing power or area consumption. The IRS can be adopted by most classic-structure OTAs to boost transconductance. Three amplifiers, including the FC, the RFC and the IRFC, were designed with the same power and area consumption. Simulation results show that the transconductance enhancement of the IRFC leads to a 230% improvement in GBW compared to the FC and 60% improvement compared with the RFC. Also, the DC gain of the IRFC has a 13 dB improvement compared to the FC and 4 dB improvement compared to the RFC.
C1
Vin
R1
R1 Vout
Vcm + ±
CL
phase, dB
magnitude, dB
Fig. 3 Unit gain amplifier 80 60 40 20 0 –20 –40 0
IRFC RFC FC
Acknowledgments: This work is supported by the Important National Science and Technology Specific Projects of China (no. 2009ZX01031-003-002), the National High Technology Research and Development Program of China (no. 2009AA011605) and the National Natural Science Foundation of China (no. 61076028).
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# The Institution of Engineering and Technology 2010 9 June 2010 doi: 10.1049/el.2010.1575
–100 –150 –200
100
101
102
103
104 105 106 frequency, Hz
107
108
109
Fig. 4 Open-loop AC response of FC, RFC and IRFC 1.2 amplitude, V
E-mail:
[email protected] References
IRFC RFC FC
1.0 0.8 0.6 0.4 0.2 100
150
200
250
300 time, ns
350
400
Y.L. Li, K.F. Han, X. Tan, N. Yan and H. Min (State Key Laboratory of ASIC & System, Fudan University, Shanghai, People’s Republic of China)
450
500
1 Sansen, W.: ‘Analog design essentials’ (Springer, Dordrecht, The Netherlands, 2006) 2 Rezaei, M., Zhian-Tabasy, E., and Ashtiani, S.J.: ‘Slew rate enhancement method for folded-cascode amplifiers’, Electron. Lett., 2008, 44, (21), pp. 1226–1228 3 Assaad, R., and Silva-Martinez, J.: ‘The recycling folded cascode: a general enhancement of the folded cascode amplifier’, IEEE J. SolidState Circuits, 2009, 44, (9), pp. 2535– 2542
Fig. 5 Transient response of FC, RFC and IRFC to 5 MHz, 600 mVpp step
Table 1: Performance summary of FC, RFC and IRFC Parameter Bias current (mA) Area (mm2) CL (pF) GBW (MHz) Gain (dB) Phase margin (deg) SR+ (V/ms) SR2 (V/ms) FoM (MHzpF/mA)
FC 260
RFC 260
IRFC 260
16 × 67 16 × 67 16 × 67 7 7 7 24.6 50 83 56.8 65.6 70.2 87 80.6 70 12.4 11.6 662
20.1 25 1346
21.2 38.4 2235
ELECTRONICS LETTERS 16th September 2010 Vol. 46 No. 19
