Trends in High-Efficiency Power Amplifier Design ...

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INTERNATIONAL JOURNAL OF MICROWAVE AND OPTICAL TECHNOLOGY VOL. 1, NO. 1, JUNE 2006

Trends in High-Efficiency Power Amplifier Design Solutions Paolo Colantonio, Franco Giannini, Ernesto Limiti* University of Roma Tor Vergata – Electronic Engineering Department Via del Politecnico 1, 00133 Roma – ITALY Tel: +(39) 06 72597251 ; Fax : +(39) 06 72597251 ; e.mail : [email protected]

Abstract - In this contribution, research activities and trends in the field of RF and microwave power amplifiers design are discussed. Strategies for high efficiency are focused and the results attained presented, showing state-of-the-art power amplifier design, utilising GaAs or GaN technologies. Some “evergreen” design solutions, recently rediscovered for advanced communication systems, as the Doherty and Envelope Tracking approaches, are revisited. Index terms: Power Amplifiers, High Efficiency, Amplifier Linearity, Device Technologies, Doherty, Envelope Tracking.

I. INTRODUCTION The power amplifier (PA) is a key element in transmitter systems, whose main task is to increase the power level of signals at its input up to a predefined level. PA’s features are mainly related to the absolute output power levels achievable, accompanied to highest efficiency and linearity performances. In fact, regardless from the specific application considered, from the energetic point of view a PA acts as a component converting dc power from supplies (Pdc) into microwave power (Pout). Therefore it is clear that highest efficiency levels become mandatory to reduce dc power consumption. On the other hand, a linear behaviour is clearly mandatory to avoid the corruption of the transmitted signal information. Unfortunately, efficiency and linearity are contrasting requirements, forcing the designer to a suitable trade-off. Moreover, as contrasted to low-level amplifiers, often specified in term of smallsignal gain, the requirement of highest output power levels implies the selection of the active devices composing the PA and the exploration of their non-linear operating regions, to fully exploit the output power capabilities [1]. Since PAs are employed in a broad range of fields, the

large differences in system applications are typically reflected back into the technologies adopted for PAs active modules realisation [2]. However, from the designer perspective, a PA is a non-linear system component, thus requiring dedicated non linear design methodologies to attain the highest available performance [1]. In this contribution, starting from an overview of the available technologies for PA realisation and related performances, the PA design strategies for high efficiency and high linearity performances are revisited and established through several experimental results carried out. Some “evergreen” design solutions, as the Doherty and Envelope Tracking approaches, recently re-discovered for advanced communication systems, are revisited trying to identify their strength and potentials. Finally, due to the increasing demand of PAs for multiband and/or multi-standard applications, suitable design solutions are discussed, indicating a possible research roadmap and trends. II. TECHNOLOGIES FOR SOLID STATE PAS In the last decade, the rapid improvement of mobile and personal communications systems, ranging from cellular telephony to wireless LAN, with the corresponding request of high quality radio links, is posing a major challenge to high frequency technologies and subsystem performance, above all in the microwave frequency region. Moreover, the recent trends toward higher and higher power densities, mainly pushed by radar and electronic warfare applications, is the latest development of the tremendous advancements experienced by the high-frequency semiconductor industry. While in

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Pout(dBm)

the upper microwave and lower millimetre wave range many efforts have been devoted towards the development of active devices with high power densities, a minor progress has been experienced in the lower GHz range. For the former, for instance, the development of “field plate” gate extensions over the drain region applied to GaAs or GaN FET structures, resulting in a breakdown voltage increase, is pushing such technology to become a serious competitor of LDMOS in L- or S-Band applications [3]. Simultaneously, production of GaN HFET devices has been initiated, to further increase device power densities thanks to the highest breakdown voltages assured from such wide bandgap material [4]. Even if the lack of technological maturity is still a drawback for GaN technology, a rapid improvement of manufacturability and yield can be forecasted, with the goal of developing high power solid state PAs, eventually replacing present TWT and solid-state amplifiers in all base-stations applications. On the contrary, the minor progress in output power experienced at lower frequencies, is mainly due to different system requirements: in this case major emphasis is devoted to linearity performances (due to complex modulation schemes) rather than on absolute output power levels. the major RF power technologies are reported in Fig. 1, as related to the relevant applications with the corresponding output power. 70 65 60 55 50 45 40 35 30 25 20 15 10 5

2G

Si WLAN 3G GaAs BlueTooth GaN AlGaN InGaP/GaAs InP AlN

WLAN Anti-collision Radar Satellite Cross Links Radioastronomy TV Satellite Commercial Telec. Services LMDS Phase Array Antennas Smart Munitions Adv. Phased Array Radioastronomy

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Fig. 1: RF device technologies, relevant applications, and performance (output power) achieved.

III. DESIGN APPROACHES PA design is strongly dependent on operating frequency and application requirements, as well as to the available device technology: this situation often results in an exciting challenge for PA designers, since available approaches are not unique. Moreover, the design is further complicated by the non linear active device behaviour, even if simplified approaches are often employed to infer preliminary device figures [5]. The developed PA is therefore often the result of a trade-off between conflicting requirements, as linearity vs. efficiency or high output power vs. low distortion. For high frequency applications however it is possible to identify two broad classes of PA design methodologies: the Switching-Mode (SM) amplifiers [6] or the trans-conductance based amplifiers with Harmonic Tuned terminations (HT) [7]. In the former the active device is driven by a large input signal to act as a switch, rather than as a current source in HT amplifiers. For this reason the resulting SM amplifier are often considered as a dc/RF converter rather than as a RF amplifier. Different solutions have been proposed, namely Class D or S [8], while the most famous and adopted one results in the Class E amplifier configuration [9]. In such amplifiers the high efficiency condition is achieved by minimizing the overlapping of output voltage and current waveforms. In HT amplifiers, the active device acts as a current source controlled by the input signal (voltage or current for FET or Bipolar devices respectively). Starting from different quiescent active device bias points, resulting in different output current conduction angles (from 2π to 0) and related nomenclature (from Class A, AB, B to C respectively), the high efficiency condition is achieved exploiting the device non linear behaviour through a suitable selection of both input and output harmonic terminations. In this case the most famous solution is the Class F approach [10,11], while for high frequency applications and taking into account practical limitations on the control of harmonic impedances, several solutions have been successfully proposed [12].

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Vdd

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Drain efficiency of switching-mode amplifiers may theoretically reach 100%, and although many loss mechanisms, such as ohmic and capacitive discharge losses, degrade efficiency in actual realisation, high values have been demonstrated. A 90% has been recorded at HF [16], decreasing up to a 70% at microwave frequencies [17]. The frequency range of applicability of Class E amplifier is however intrinsically limited by the active device switching behaviour, limited by the device rolloff frequency. Moreover, device intrinsic output reactive behaviour (mainly dominated by the output capacitance Cout), further decreases the frequency range of Class E amplifiers, according to the following relation [18]: I max VBD ⋅ Cout

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Fig. 3: Performance of realised S-Band GaN Class E amplifier (photo in the box).

Fig. 2: Class E amplifier scheme.

f max = 0.063

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where Imax and VBD are device maximum output current and breakdown voltage respectively.

The performance of the realised Class E amplifier are compared in Fig. 4 with state-ofthe-art results reported in literature for S-Band applications (mainly based on CMOS technology). S-Band Class E State of the Art 65 CMOS

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This class of amplifiers is characterised by the assumption of an ideal switching mode behaviour for the active devices employed. Starting from the early Class E configuration proposed by Sokal in 1975 [13], several approaches and design solutions were later proposed, as Class D and S [8]. However, the Class E amplifier still remain the most adopted methodology, especially in RF wireless systems, due to its relatively simple scheme, and availability of closed form expressions for its circuit components [14]. The basic amplifier schematic is reported in Fig. 2, even if alternative designs have been proposed [15].

Class E design approach has been extended for relatively high frequency applications, taking into account the aforementioned practical frequency limitation [18]: in this case the methodology has been successfully applied for the design of a Class E amplifier for S-Band application, based on the recent and innovative GaN device technology. Measured performance of the realised amplifier are reported in Fig. 3 (photo in the box) at 2.4GHz [18].

Pout (dBm) & Gain (dB)

A. Switching-Mode Power Amplifiers

Univ. National Korea

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Fig. 4: Efficiency vs. output power for S-Band Class E state-of-art amplifiers.

From a linearity point of view, SM amplifiers usually do not exhibit satisfactory performance, since the output power is not directly related to the input power, which is only responsible to

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In this class of amplifiers the active device is operated (and modelled) as a current source, whose waveform is mainly controlled by the input driving signal, at least at a first approximation [5]. High efficiency condition is achieved exploiting the active device non linear behaviour (in large signal operating conditions) by a suitable choice of both input and output harmonic terminations, to properly shape the device output current and voltage waveforms [7]. Starting from the pioneering work on Class F amplifier theoretically proposed by Snider in 1967 [20], more realistic and useful solutions have been investigated and proposed, accounting for practical limitation in the number of controlled harmonic terminations [7]. The generic scheme of an HT amplifier is reported in Fig. 5, where in actual realisation the idler are usually replaced by matching networks designed to fulfil well-identified frequency constraints at harmonic frequencies. >3fo

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Fig. 6: Measured performance of realised (photo in the box) Class F MMIC PA, based on single (1.5x1.9mm2) and coupled (1.8x2.3mm2) GaAs PHEMT devices

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Measurements 35

PAE (%)

B. Harmonic Tuned Power Amplifiers

guidelines have been proposed in [7] and experimentally validated in [21], stressing also the relevance of input harmonic terminations. The HT methodology aims to shape the output voltage waveform to fulfil device physical constraints, while assuring an higher fundamental component as compared as to a standard Class A amplifier. Such amplifiers are classified according to the terminations controlled, like Class F (or 3rd HT), 2nd HT or 2nd&3rd HT amplifiers. The HT approaches have been applied to design several state-of-the-art amplifiers. For instance, Class F strategy has been adopted to design monolithic microwave integrated circuits (MMIC) PA based on PHEMT GaAs device, for X-Band application (9.6 GHz), investigating and demonstrating the possibility to adopt innovative design criteria to combine active devices, to further increase output power levels, fulfilling HT conditions [22]. The measured performance of the realised Class F amplifiers are reported in Fig. 6 (photo in the box).

Pout (dBm)

drive the the device in on-off states. Consequently, SM amplifiers are commonly adopted for constant-envelope modulation schemes, requiring less stringent linearity performance, or in complex architectures like EER (Envelope Elimination and Restoration) and LINC (LInear amplification using Nonlinear Components) [2], where a high efficiency and constant envelope amplifier is required. Recent results shown that Class E amplifier can be successfully applied in transmitter with timevarying envelope operating at X-Band [19].

VDD ZL3

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3fo

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Fig. 5: Theoretical scheme for HT amplifiers.

The disadvantage of HT amplifiers, as compared as to SM amplifiers, is related to the lack of closed form design expressions, even if a theoretical formulation and useful design

With the advent of GaN devices, characterised by a very high breakdown voltage, the use of a 2nd HT strategy becomes very attractive, due to the larger improvements assured, as compared to a Class F (e.g. 3rd HT) approach. For instance, a C-Band 2nd HT amplifier has been designed in hybrid technology employing a GaN device, whose measured performance at 5.5GHz is reported in Fig. 7 [23].

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Pin (dBm) Fig. 7: C-Band GaN 2nd HT amplifier performance (photo in the box).

To demonstrate the promising results, a comparison with other state-of-the-art GaN amplifiers reported in literature is depicted in Fig. 8, resulting in the highest efficiency of 63% achieved with GaN devices. C-Band GaN PA - State of the art

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Univ. of Connecticut Storrs

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MiMEG Lab Roma

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Efficiency (%)

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Univ. of Illinois, Urbana

Univ. of California, Santa Barbara

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Fig. 8: C-Band GaN PA state of art.

IV. LINEARITY ISSUES IN PA The realisation of a PA simultaneously maximising output power level (Pout), efficiency (η) and linearity performance (in terms of carrier over third order intermodulation product C/I3) is a crucial challenge in transmitter systems design. Unfortunately, such goals are contrasting since η shows an opposing behavior respect to C/I3 (the former increases when the last decreases, as depicted in a sample case in Fig. 9), resulting in a trade-off for the final PA operating level.

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Fig. 9: Example of Load pull of Pout (blue lines) and C/I3 (green lines) on fundamental output load.

As described in the previous section, if Pout and η performance are concerned, an established solution consists in making use of suitable harmonic tuning strategies, exploiting device non linear behavior [12]. When linearity performance becomes critical, proposed design techniques are based on the identification (and related PA networks design) of the so-called large-signal IMD sweet-spots [24,25], e.g. circuit condition giving rise to a null for the third order intermodulation product (IMD3). Such peculiar nonlinear effects can be qualitatively explained as opposite phase interactions of small- and large-signal IMD components, typically arising from the mild nonlinearities of device output current. Even if IMD sweet spots seems to be related to some design parameters, as device bias voltage (especially input voltage), input power level, temperature and load impedances [26], actually a well-established design approach to maximize C/I3 through IMD sweet spots control has been not yet identified, and key roles are played by designer experience and active device non linear model consistency. As a consequence, linearization techniques, like feedback, feedforward, or predistortion [27,28] are adopted. Anyway, to optimise PA performance through a linearization scheme, the PA itself has to exhibit a symmetric behavior for its IMD products, to avoid a different compensation requirement (and

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related technical hitches) for the lower and upper sidebands of generated IMD signals (varying with input drive and tone spacing also) [29]. Thus many efforts have been recently devoted to investigate non linear mechanisms generating IMD asymmetries in active devices. With a Volterra analysis and assuming a two-tone drive (at frequencies f1 and f2, with ∆f=f2-f1), effects of active device terminations at fundamental and harmonic frequencies were identified [30,31]. In particular, the condition nulling IMD asymmetry (∆IM3) was derived, resulting in a purely resistive termination at the device output (drain) port at base-band frequency (∆f) [30]. Starting from such results, several contributions propose base-band schemes [32] or “ad hoc” drain bias networks [33] minimizing ∆IM3. Nevertheless, such schemes increase the PA complexity and dimensions, without any minimization effects on the absolute IM3 output level. Starting from the Volterra analysis of a FET device, a new condition to null ∆IM3 was recently proposed, based on a suitable choice of both fundamental and second harmonic output terminations, also in agreement with harmonic tuning approaches [34]. In particular, the inferred condition implies output network synthesis to realize a purely resistive terminations at fundamental and second harmonic frequencies, at the device output intrinsic current source, in spite of controlling the network base-band behavior. V. SOLUTION TO PERFORMANCE

IMPROVE

PA

The increasing request to transmit a growing amount of information on the same transmission channel resources, has pushed towards the development of complex modulations techniques (WCDMA, UMTS, etc), resulting in severe requirements in terms of linearity, mainly demanded to the electronic front-end. Moreover, the scenario is further complicated by the timevarying envelope signals behaviour, with typical peak-to-average power ratio between 6 to 12 dB, resulting in a decrease of performance evaluated in terms of time average rather than peaking levels. As a consequence, some old-fashioned solutions have been recently resurrected to

overcome the drawbacks related to these kind of signals. In particular, two main strategies have been revisited, namely the Doherty [35] and the Envelope Tracking (ET) techniques [36]. The former exploits the concept of a dynamic load while the latter implies dynamic bias conditions, both with the aim to force the amplifier stage to operate at maximum efficiency levels for a predefined input dynamic range. A. Doherty Amplifier

Such a technique, introduced for the first time in 1936 by Doherty [35], is based on the dynamic modulation of the load presented to a given device by using the active load pull concept. The basic scheme is depicted in Fig. 10, where the Aux amplifier is deputised to modify the load of the Main amplifier, through the output quarterwave Transmission Line (TL), when the last reaches its saturation (e.g. maximum efficiency) operating condition.

Fig. 10: Doherty amplifier scheme.

Simplifying the description, for low input drive levels the Aux amplifier is turned off, and the Main amplifier is loaded by an impedance doubled with respect to the required optimum value Ropt, due to the quarter line transformation. When the Main amplifier starts to saturate, resulting in the load curve LC1 in Fig. 11, the Aux amplifier is turned on, and the electrical situation becomes the one depicted in Fig. 12.

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Trends for output power and PAE reported in literature in the last three years for Doherty amplifiers used in CMDA applications in the range of 1950-2170 MHz are depicted in Fig. 14, showing an increase in efficiency requests rather than in output power levels. Fig. 11: Load curves of Main and Auxiliary amplifiers in a Doherty configuration.

Fig. 12: Principle of operation of Doherty configuration.

Thus the Aux amplifier modifies the load of the Main amplifier through the following relationship: RMain =

Z o2 ⎛ I ⎞ RL ⎜ 1 + Aux ⎟ I2 ⎠ ⎝

(2)

At the end, both amplifiers reach their final saturation conditions, corresponding to the load curves LC2 and LC3 for the Main and Aux amplifiers respectively (Fig. 11).

Fig. 14: Output power and PAE reported for Doherty amplifier employed in CDMA applications in the range 1950-2170 MHz.

B. Envelope Tracking

ET technique [36] or, in general terms, polar modulation techniques [37], are based on the dynamic modification of the device bias to attain maximum efficiency for each input signal drive. The basic scheme is reported in Fig. 15, where the envelope amplifier (EA) is aimed to bias the main amplifier to operate roughly at 1dB compression for a fixed input drive.

Theoretical drain efficiency resulting from the overall structure is reported in Fig. 13, for several choices of the parameter α, related to the current (as percentage of maximum value) reached by the Main amplifier when the Aux is turned on (see Fig. 11).

Fig. 15: Envelope tracking technique for RF power amplifiers.

Fig. 13: Theoretical drain efficiency of a Doherty amplifier.

The major issues of ET technique is related to the practical implementation of the envelope amplifier, required to act as an high efficiency dc/dc converter, not to decrease overall system efficiency. The major issue is represented by the

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bandwidth required to EA, according to modern modulation schemes (WCDMA, UMTS, etc.), to avoid distortion phenomena. Several solutions have been proposed based on buck converter configuration [38], and actually two positions seem to be identified, respectively the Wide Bandwidth Envelope Tracking (WBET) or the Average Envelope Tracking (AET). WBET scheme tracks the instantaneous wide-bandwidth input envelope signal power, whereas the AET scheme follows the long-term average input envelope signal power [39]. Theoretical efficiency performance as a function of the output power is reported and compared in Fig. 16, for different amplifier configurations or architectures [40].

discussed. Starting from a review of PA design strategies, the results achieved by TARGET activities have been presented, providing stateof-the-art amplifier performance, by using GaAs or GaN technologies and different design strategies. Finally, some re-discovered amplifier architectures (Doherty and ET) have been discussed identifying a potential future trend in PA design. VII. ACKNOWLEDGMENTS Research reported here has been partially performed in the context of the network TARGET- "Top Amplifier Research Groups in a European Team" and supported by the Information Society Technologies Programme of the EU under contract IST-1-507893-NOE, www.target-org.net. VIII. REFERENCES [1]

[2] Fig. 16: Efficiency vs. output power for different idealized amplifier architectures, including Class A, Class B, Doherty and ET.

In principle both Doherty and ET techniques could assure the highest average efficiency for a large output dynamic range. However, from a practical point of view, main drawbacks of Doherty amplifiers are related to their intrinsic bandwidth limitation, related to the quarter line required for the active load pull concept. For the ET technique, the major weakness are related to the dc/dc converter efficiency performance, affecting overall efficiency and overriding theoretical improvement achievable with the PA bias control.

[3]

[4] [5] [6] [7]

[8]

VI. CONCLUSIONS In this contribution an overview of main research activities performed in the field of RF and microwave power amplifiers design have been

[9]

P. Colantonio, F. Giannini, E. Limiti “Nonlinear Approaches to the Design of Microwave Power Amplifiers,” Inter. Journal of RF and Microwave Computer-Aided Engineering, Vol. 14, N 6, Nov. 2004, pp. 493-506. F. H. Raab, P. Asbeck, S. Cripps, P. B. Kenington, Z. B. Popovic, N. Pothecary, J. F. Sevic, and N. O. Sokal, “Power amplifiers and transmitters for RF and microwave,” IEEE Trans. Microwave Theory Tech., v. 3, n. 50, March 2002, pp. 814–826. P. K. T. Mok, C. A. T. Salama, “A novel high-voltage high-speed MESFET using a standard GaAs digital IC process,” IEEE Trans. on Electronics Device Vol. 41, n. 2, Feb. 1994 pp. 246 – 250. R. J. Trew, G. L. Bilbro, W. Kuang, Y. Liu, H. Yin, “Microwave AlGaN/GaN HFETs,” IEEE Microwave Magazine, Vol. 6, n. 1, March 2005, pp. 56 – 66. L.J. Kushner, “Output performance of idealised microwave power amplifiers,” Microwave Journal 1989, pp. 103-116. H. L. Krauss, C.W. Bostian, and F. H. Raab, Solid State Radio Engineering, Wiley, New York, 1980. P. Colantonio, F. Giannini, G. Leuzzi, E. Limiti, “Multi Harmonic Manipulation for Highly Efficient Microwave Power Amplifiers,” Inter. Journal of RF and Microwave Computer-Aided Engineering, Vol.11, N°6, Nov. 2001, pp. 366-384. V. Saari, P. Juurakko, J. Ryyndnen,; K. Halonen, “13.5 MHz class-S modulator for an EER transmitter” Proceedings of Norchip Conference, Nov. 2004, pp. 253 - 256 N. O. Sokal, “Class-E RF power amplifiers,” QEX (published by American Radio Relay League, 225

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66


[10] [11]

[12]

[13]

[14]

[15]

[16]

[17]

[18]

[19]

[20]

[21]

[22]

Main St., Newington, CT 06111-1494, USA), Jan./Feb. 2001, pp 9–20. S. Gao, “High efficiency class-F RF/microwave power amplifiers,” Microwave Magazine, IEEE Vol. 7, n. 1, Feb 2006 pp. 40 – 48 P. Colantonio, F. Giannini, G. Leuzzi, E. Limiti, “On the Class-F Power Amplifier Design,” Inter. Journal of RF and Microwave Computer-Aided Engineering, Vol.9, N°2, March 1999, pp.129-149. P. Colantonio, F. Giannini, G. Leuzzi, E. Limiti “Theoretical Facet and Experimental Results of Harmonic Tuned PAs,” Intern. Journal of RF and Microwave Computer-Aided Engineering, Vol.13, N°6, Nov. 2003, pp. 459-472. N. O. Sokal and A. D. Sokal, “Class-E: A new class of high-efficiency tuned single-ended switching power amplifiers,” IEEE Journal on Solid-State Circuits, vol. 10, no. 3, Jun. 1975, pp. 168−176. N. O. Sokal, “Class-E switching-mode high-efficiency tuned RF/microwave power amplifier: Improved design equations,” IEEE MTT-S Symp. Digest, 2000, pp. 779–782. A.V. Grebennikov, H. Jaeger, “Class E with parallel circuit – a new challenge for high-efficiency RF and microwave power amplifiers”, Microwave Symp. Digest, 2002 IEEE MTT-S Intern., Vol. 3, June 2002, pp. 1627-163. Q.S. Tan, C. Ciotti, H.J. Schmitt, "Class-E high efficiency power amplifiers," Proceedings of the 35th Midwest Symposium on Circuits and Systems, Aug. 1992, vol.1, pp.118 – 120. T. B. Mader and Z. Popovic, “The transmission-line high-efficiency Class-E amplifier,” IEEE Microwave Guided Wave Lett., vol. 5, no. 9, Sep. 1995, pp. 290−292. P. Colantonio, F. Giannini, R. Giofrè, M. A. Yarleque Medina, D. Schreurs, and B. Nauwelaers, “High frequency Class E design methodologies,” Proceedings of the Gallium Arsenide Applications Symposium, GAAS 2005, Paris, France, October 2005, pp. 329-331. N. Wang, X. Peng, V. Yousefzadeh, D. Maksimovic, S. Pajic, and Z. Popovic, “Linearity of X-band class-E power amplifiers in EER operation,” IEEE Trans. Microwave Theory & Tech., vol. 53, no. 3, Mar. 2005, pp. 1092−1102. D.M. Snider, “A theoretical analysis and experimental confirmation of the optimally loaded and overdriven RF power amplifiers,” IEEE Trans Electr Dev ED-14, n. 6, June 1967, pp. 851–857. P. Colantonio, F. Giannini, E. Limiti, V. Teppati, “An Approach to Harmonic Load– and Source–Pull Measurements for High-Efficiency PA Design,” IEEE Trans. on Microwave Th. and Tech., vol.52, n.1, Jan. 2004, pp.191 - 198. P. Colantonio, F. Giannini, R. Giofrè, E. Limiti, C. Lanzieri, S. Lavanga, “Class F High Power Amplifier for X-Band Applications,” Proceedings of the COMITE 2005, Prague, Czech Republic, September 2005, pp.123-126.

[23] P. Colantonio, F. Giannini, R. Giofrè, E. Limiti, A. Serino M. Peroni, P. Romanini, C. Proietti “A C-Band High Efficiency Second Harmonic Tuned Hybrid Power Amplifier in GaN technology”, To be published on IEEE Transactions on Microwave Theory and Techniques, Vol. 54, Issue: 6, Part: 2. [24] N. Carvalho and J. Pedro, “Large and Small Signal IMD Behaviour of Microwave Power Amplifiers”, IEEE Trans. on Microwave Theory and Tech., vol. MTT-47, Dec. 1999, pp. 2364-2374. [25] J. Pedro and N. Carvalho, “Intermodulation Distortion in Microwave and Wireless Circuits,” Artech House, 2003. [26] S. R. Novis, and L. Pelletier, “IMD Parameters Describe LDMOS Device Performance,” Microwave RF, vol. 37, no. 7, July 1998, pp. 69-74. [27] P.B. Kenington, “Methods Linearize RF Transmitters and Power Amps (Part 1),” Microwaves & RF, vol. 37, no. 13, Dec.b1998, pp. 102-116. [28] P.B. Kenington, “Methods Linearize RF Transmitters and Power Amps (Part 2),” Microwaves & RF, vol. 38, no. 1, Jan. 1999, pp. 79-89. [29] Y. Wang, S. V. Cherepko, J. C. M. Hwang W. Feiyu; W.D Jemison, “Asymmetry in intermodulation distortion of HBT Power Amplifiers,” Gallium Arsenide Integrated Circuit (GaAs IC) Symp., Oct. 2001, pp. 201 – 204. [30] J. Brinkhoff, and A. E. Parker, “Effect of Baseband Impedence on FET Intermodulation,” IEEE Trans. on Microwave Th. and Tech., MTT-51, n. 3, March 2003 pp.1045 – 1051. [31] P. Colantonio, F. Giannini, E. Limiti, A. Nanni, “Investigation of IMD Asymmetry in Microwave FETs via Volterra Series,” Proc. of Gallium Arsenide Applications Symposium, Oct. 2005, pp 53-56. [32] A. Richards, K. A. Morris, J. P. McGeehan, “Cancellation of Electrical Memory Effects in FET Power Amplifiers,” Proc. of European Microwave Conference, Oct. 2005, pp 971-974. [33] B. De Carvalho, J. C. Pedro, “Comprehensive explanation of distortion sideband asymmetries,” IEEE Trans. on Microwave Th. and Tech., MTT-50, n. 9, Sept. 2002. pp. 2090 – 2101. [34] P. Colantonio, F. Giannini, R. Giofrè, E. Limiti, A. Nanni, “Power Amplifier Design Strategy to null IMD asymmetry” Accepted for European Microwave Conference, Manchester, UK, Sept. 2006. [35] W. H. Doherty, “A New High Efficiency Power Amplifier for Modulated Waves,” Proc. IRE, vol. 24, no. 9, Sept. 1936, pp. 1163-1182. [36] Vahid Yousefzadeh, Eduard Alarcon, Dragan Maksimovic, “Three-Level Buck Converter for Envelope Tracking in RF Power Amplifiers”, IEEE Transactions on Power Electronics, Vol. 21, n. 2, March 2006 pp. 549 – 552 [37] E. McCune, W. Sander, “EDGE transmitter alternative using nonlinear polar modulation,” Proc. ISCAS ‘03, Vol. 3, pp III-594 – III-597. [38] V. Yousefzadeh, E. Alarcon, D. Maksimovic, “ThreeLevel Buck Converter for Envelope Tracking in RF

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Power Amplifiers”, IEEE Trans. on Power Electronics, Vol. 21, n. 2, March 2006 pp. 549 – 552. [39] A. Hueiching Yang, D.F. Kimball, L.E. Larson, and P.M. Asbeck “Design of Wide-Bandwidth EnvelopeTracking Power Amplifiers for OFDM Applications”, IEEE Trans. on Microwave Th. and Tech., Vol. 53, n. 4, April 2005, pp. 1244-1255. [40] P. Asbeck, L. Larson, D. Kimball, Yu Zhao, F. Wang and D. Qiao, “High Dynamic Range, High Efficiency Power Amplifiers for Wireless Communications,” Proc. of the Bipolar/BiCMOS Circuits and Technology Meeting, Oct. 2005, pp. 103 – 107.

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